- * Algorithm for programming normal p: flash
- * Follow state machine from "56F801x Peripheral Reference Manual"@163.
- * Registers to set up before calling:
-* r0: TX/RX high address.
-* r2: FM module base address.
-* r3: Destination address in flash.
-*
-* hfm_wait: // wait for buffer empty
-* brclr #0x80,x:(r2+0x13),hfm_wait
-* rx_check: // wait for input buffer full
-* brclr #0x01,x:(r0-2),rx_check
-* move.w x:(r0),y0 // read from Rx buffer
-* move.w y0,p:(r3)+
-* move.w #0x20,x:(r2+0x14) // write PGM command
-* move.w #0x80,x:(r2+0x13) // start the command
-* move.w X:(R2+0x13),A // Read USTAT register
-* brclr #0x20,A,accerr_check // protection violation check
-* bfset #0x20,X:(R2+0x13) // clear pviol
-* bra hfm_wait
-* accerr_check:
-* brclr #0x10,A,hfm_wait // access error check
-* bfset #0x10,X:(R2+0x13) // clear accerr
-* bra hfm_wait // loop
-*0x00000000 0x8A460013807D brclr #0x80,X:(R2+0x13),*+0
-*0x00000003 0xE700 nop
-*0x00000004 0xE700 nop
-*0x00000005 0x8A44FFFE017B brclr #1,X:(R0-2),*-2
-*0x00000008 0xE700 nop
-*0x00000009 0xF514 move.w X:(R0),Y0
-*0x0000000A 0x8563 move.w Y0,P:(R3)+
-*0x0000000B 0x864600200014 move.w #32,X:(R2+0x14)
-*0x0000000E 0x864600800013 move.w #128,X:(R2+0x13)
-*0x00000011 0xF0420013 move.w X:(R2+0x13),A
-*0x00000013 0x8B402004 brclr #0x20,A,*+6
-*0x00000015 0x824600130020 bfset #0x20,X:(R2+0x13)
-*0x00000018 0xA967 bra *-24
-*0x00000019 0x8B401065 brclr #0x10,A,*-25
-*0x0000001B 0x824600130010 bfset #0x10,X:(R2+0x13)
-*0x0000001E 0xA961 bra *-30
-*/
-
-const uint16_t pgm_write_pflash[] = {0x8A46, 0x0013, 0x807D, 0xE700,\
- 0xE700, 0x8A44, 0xFFFE, 0x017B,\
- 0xE700, 0xF514, 0x8563, 0x8646,\
- 0x0020, 0x0014, 0x8646, 0x0080,\
- 0x0013, 0xF042, 0x0013, 0x8B40,\
- 0x2004, 0x8246, 0x0013, 0x0020,\
- 0xA967, 0x8B40, 0x1065, 0x8246,\
- 0x0013, 0x0010, 0xA961};
+ *Algorithm for programming normal p: flash
+ *Follow state machine from "56F801x Peripheral Reference Manual"@163.
+ *Registers to set up before calling:
+ * r0: TX/RX high address.
+ * r2: FM module base address.
+ * r3: Destination address in flash.
+ *
+ * hfm_wait: // wait for buffer empty
+ * brclr #0x80, x:(r2+0x13), hfm_wait
+ * rx_check: // wait for input buffer full
+ * brclr #0x01, x:(r0-2), rx_check
+ * move.w x:(r0), y0 // read from Rx buffer
+ * move.w y0, p:(r3)+
+ * move.w #0x20, x:(r2+0x14) // write PGM command
+ * move.w #0x80, x:(r2+0x13) // start the command
+ * move.w X:(R2+0x13), A // Read USTAT register
+ * brclr #0x20, A, accerr_check // protection violation check
+ * bfset #0x20, X:(R2+0x13) // clear pviol
+ * bra hfm_wait
+ * accerr_check:
+ * brclr #0x10, A, hfm_wait // access error check
+ * bfset #0x10, X:(R2+0x13) // clear accerr
+ * bra hfm_wait // loop
+ *0x00000000 0x8A460013807D brclr #0x80, X:(R2+0x13),*+0
+ *0x00000003 0xE700 nop
+ *0x00000004 0xE700 nop
+ *0x00000005 0x8A44FFFE017B brclr #1, X:(R0-2),*-2
+ *0x00000008 0xE700 nop
+ *0x00000009 0xF514 move.w X:(R0), Y0
+ *0x0000000A 0x8563 move.w Y0, P:(R3)+
+ *0x0000000B 0x864600200014 move.w #32, X:(R2+0x14)
+ *0x0000000E 0x864600800013 move.w #128, X:(R2+0x13)
+ *0x00000011 0xF0420013 move.w X:(R2+0x13), A
+ *0x00000013 0x8B402004 brclr #0x20, A,*+6
+ *0x00000015 0x824600130020 bfset #0x20, X:(R2+0x13)
+ *0x00000018 0xA967 bra *-24
+ *0x00000019 0x8B401065 brclr #0x10, A,*-25
+ *0x0000001B 0x824600130010 bfset #0x10, X:(R2+0x13)
+ *0x0000001E 0xA961 bra *-30
+ */
+
+const uint16_t pgm_write_pflash[] = { 0x8A46, 0x0013, 0x807D, 0xE700,
+ 0xE700, 0x8A44, 0xFFFE, 0x017B,
+ 0xE700, 0xF514, 0x8563, 0x8646,
+ 0x0020, 0x0014, 0x8646, 0x0080,
+ 0x0013, 0xF042, 0x0013, 0x8B40,
+ 0x2004, 0x8246, 0x0013, 0x0020,
+ 0xA967, 0x8B40, 0x1065, 0x8246,
+ 0x0013, 0x0010, 0xA961
+};
+