+typedef struct\r
+{\r
+ uint16_t I2S_Mode;\r
+ uint16_t I2S_Standard;\r
+ uint16_t I2S_DataFormat;\r
+ uint16_t I2S_MCLKOutput;\r
+ uint16_t I2S_AudioFreq;\r
+ uint16_t I2S_CPOL;\r
+}I2S_InitTypeDef;\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_Exported_Constants\r
+ * @{\r
+ */\r
+\r
+#define IS_SPI_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == SPI1_BASE) || \\r
+ ((*(uint32_t*)&(PERIPH)) == SPI2_BASE) || \\r
+ ((*(uint32_t*)&(PERIPH)) == SPI3_BASE))\r
+#define IS_SPI_23_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == SPI2_BASE) || \\r
+ ((*(uint32_t*)&(PERIPH)) == SPI3_BASE))\r
+\r
+/** @defgroup SPI_data_direction_mode\r
+ * @{\r
+ */\r
+\r
+#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)\r
+#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)\r
+#define SPI_Direction_1Line_Rx ((uint16_t)0x8000)\r
+#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)\r
+#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \\r
+ ((MODE) == SPI_Direction_2Lines_RxOnly) || \\r
+ ((MODE) == SPI_Direction_1Line_Rx) || \\r
+ ((MODE) == SPI_Direction_1Line_Tx))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_master_slave_mode\r
+ * @{\r
+ */\r
+\r
+#define SPI_Mode_Master ((uint16_t)0x0104)\r
+#define SPI_Mode_Slave ((uint16_t)0x0000)\r
+#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \\r
+ ((MODE) == SPI_Mode_Slave))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_data_size\r
+ * @{\r
+ */\r
+\r
+#define SPI_DataSize_16b ((uint16_t)0x0800)\r
+#define SPI_DataSize_8b ((uint16_t)0x0000)\r
+#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \\r
+ ((DATASIZE) == SPI_DataSize_8b))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_Clock_Polarity\r
+ * @{\r
+ */\r
+\r
+#define SPI_CPOL_Low ((uint16_t)0x0000)\r
+#define SPI_CPOL_High ((uint16_t)0x0002)\r
+#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \\r
+ ((CPOL) == SPI_CPOL_High))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_Clock_Phase\r
+ * @{\r
+ */\r
+\r
+#define SPI_CPHA_1Edge ((uint16_t)0x0000)\r
+#define SPI_CPHA_2Edge ((uint16_t)0x0001)\r
+#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \\r
+ ((CPHA) == SPI_CPHA_2Edge))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_Slave_Select_management\r
+ * @{\r
+ */\r
+\r
+#define SPI_NSS_Soft ((uint16_t)0x0200)\r
+#define SPI_NSS_Hard ((uint16_t)0x0000)\r
+#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \\r
+ ((NSS) == SPI_NSS_Hard))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_BaudRate_Prescaler_\r
+ * @{\r
+ */\r
+\r
+#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)\r
+#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)\r
+#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)\r
+#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)\r
+#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)\r
+#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)\r
+#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)\r
+#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)\r
+#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \\r
+ ((PRESCALER) == SPI_BaudRatePrescaler_4) || \\r
+ ((PRESCALER) == SPI_BaudRatePrescaler_8) || \\r
+ ((PRESCALER) == SPI_BaudRatePrescaler_16) || \\r
+ ((PRESCALER) == SPI_BaudRatePrescaler_32) || \\r
+ ((PRESCALER) == SPI_BaudRatePrescaler_64) || \\r
+ ((PRESCALER) == SPI_BaudRatePrescaler_128) || \\r
+ ((PRESCALER) == SPI_BaudRatePrescaler_256))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_MSB_LSB_transmission\r
+ * @{\r
+ */\r
+\r
+#define SPI_FirstBit_MSB ((uint16_t)0x0000)\r
+#define SPI_FirstBit_LSB ((uint16_t)0x0080)\r
+#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \\r
+ ((BIT) == SPI_FirstBit_LSB))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2S_Mode\r
+ * @{\r
+ */\r
+\r
+#define I2S_Mode_SlaveTx ((uint16_t)0x0000)\r
+#define I2S_Mode_SlaveRx ((uint16_t)0x0100)\r
+#define I2S_Mode_MasterTx ((uint16_t)0x0200)\r
+#define I2S_Mode_MasterRx ((uint16_t)0x0300)\r
+#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \\r
+ ((MODE) == I2S_Mode_SlaveRx) || \\r
+ ((MODE) == I2S_Mode_MasterTx) || \\r
+ ((MODE) == I2S_Mode_MasterRx) )\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2S_Standard\r
+ * @{\r
+ */\r
+\r
+#define I2S_Standard_Phillips ((uint16_t)0x0000)\r
+#define I2S_Standard_MSB ((uint16_t)0x0010)\r
+#define I2S_Standard_LSB ((uint16_t)0x0020)\r
+#define I2S_Standard_PCMShort ((uint16_t)0x0030)\r
+#define I2S_Standard_PCMLong ((uint16_t)0x00B0)\r
+#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \\r
+ ((STANDARD) == I2S_Standard_MSB) || \\r
+ ((STANDARD) == I2S_Standard_LSB) || \\r
+ ((STANDARD) == I2S_Standard_PCMShort) || \\r
+ ((STANDARD) == I2S_Standard_PCMLong))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2S_Data_Format\r
+ * @{\r
+ */\r
+\r
+#define I2S_DataFormat_16b ((uint16_t)0x0000)\r
+#define I2S_DataFormat_16bextended ((uint16_t)0x0001)\r
+#define I2S_DataFormat_24b ((uint16_t)0x0003)\r
+#define I2S_DataFormat_32b ((uint16_t)0x0005)\r
+#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \\r
+ ((FORMAT) == I2S_DataFormat_16bextended) || \\r
+ ((FORMAT) == I2S_DataFormat_24b) || \\r
+ ((FORMAT) == I2S_DataFormat_32b))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2S_MCLK_Output\r
+ * @{\r
+ */\r
+\r
+#define I2S_MCLKOutput_Enable ((uint16_t)0x0200)\r
+#define I2S_MCLKOutput_Disable ((uint16_t)0x0000)\r
+#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \\r
+ ((OUTPUT) == I2S_MCLKOutput_Disable))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2S_Audio_Frequency\r
+ * @{\r
+ */\r
+\r
+#define I2S_AudioFreq_48k ((uint16_t)48000)\r
+#define I2S_AudioFreq_44k ((uint16_t)44100)\r
+#define I2S_AudioFreq_22k ((uint16_t)22050)\r
+#define I2S_AudioFreq_16k ((uint16_t)16000)\r
+#define I2S_AudioFreq_8k ((uint16_t)8000)\r
+#define I2S_AudioFreq_Default ((uint16_t)2)\r
+#define IS_I2S_AUDIO_FREQ(FREQ) (((FREQ) == I2S_AudioFreq_48k) || \\r
+ ((FREQ) == I2S_AudioFreq_44k) || \\r
+ ((FREQ) == I2S_AudioFreq_22k) || \\r
+ ((FREQ) == I2S_AudioFreq_16k) || \\r
+ ((FREQ) == I2S_AudioFreq_8k) || \\r
+ ((FREQ) == I2S_AudioFreq_Default))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2S_Clock_Polarity\r
+ * @{\r
+ */\r
+\r
+#define I2S_CPOL_Low ((uint16_t)0x0000)\r
+#define I2S_CPOL_High ((uint16_t)0x0008)\r
+#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \\r
+ ((CPOL) == I2S_CPOL_High))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_I2S_DMA_transfer_requests\r
+ * @{\r
+ */\r
+\r
+#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)\r
+#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)\r
+#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_NSS_internal_software_mangement\r
+ * @{\r
+ */\r
+\r
+#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)\r
+#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)\r
+#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \\r
+ ((INTERNAL) == SPI_NSSInternalSoft_Reset))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_CRC_Transmit_Receive\r
+ * @{\r
+ */\r
+\r
+#define SPI_CRC_Tx ((uint8_t)0x00)\r
+#define SPI_CRC_Rx ((uint8_t)0x01)\r
+#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_direction_transmit_receive\r
+ * @{\r
+ */\r
+\r
+#define SPI_Direction_Rx ((uint16_t)0xBFFF)\r
+#define SPI_Direction_Tx ((uint16_t)0x4000)\r
+#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \\r
+ ((DIRECTION) == SPI_Direction_Tx))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_I2S_interrupts_definition\r
+ * @{\r
+ */\r
+\r
+#define SPI_I2S_IT_TXE ((uint8_t)0x71)\r
+#define SPI_I2S_IT_RXNE ((uint8_t)0x60)\r
+#define SPI_I2S_IT_ERR ((uint8_t)0x50)\r
+#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \\r
+ ((IT) == SPI_I2S_IT_RXNE) || \\r
+ ((IT) == SPI_I2S_IT_ERR))\r
+#define SPI_I2S_IT_OVR ((uint8_t)0x56)\r
+#define SPI_IT_MODF ((uint8_t)0x55)\r
+#define SPI_IT_CRCERR ((uint8_t)0x54)\r
+#define I2S_IT_UDR ((uint8_t)0x53)\r
+#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))\r
+#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \\r
+ ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \\r
+ ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_I2S_flags_definition\r
+ * @{\r
+ */\r
+\r
+#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)\r
+#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)\r
+#define I2S_FLAG_CHSIDE ((uint16_t)0x0004)\r
+#define I2S_FLAG_UDR ((uint16_t)0x0008)\r
+#define SPI_FLAG_CRCERR ((uint16_t)0x0010)\r
+#define SPI_FLAG_MODF ((uint16_t)0x0020)\r
+#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)\r
+#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)\r
+#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))\r
+#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \\r
+ ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \\r
+ ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \\r
+ ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_CRC_polynomial\r
+ * @{\r
+ */\r
+\r
+#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_Exported_Macros\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_Exported_Functions\r
+ * @{\r
+ */\r
+\r
+void SPI_I2S_DeInit(SPI_TypeDef* SPIx);\r