-/*\r
- FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
- * *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
- * *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
- * *\r
- ***************************************************************************\r
-\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
- >>>NOTE<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
- more details. You should have received a copy of the GNU General Public\r
- License and the FreeRTOS license exception along with FreeRTOS; if not it\r
- can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
- by writing to Richard Barry, contact details for whom are available on the\r
- FreeRTOS WEB site.\r
-\r
- 1 tab == 4 spaces!\r
-\r
- http://www.FreeRTOS.org - Documentation, latest information, license and\r
- contact details.\r
-\r
- http://www.SafeRTOS.com - A version that is certified for use in safety\r
- critical systems.\r
-\r
- http://www.OpenRTOS.com - Commercial support, development, porting,\r
- licensing and training services.\r
-*/\r
-\r
-#define portNESTING_INTERRUPT_ENTRY() \\r
- __asm volatile ( \\r
- ".extern ulPortYieldRequired \t\n" \\r
- ".extern ulPortInterruptNesting \t\n" \\r
- ".extern FreeRTOS_SVC_Handler \t\n" \\r
- /* Return to the interrupted instruction. */ \\r
- "SUB LR, LR, #4 \t\n" \\r
- \\r
- /* Push the return address and SPSR. */ \\r
- "PUSH {LR} \t\n" \\r
- "MRS LR, SPSR \t\n" \\r
- "PUSH {LR} \t\n" \\r
- \\r
- /* Change to supervisor mode to allow reentry. */ \\r
- "CPS #0x13 \t\n" \\r
- \\r
- /* Push used registers. */ \\r
- "PUSH {r0-r4, r12} \t\n" \\r
- \\r
- /* Increment nesting count. r3 holds the address */ \\r
- /* of ulPortInterruptNesting future use. */ \\r
- "LDR r2, =ulPortInterruptNestingConst \t\n" \\r
- "LDR r3, [r2] \t\n" \\r
- \\r
- "LDR r1, [r3] \t\n" \\r
- "ADD r4, r1, #1 \t\n" \\r
- "STR r4, [r3] \t\n" \\r
- \\r
- /* Ensure bit 2 of the stack pointer is clear. */ \\r
- /* r2 holds the bit 2 value for future use. */ \\r
- "MOV r2, sp \t\n" \\r
- "AND r2, r2, #4 \t\n" \\r
- "SUB sp, sp, r2 \t\n" \\r
- \\r
- /* Call the interrupt handler. */ \\r
- "PUSH {r0-r3, LR} " \\r
- );\r
-\r
-#warning Why is ulPortYieldRequired accessed differently to the other variables?\r
-#warning R0 seems to being pushed even though it is not used.\r
-#warning Writing to the EOI register uses R4 on consecutive lines.\r
-\r
-\r
-#define portNESTING_INTERRUPT_EXIT() \\r
- __asm volatile ( \\r
- "POP {r0-r3, LR} \t\n" \\r
- "ADD sp, sp, r2 \t\n" \\r
- " \t\n" \\r
- "CPSID i \t\n" \\r
- "DSB \t\n" \\r
- "ISB \t\n" \\r
- " \t\n" \\r
- /* Write to the EOI register. */ \\r
- "LDR r4, ulICCEOIRConst \t\n" \\r
- "LDR r4, [r4] \t\n" \\r
- "STR r0, [r4] \t\n" \\r
- \\r
- /* Restore the old nesting count. */ \\r
- "STR r1, [r3] \t\n" \\r
- \\r
- /* A context switch is never performed if the */ \\r
- /* nesting count is not 0. */ \\r
- "CMP r1, #0 \t\n" \\r
- "BNE 1f \t\n" \\r
- \\r
- /* Did the interrupt request a context switch? */ \\r
- /* r1 holds the address of ulPortYieldRequired */ \\r
- /* and r0 the value of ulPortYieldRequired for */ \\r
- /* future use. */ \\r
- "LDR r1, =ulPortYieldRequired \t\n" \\r
- "LDR r0, [r1] \t\n" \\r
- "CMP r0, #0 \t\n" \\r
- "BNE 2f \t\n" \\r
- \\r
- "1: \t\n" \\r
- /* No context switch. Restore used registers, */ \\r
- /* LR_irq and SPSR before returning. 0x12 is IRQ */ \\r
- /* mode. */ \\r
- "POP {r0-r4, r12} \t\n" \\r
- "CPS #0x12 \t\n" \\r
- "POP {LR} \t\n" \\r
- "MSR SPSR_cxsf, LR \t\n" \\r
- "POP {LR} \t\n" \\r
- "MOVS PC, LR \t\n" \\r
- \\r
- "2: \t\n" \\r
- /* A context switch is to be performed. */ \\r
- /* Clear the context switch pending flag. */ \\r
- "MOV r0, #0 \t\n" \\r
- "STR r0, [r1] \t\n" \\r
- \\r
- /* Restore used registers, LR-irq and */ \\r
- /* SPSR before saving the context to the */ \\r
- /* task stack. 0x12 is IRQ mode. */ \\r
- "POP {r0-r4, r12} \t\n" \\r
- "CPS #0x12 \t\n" \\r
- "POP {LR} \t\n" \\r
- "MSR SPSR_cxsf, LR \t\n" \\r
- "POP {LR} \t\n" \\r
- "b FreeRTOS_SVC_Handler \t\n" \\r
- "ISB \t\n" \\r
- "ulICCEOIRConst: .word ulICCEOIR \t\n" \\r
- " ulPortInterruptNestingConst: .word ulPortInterruptNesting " \\r
- );\r
-\r