]> git.sur5r.net Git - openocd/commitdiff
nand flash support for s3c64xx
authorPeter Korsgaard <jacmet@sunsite.dk>
Mon, 11 Jan 2010 21:59:29 +0000 (22:59 +0100)
committerØyvind Harboe <oyvind.harboe@zylin.com>
Thu, 14 Jan 2010 20:07:46 +0000 (21:07 +0100)
Identical to the existing 2412/2443 support except for the base address
and NFCONF value (bit 2 is reserved and should be written as 1 ref UM).

Tested on a s3c6410 board, but controller is identical in 6400/6410
except for 8bit MLC ECC support in 6410 which isn't supported by the
driver.

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
doc/openocd.texi
src/flash/nand/Makefile.am
src/flash/nand/driver.c
src/flash/nand/s3c6400.c [new file with mode: 0644]

index 444604621d03f7ad9449dd1f3af378d61cb1d221..a0fc0fb6d6e9111a75e6badf8fd26f37a887c095 100644 (file)
@@ -5041,7 +5041,8 @@ change any behavior.
 @deffnx {NAND Driver} s3c2412
 @deffnx {NAND Driver} s3c2440
 @deffnx {NAND Driver} s3c2443
-These S3C24xx family controllers don't have any special
+@deffnx {NAND Driver} s3c6400
+These S3C family controllers don't have any special
 @command{nand device} options, and don't define any
 specialized commands.
 At this writing, their drivers don't include @code{write_page}
index 2ffa4c49cd4162dc652f6d91309d7adb10fe116b..a495dfdceec9cb4ee11966888e2446035e4d0a57 100644 (file)
@@ -25,6 +25,7 @@ NAND_DRIVERS = \
        s3c2412.c \
        s3c2440.c \
        s3c2443.c \
+       s3c6400.c \
        at91sam9.c
 
 noinst_HEADERS = \
index 0e174b232d7d42a2c43b58574500b01992f49312..1c28dbc88c2a683368b03c58ffb5db42a142ae58 100644 (file)
@@ -36,6 +36,7 @@ extern struct nand_flash_controller s3c2410_nand_controller;
 extern struct nand_flash_controller s3c2412_nand_controller;
 extern struct nand_flash_controller s3c2440_nand_controller;
 extern struct nand_flash_controller s3c2443_nand_controller;
+extern struct nand_flash_controller s3c6400_nand_controller;
 extern struct nand_flash_controller imx31_nand_flash_controller;
 extern struct nand_flash_controller at91sam9_nand_controller;
 
@@ -51,6 +52,7 @@ static struct nand_flash_controller *nand_flash_controllers[] =
        &s3c2412_nand_controller,
        &s3c2440_nand_controller,
        &s3c2443_nand_controller,
+       &s3c6400_nand_controller,
        &imx31_nand_flash_controller,
        &at91sam9_nand_controller,
 /*     &boundary_scan_nand_controller, */
diff --git a/src/flash/nand/s3c6400.c b/src/flash/nand/s3c6400.c
new file mode 100644 (file)
index 0000000..20b6cc1
--- /dev/null
@@ -0,0 +1,76 @@
+/***************************************************************************
+ *   Copyright (C) 2010 by Peter Korsgaard <jacmet@sunsite.dk>             *
+ *   Heavily based on s3c2412.c by Ben Dooks <ben@fluff.org>               *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "s3c24xx.h"
+/* s3c64xx uses another base address for the nand controller than 24xx */
+#undef S3C2410_NFREG
+#define S3C2410_NFREG(x) ((x) + 0x70200000)
+
+NAND_DEVICE_COMMAND_HANDLER(s3c6400_nand_device_command)
+{
+       struct s3c24xx_nand_controller *info;
+       CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
+
+       /* fill in the address fields for the core device */
+       info->cmd = S3C2440_NFCMD;
+       info->addr = S3C2440_NFADDR;
+       info->data = S3C2440_NFDATA;
+       info->nfstat = S3C2412_NFSTAT;
+
+       return ERROR_OK;
+}
+
+static int s3c6400_init(struct nand_device *nand)
+{
+       struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
+       struct target *target = s3c24xx_info->target;
+
+       target_write_u32(target, S3C2410_NFCONF,
+                        S3C2440_NFCONF_TACLS(3) |
+                        S3C2440_NFCONF_TWRPH0(7) |
+                        S3C2440_NFCONF_TWRPH1(7) | 4);
+
+       target_write_u32(target, S3C2440_NFCONT,
+                        S3C2412_NFCONT_INIT_MAIN_ECC |
+                        S3C2440_NFCONT_ENABLE);
+
+       return ERROR_OK;
+}
+
+struct nand_flash_controller s3c6400_nand_controller = {
+               .name = "s3c6400",
+               .nand_device_command = &s3c6400_nand_device_command,
+               .init = &s3c6400_init,
+               .reset = &s3c24xx_reset,
+               .command = &s3c24xx_command,
+               .address = &s3c24xx_address,
+               .write_data = &s3c24xx_write_data,
+               .read_data = &s3c24xx_read_data,
+               .write_page = s3c24xx_write_page,
+               .read_page = s3c24xx_read_page,
+               .write_block_data = &s3c2440_write_block_data,
+               .read_block_data = &s3c2440_read_block_data,
+               .controller_ready = &s3c24xx_controller_ready,
+               .nand_ready = &s3c2440_nand_ready,
+       };