--- /dev/null
+/*\r
+ FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation and modified by the FreeRTOS exception.\r
+ **NOTE** The exception to the GPL is included to allow you to distribute a\r
+ combined work that includes FreeRTOS without being obliged to provide the\r
+ source code for proprietary components outside of the FreeRTOS kernel.\r
+ Alternative commercial license and support terms are also available upon\r
+ request. See the licensing section of http://www.FreeRTOS.org for full\r
+ license details.\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details.\r
+\r
+ You should have received a copy of the GNU General Public License along\r
+ with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
+ Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Looking for a quick start? Then check out the FreeRTOS eBook! *\r
+ * See http://www.FreeRTOS.org/Documentation for details *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/*-----------------------------------------------------------\r
+ * Implementation of functions defined in portable.h for the ARM CM3 port.\r
+ *----------------------------------------------------------*/\r
+\r
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining\r
+all the API functions to use the MPU wrappers. That should only be done when\r
+task.h is included from an application file. */\r
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "queue.h"\r
+\r
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
+\r
+/* Constants required to access and manipulate the NVIC. */\r
+#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned portLONG * ) 0xe000e010 )\r
+#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned portLONG * ) 0xe000e014 )\r
+#define portNVIC_SYSPRI2 ( ( volatile unsigned portLONG * ) 0xe000ed20 )\r
+#define portNVIC_SYSPRI1 ( ( volatile unsigned portLONG * ) 0xe000ed1c )\r
+#define portNVIC_SYS_CTRL_STATE ( ( volatile unsigned portLONG * ) 0xe000ed24 )\r
+#define portNVIC_MEM_FAULT_ENABLE ( 1UL << 16UL )\r
+\r
+/* Constants required to access and manipulate the MPU. */\r
+#define portMPU_TYPE ( ( volatile unsigned portLONG * ) 0xe000ed90 )\r
+#define portMPU_REGION_BASE_ADDRESS ( ( volatile unsigned portLONG * ) 0xe000ed9C )\r
+#define portMPU_REGION_ATTRIBUTE ( ( volatile unsigned portLONG * ) 0xe000edA0 )\r
+#define portMPU_CTRL ( ( volatile unsigned portLONG * ) 0xe000ed94 )\r
+#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */\r
+#define portMPU_ENABLE ( 0x01UL )\r
+#define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL )\r
+#define portPRIVILEGED_EXECUTION_START_ADDRESS ( 0UL )\r
+#define portMPU_REGION_VALID ( 0x10UL )\r
+#define portMPU_REGION_ENABLE ( 0x01UL )\r
+#define portPERIPHERALS_START_ADDRESS 0x40000000UL\r
+#define portPERIPHERALS_END_ADDRESS 0x5FFFFFFFUL\r
+\r
+/* Constants required to access and manipulate the SysTick. */\r
+#define portNVIC_SYSTICK_CLK ( 0x00000004UL )\r
+#define portNVIC_SYSTICK_INT ( 0x00000002UL )\r
+#define portNVIC_SYSTICK_ENABLE ( 0x00000001UL )\r
+#define portNVIC_PENDSV_PRI ( ( ( unsigned portLONG ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
+#define portNVIC_SYSTICK_PRI ( ( ( unsigned portLONG ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
+#define portNVIC_SVC_PRI ( ( ( unsigned portLONG ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
+#define portNVIC_TEMP_SVC_PRI ( 0x01UL << 24UL )\r
+\r
+/* Constants required to set up the initial stack. */\r
+#define portINITIAL_XPSR ( 0x01000000 )\r
+#define portINITIAL_CONTROL_IF_UNPRIVILEGED ( 0x03 )\r
+#define portINITIAL_CONTROL_IF_PRIVILEGED ( 0x02 )\r
+\r
+/* Offsets in the stack to the parameters when inside the SVC handler. */\r
+#define portOFFSET_TO_PC ( 6 )\r
+\r
+/* Set the privilege level to user mode if xRunningPrivileged is false. */\r
+#define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " )\r
+\r
+/* Each task maintains its own interrupt status in the critical nesting\r
+variable. Note this is not saved as part of the task context as context\r
+switches can only occur when uxCriticalNesting is zero. */\r
+static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
+\r
+/*\r
+ * Setup the timer to generate the tick interrupts.\r
+ */\r
+static void prvSetupTimerInterrupt( void );\r
+\r
+/*\r
+ * Configure a number of standard MPU regions that are used by all tasks.\r
+ */\r
+static void prvSetupMPU( void );\r
+\r
+/* \r
+ * Return the smallest MPU region size that a given number of bytes will fit\r
+ * into. The region size is returned as the value that should be programmed\r
+ * into the region attribute register for that region.\r
+ */\r
+static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes );\r
+\r
+/* \r
+ * Checks to see if being called from the context of an unprivileged task, and\r
+ * if so raises the privilege level and returns false - otherwise does nothing\r
+ * other than return true.\r
+ */\r
+portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));\r
+\r
+/*\r
+ * Standard FreeRTOS exception handlers.\r
+ */\r
+void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
+void xPortSysTickHandler( void ) __attribute__ ((optimize("3")));\r
+void vPortSVCHandler( void ) __attribute__ (( naked ));\r
+\r
+/*\r
+ * Starts the scheduler by restoring the context of the first task to run.\r
+ */\r
+static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked ));\r
+\r
+/*\r
+ * C portion of the SVC handler. The SVC handler is split between an asm entry\r
+ * and a C wrapper for simplicity of coding and maintenance.\r
+ */\r
+static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__ ((optimize("3")));\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * See header file for description.\r
+ */\r
+portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )\r
+{\r
+ /* Simulate the stack frame as it would be created by a context switch\r
+ interrupt. */\r
+ *pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0; /* LR */\r
+ pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
+ *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
+\r
+ if( xRunPrivileged == pdTRUE )\r
+ {\r
+ *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;\r
+ }\r
+ else\r
+ {\r
+ *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;\r
+ }\r
+\r
+ return pxTopOfStack;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortSVCHandler( void )\r
+{\r
+ /* Assumes psp was in use. */\r
+ __asm volatile \r
+ (\r
+ #ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */\r
+ " tst lr, #4 \n"\r
+ " ite eq \n"\r
+ " mrseq r0, msp \n"\r
+ " mrsne r0, psp \n"\r
+ #else\r
+ " mrs r0, psp \n"\r
+ #endif\r
+ " b prvSVCHandler \n"\r
+ );\r
+\r
+ /* This will never get executed, but is required to prevent prvSVCHandler\r
+ being removed by the optimiser. */\r
+ prvSVCHandler( NULL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSVCHandler( unsigned long *pulParam )\r
+{\r
+unsigned char ucSVCNumber;\r
+\r
+ /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and\r
+ xPSR. The first argument (r0) is pulParam[ 0 ]. */\r
+ ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];\r
+ switch( ucSVCNumber )\r
+ {\r
+ case portSVC_START_SCHEDULER : *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;\r
+ prvRestoreContextOfFirstTask();\r
+ break;\r
+\r
+ case portSVC_YIELD : *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
+ break;\r
+\r
+ case portSVC_prvRaisePrivilege : __asm volatile \r
+ (\r
+ " mrs r1, control \n" /* Obtain current control value. */\r
+ " bic r1, #1 \n" /* Set privilege bit. */\r
+ " msr control, r1 \n" /* Write back new control value. */\r
+ );\r
+ break;\r
+\r
+ default : /* Unknown SVC call. */\r
+ break;\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvRestoreContextOfFirstTask( void )\r
+{\r
+ __asm volatile \r
+ (\r
+ " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */\r
+ " ldr r0, [r0] \n"\r
+ " ldr r0, [r0] \n"\r
+ " msr msp, r0 \n" /* Set the msp back to the start of the stack. */\r
+ " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */\r
+ " ldr r1, [r3] \n"\r
+ " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */\r
+ " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */\r
+ " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */\r
+ " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */\r
+ " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */\r
+ " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */\r
+ " msr control, r3 \n"\r
+ " msr psp, r0 \n" /* Restore the task stack pointer. */\r
+ " mov r0, #0 \n"\r
+ " msr basepri, r0 \n"\r
+ " ldr r14, =0xfffffffd \n" /* Load exec return code. */\r
+ " bx r14 \n"\r
+ " \n"\r
+ " .align 2 \n"\r
+ "pxCurrentTCBConst2: .word pxCurrentTCB \n"\r
+ );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * See header file for description.\r
+ */\r
+portBASE_TYPE xPortStartScheduler( void )\r
+{\r
+ /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
+ *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
+ *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
+ *(portNVIC_SYSPRI1) |= portNVIC_TEMP_SVC_PRI;\r
+\r
+ /* Configure the regions in the MPU that are common to all tasks. */\r
+ prvSetupMPU();\r
+\r
+ /* Start the timer that generates the tick ISR. Interrupts are disabled\r
+ here already. */\r
+ prvSetupTimerInterrupt();\r
+\r
+ /* Initialise the critical nesting count ready for the first task. */\r
+ uxCriticalNesting = 0;\r
+\r
+ /* Start the first task. */\r
+ __asm volatile( " svc %0 \n"\r
+ :: "i" (portSVC_START_SCHEDULER) );\r
+\r
+ /* Should not get here! */\r
+ return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEndScheduler( void )\r
+{\r
+ /* It is unlikely that the CM3 port will require this function as there\r
+ is nothing to return to. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEnterCritical( void )\r
+{\r
+portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ portDISABLE_INTERRUPTS();\r
+ uxCriticalNesting++;\r
+\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortExitCritical( void )\r
+{\r
+portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ uxCriticalNesting--;\r
+ if( uxCriticalNesting == 0 )\r
+ {\r
+ portENABLE_INTERRUPTS();\r
+ }\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void xPortPendSVHandler( void )\r
+{\r
+ /* This is a naked function. */\r
+\r
+ __asm volatile\r
+ (\r
+ " mrs r0, psp \n"\r
+ " \n"\r
+ " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */\r
+ " ldr r2, [r3] \n"\r
+ " \n"\r
+ " mrs r1, control \n"\r
+ " stmdb r0!, {r1, r4-r11} \n" /* Save the remaining registers. */\r
+ " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */\r
+ " \n"\r
+ " stmdb sp!, {r3, r14} \n"\r
+ " mov r0, %0 \n"\r
+ " msr basepri, r0 \n"\r
+ " bl vTaskSwitchContext \n"\r
+ " mov r0, #0 \n"\r
+ " msr basepri, r0 \n"\r
+ " ldmia sp!, {r3, r14} \n"\r
+ " \n" /* Restore the context. */\r
+ " ldr r1, [r3] \n"\r
+ " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */\r
+ " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */\r
+ " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */\r
+ " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */\r
+ " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */\r
+ " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */\r
+ " msr control, r3 \n"\r
+ " \n"\r
+ " msr psp, r0 \n"\r
+ " bx r14 \n"\r
+ " \n"\r
+ " .align 2 \n"\r
+ "pxCurrentTCBConst: .word pxCurrentTCB \n"\r
+ ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
+ );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void xPortSysTickHandler( void )\r
+{\r
+unsigned portLONG ulDummy;\r
+\r
+ /* If using preemption, also force a context switch. */\r
+ #if configUSE_PREEMPTION == 1\r
+ *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
+ #endif\r
+\r
+ ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
+ {\r
+ vTaskIncrementTick();\r
+ }\r
+ portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Setup the systick timer to generate the tick interrupts at the required\r
+ * frequency.\r
+ */\r
+static void prvSetupTimerInterrupt( void )\r
+{\r
+ /* Configure SysTick to interrupt at the requested rate. */\r
+ *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
+ *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetupMPU( void )\r
+{\r
+extern unsigned long __privileged_functions_end__[];\r
+extern unsigned long __FLASH_segment_start__[];\r
+extern unsigned long __FLASH_segment_end__[];\r
+extern unsigned long __privileged_data_start__[];\r
+extern unsigned long __privileged_data_end__[];\r
+\r
+ /* Check the expected MPU is present. */\r
+ if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )\r
+ {\r
+ /* First setup the entire flash for unprivileged read only access. */\r
+ *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
+ ( portMPU_REGION_VALID ) |\r
+ ( portUNPRIVILEGED_FLASH_REGION ); \r
+\r
+ *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_ONLY ) |\r
+ ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
+ ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
+ ( portMPU_REGION_ENABLE );\r
+\r
+ /* Setup the first 16K for privileged only access (even though less \r
+ than 10K is actually being used). This is where the kernel code is\r
+ placed. */\r
+ *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
+ ( portMPU_REGION_VALID ) |\r
+ ( portPRIVILEGED_FLASH_REGION );\r
+\r
+ *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |\r
+ ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | \r
+ ( prvGetMPURegionSizeSetting( __privileged_functions_end__ - __FLASH_segment_start__ ) ) | \r
+ ( portMPU_REGION_ENABLE );\r
+\r
+ /* Setup the privileged data RAM region. This is where the kernel data\r
+ is placed. */\r
+ *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
+ ( portMPU_REGION_VALID ) |\r
+ ( portPRIVILEGED_RAM_REGION );\r
+\r
+ *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
+ ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
+ prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
+ ( portMPU_REGION_ENABLE );\r
+\r
+ /* By default allow everything to access the general peripherals. The\r
+ system peripherals and registers are protected. */\r
+ *portMPU_REGION_BASE_ADDRESS = ( portPERIPHERALS_START_ADDRESS ) |\r
+ ( portMPU_REGION_VALID ) |\r
+ ( portGENERAL_PERIPHERALS_REGION ); \r
+\r
+ *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |\r
+ ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |\r
+ ( portMPU_REGION_ENABLE );\r
+\r
+ /* Enable the memory fault exception. */\r
+ *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;\r
+\r
+ /* Enable the MPU with the background region configured. */\r
+ *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )\r
+{\r
+unsigned long ulRegionSize, ulReturnValue = 4;\r
+\r
+ /* 32 is the smallest region size, 31 is the largest valid value for\r
+ ulReturnValue. */\r
+ for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )\r
+ {\r
+ if( ulActualSizeInBytes <= ulRegionSize )\r
+ {\r
+ break;\r
+ }\r
+ else\r
+ {\r
+ ulReturnValue++;\r
+ }\r
+ }\r
+\r
+ /* Shift the code by one before returning so it can be written directly\r
+ into the the correct bit position of the attribute register. */\r
+ return ( ulReturnValue << 1UL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE prvRaisePrivilege( void )\r
+{\r
+ __asm volatile\r
+ ( \r
+ " mrs r0, control \n"\r
+ " tst r0, #1 \n" /* Is the task running privileged? */\r
+ " itte ne \n"\r
+ " movne r0, #0 \n" /* CONTROL[0]!=0, return false. */\r
+ " svcne %0 \n" /* Switch to privileged. */\r
+ " moveq r0, #1 \n" /* CONTROL[0]==0, return true. */\r
+ " bx lr \n"\r
+ :: "i" (portSVC_prvRaisePrivilege) : "r0" \r
+ );\r
+\r
+ return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned portSHORT usStackDepth )\r
+{\r
+extern unsigned long __SRAM_segment_start__[];\r
+extern unsigned long __SRAM_segment_end__[];\r
+long lIndex;\r
+unsigned long ul;\r
+\r
+ if( xRegions == NULL )\r
+ {\r
+ /* No MPU regions are specified to allow access to all RAM. */\r
+ xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress = \r
+ ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */\r
+ ( portMPU_REGION_VALID ) |\r
+ ( portSTACK_REGION );\r
+\r
+ xMPUSettings->xRegion[ 0 ].ulRegionAttribute = \r
+ ( portMPU_REGION_READ_WRITE ) | \r
+ ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
+ ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |\r
+ ( portMPU_REGION_ENABLE );\r
+\r
+ /* Invalidate all other regions. */\r
+ for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
+ {\r
+ xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; \r
+ xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
+ }\r
+ }\r
+ else\r
+ {\r
+ /* This function is called automatically when the task is created - in\r
+ which case the stack region parameters will be valid. At all other\r
+ times the stack parameters will not be valid and it is assumed that the\r
+ stack region has already been configured. */\r
+ if( usStackDepth > 0 )\r
+ {\r
+ /* Define the region that allows access to the stack. */\r
+ xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress = \r
+ ( ( unsigned long ) pxBottomOfStack ) | \r
+ ( portMPU_REGION_VALID ) |\r
+ ( portSTACK_REGION ); /* Region number. */\r
+\r
+ xMPUSettings->xRegion[ 0 ].ulRegionAttribute = \r
+ ( portMPU_REGION_READ_WRITE ) | /* Read and write. */\r
+ ( prvGetMPURegionSizeSetting( usStackDepth * sizeof( portSTACK_TYPE ) ) ) |\r
+ ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
+ ( portMPU_REGION_ENABLE );\r
+ }\r
+\r
+ lIndex = 0;\r
+\r
+ for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
+ {\r
+ if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )\r
+ {\r
+ /* Translate the generic region definition contained in \r
+ xRegions into the CM3 specific MPU settings that are then \r
+ stored in xMPUSettings. */\r
+ xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = \r
+ ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) | \r
+ ( portMPU_REGION_VALID ) |\r
+ ( portSTACK_REGION + ul ); /* Region number. */\r
+\r
+ xMPUSettings->xRegion[ ul ].ulRegionAttribute = \r
+ ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) | \r
+ ( xRegions[ lIndex ].ulParameters ) | \r
+ ( portMPU_REGION_ENABLE ); \r
+ }\r
+ else\r
+ {\r
+ /* Invalidate the region. */\r
+ xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID; \r
+ xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
+ }\r
+\r
+ lIndex++;\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed portCHAR * const pcName, unsigned portSHORT usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )\r
+{\r
+signed portBASE_TYPE xReturn;\r
+portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )\r
+{\r
+portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ vTaskAllocateMPURegions( xTask, xRegions );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_vTaskDelete == 1 )\r
+ void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ vTaskDelete( pxTaskToDelete );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_vTaskDelayUntil == 1 )\r
+ void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_vTaskDelay == 1 )\r
+ void MPU_vTaskDelay( portTickType xTicksToDelay )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ vTaskDelay( xTicksToDelay );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_uxTaskPriorityGet == 1 )\r
+ unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )\r
+ {\r
+ unsigned portBASE_TYPE uxReturn;\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ uxReturn = uxTaskPriorityGet( pxTask );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return uxReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_vTaskPrioritySet == 1 )\r
+ void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ vTaskPrioritySet( pxTask, uxNewPriority );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_vTaskSuspend == 1 )\r
+ void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ vTaskSuspend( pxTaskToSuspend );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_vTaskSuspend == 1 )\r
+ signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )\r
+ {\r
+ signed portBASE_TYPE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = xTaskIsTaskSuspended( xTask );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_vTaskSuspend == 1 )\r
+ void MPU_vTaskResume( xTaskHandle pxTaskToResume )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ vTaskResume( pxTaskToResume );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+void MPU_vTaskSuspendAll( void )\r
+{\r
+portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ vTaskSuspendAll();\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE MPU_xTaskResumeAll( void )\r
+{\r
+signed portBASE_TYPE xReturn;\r
+portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = xTaskResumeAll();\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portTickType MPU_xTaskGetTickCount( void )\r
+{\r
+portTickType xReturn;\r
+portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = xTaskGetTickCount();\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )\r
+{\r
+unsigned portBASE_TYPE uxReturn;\r
+portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ uxReturn = uxTaskGetNumberOfTasks();\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return uxReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void MPU_vTaskList( signed portCHAR *pcWriteBuffer )\r
+{\r
+portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ vTaskList( pcWriteBuffer );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+}\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configGENERATE_RUN_TIME_STATS == 1 )\r
+ void MPU_vTaskGetRunTimeStats( signed portCHAR *pcWriteBuffer )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ vTaskGetRunTimeStats( pcWriteBuffer );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_TRACE_FACILITY == 1 )\r
+ void MPU_vTaskStartTrace( signed portCHAR * pcBuffer, unsigned portLONG ulBufferSize )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ vTaskStartTrace( pcBuffer, ulBufferSize );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_TRACE_FACILITY == 1 )\r
+ unsigned portLONG MPU_ulTaskEndTrace( void )\r
+ {\r
+ unsigned portLONG ulReturn;\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ ulReturn = ulTaskEndTrace();\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return ulReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
+ void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ vTaskSetApplicationTaskTag( xTask, pxTagValue );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
+ pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )\r
+ {\r
+ pdTASK_HOOK_CODE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = xTaskGetApplicationTaskTag( xTask );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
+ portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )\r
+ {\r
+ portBASE_TYPE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )\r
+ unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )\r
+ {\r
+ unsigned portBASE_TYPE uxReturn;\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ uxReturn = uxTaskGetStackHighWaterMark( xTask );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return uxReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )\r
+ xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )\r
+ {\r
+ xTaskHandle xReturn;\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = xTaskGetCurrentTaskHandle();\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_xTaskGetSchedulerState == 1 )\r
+ portBASE_TYPE MPU_xTaskGetSchedulerState( void )\r
+ {\r
+ portBASE_TYPE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = xTaskGetSchedulerState();\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize )\r
+{\r
+xQueueHandle xReturn;\r
+portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = xQueueCreate( uxQueueLength, uxItemSize );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
+{\r
+signed portBASE_TYPE xReturn;\r
+portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )\r
+{\r
+portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+unsigned portBASE_TYPE uxReturn;\r
+\r
+ uxReturn = uxQueueMessagesWaiting( pxQueue );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return uxReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
+{\r
+portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+signed portBASE_TYPE xReturn;\r
+\r
+ xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_MUTEXES == 1 )\r
+ xQueueHandle MPU_xQueueCreateMutex( void )\r
+ {\r
+ xQueueHandle xReturn;\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = xQueueCreateMutex();\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if configUSE_COUNTING_SEMAPHORES == 1\r
+ xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )\r
+ {\r
+ xQueueHandle xReturn;\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = xQueueHandle xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_MUTEXES == 1 )\r
+ portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )\r
+ {\r
+ portBASE_TYPE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_MUTEXES == 1 )\r
+ portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )\r
+ {\r
+ portBASE_TYPE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = xQueueGiveMutexRecursive( xMutex );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if configUSE_ALTERNATIVE_API == 1\r
+ signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
+ {\r
+ signed portBASE_TYPE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if configUSE_ALTERNATIVE_API == 1\r
+ signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
+ {\r
+ signed portBASE_TYPE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if configQUEUE_REGISTRY_SIZE > 0\r
+ void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed portCHAR *pcName )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ vQueueAddToRegistry( xQueue, pcName );\r
+\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+void *MPU_pvPortMalloc( size_t xSize )\r
+{\r
+void *pvReturn;\r
+portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ pvReturn = pvPortMalloc( xSize );\r
+\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+\r
+ return pvReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void MPU_vPortFree( void *pv )\r
+{\r
+portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
+\r
+ vPortFree( pv );\r
+\r
+ portRESET_PRIVILEGE( xRunningPrivileged );\r
+}\r
projects / freertos / commitdiff