]> git.sur5r.net Git - freertos/commitdiff
Update the CM3 MPU port so it builds with the changes made to enable the FreeRTOS...
authorrichardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Mon, 2 Apr 2012 18:33:46 +0000 (18:33 +0000)
committerrichardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Mon, 2 Apr 2012 18:33:46 +0000 (18:33 +0000)
git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1718 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

Source/include/mpu_wrappers.h
Source/portable/GCC/ARM_CM3_MPU/port.c

index 767a3e6f32da94312947758e971493fb04b4c3ef..94fe1ed9e07a6e1bdd0007ea9a7a039e6554bd05 100644 (file)
@@ -88,7 +88,7 @@ only for ports that are using the MPU. */
                #define xTaskGetCurrentTaskHandle               MPU_xTaskGetCurrentTaskHandle\r
                #define xTaskGetSchedulerState                  MPU_xTaskGetSchedulerState\r
 \r
-               #define xQueueCreate                                    MPU_xQueueCreate\r
+               #define xQueueGenericCreate                             MPU_xQueueGenericCreate\r
                #define xQueueCreateMutex                               MPU_xQueueCreateMutex\r
                #define xQueueGiveMutexRecursive                MPU_xQueueGiveMutexRecursive\r
                #define xQueueTakeMutexRecursive                MPU_xQueueTakeMutexRecursive\r
index 4dbcb7af2eff9af4fb520d1b68a153fe841b66e7..4801a2e892cfc273675a69adf097eefecbcae522 100644 (file)
@@ -1,6 +1,6 @@
 /*\r
     FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
-       \r
+\r
 \r
     ***************************************************************************\r
      *                                                                       *\r
@@ -123,14 +123,14 @@ static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
  */\r
 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;\r
 \r
-/* \r
+/*\r
  * Return the smallest MPU region size that a given number of bytes will fit\r
  * into.  The region size is returned as the value that should be programmed\r
  * into the region attribute register for that region.\r
  */\r
 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;\r
 \r
-/* \r
+/*\r
  * Checks to see if being called from the context of an unprivileged task, and\r
  * if so raises the privilege level and returns false - otherwise does nothing\r
  * other than return true.\r
@@ -182,7 +182,7 @@ portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParam
 unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask );\r
 xTaskHandle MPU_xTaskGetCurrentTaskHandle( void );\r
 portBASE_TYPE MPU_xTaskGetSchedulerState( void );\r
-xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize );\r
+xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType );\r
 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue );\r
 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
@@ -233,7 +233,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
 void vPortSVCHandler( void )\r
 {\r
        /* Assumes psp was in use. */\r
-       __asm volatile \r
+       __asm volatile\r
        (\r
                #ifndef USE_PROCESS_STACK       /* Code should not be required if a main() is using the process stack. */\r
                        "       tst lr, #4                                              \n"\r
@@ -269,7 +269,7 @@ unsigned char ucSVCNumber;
                case portSVC_YIELD                              :       *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
                                                                                        break;\r
 \r
-               case portSVC_RAISE_PRIVILEGE    :       __asm volatile \r
+               case portSVC_RAISE_PRIVILEGE    :       __asm volatile\r
                                                                                        (\r
                                                                                                "       mrs r1, control         \n" /* Obtain current control value. */\r
                                                                                                "       bic r1, #1                      \n" /* Set privilege bit. */\r
@@ -286,7 +286,7 @@ unsigned char ucSVCNumber;
 \r
 static void prvRestoreContextOfFirstTask( void )\r
 {\r
-       __asm volatile \r
+       __asm volatile\r
        (\r
                "       ldr r0, =0xE000ED08                             \n" /* Use the NVIC offset register to locate the stack. */\r
                "       ldr r0, [r0]                                    \n"\r
@@ -457,14 +457,14 @@ extern unsigned long __privileged_data_end__[];
                /* First setup the entire flash for unprivileged read only access. */\r
         *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
                                                                                ( portMPU_REGION_VALID ) |\r
-                                                                               ( portUNPRIVILEGED_FLASH_REGION ); \r
+                                                                               ( portUNPRIVILEGED_FLASH_REGION );\r
 \r
                *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_ONLY ) |\r
                                                                                ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
                                                                                ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
                                                                                ( portMPU_REGION_ENABLE );\r
 \r
-               /* Setup the first 16K for privileged only access (even though less \r
+               /* Setup the first 16K for privileged only access (even though less\r
                than 10K is actually being used).  This is where the kernel code is\r
                placed. */\r
         *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
@@ -472,8 +472,8 @@ extern unsigned long __privileged_data_end__[];
                                                                                ( portPRIVILEGED_FLASH_REGION );\r
 \r
                *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |\r
-                                                                               ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | \r
-                                                                               ( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) | \r
+                                                                               ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
+                                                                               ( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
                                                                                ( portMPU_REGION_ENABLE );\r
 \r
                /* Setup the privileged data RAM region.  This is where the kernel data\r
@@ -491,7 +491,7 @@ extern unsigned long __privileged_data_end__[];
                system peripherals and registers are protected. */\r
                *portMPU_REGION_BASE_ADDRESS =  ( portPERIPHERALS_START_ADDRESS ) |\r
                                                                                ( portMPU_REGION_VALID ) |\r
-                                                                               ( portGENERAL_PERIPHERALS_REGION ); \r
+                                                                               ( portGENERAL_PERIPHERALS_REGION );\r
 \r
                *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |\r
                                                                                ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |\r
@@ -533,7 +533,7 @@ unsigned long ulRegionSize, ulReturnValue = 4;
 static portBASE_TYPE prvRaisePrivilege( void )\r
 {\r
        __asm volatile\r
-       ( \r
+       (\r
                "       mrs r0, control                                         \n"\r
                "       tst r0, #1                                                      \n" /* Is the task running privileged? */\r
                "       itte ne                                                         \n"\r
@@ -541,7 +541,7 @@ static portBASE_TYPE prvRaisePrivilege( void )
                "       svcne %0                                                        \n" /* Switch to privileged. */\r
                "       moveq r0, #1                                            \n" /* CONTROL[0]==0, return true. */\r
                "       bx lr                                                           \n"\r
-               :: "i" (portSVC_RAISE_PRIVILEGE) : "r0" \r
+               :: "i" (portSVC_RAISE_PRIVILEGE) : "r0"\r
        );\r
 \r
        return 0;\r
@@ -560,34 +560,34 @@ unsigned long ul;
        if( xRegions == NULL )\r
        {\r
                /* No MPU regions are specified so allow access to all RAM. */\r
-        xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =       \r
+        xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
                                ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */\r
                                ( portMPU_REGION_VALID ) |\r
                                ( portSTACK_REGION );\r
 \r
-               xMPUSettings->xRegion[ 0 ].ulRegionAttribute =  \r
-                               ( portMPU_REGION_READ_WRITE ) | \r
+               xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
+                               ( portMPU_REGION_READ_WRITE ) |\r
                                ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
                                ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |\r
                                ( portMPU_REGION_ENABLE );\r
 \r
                /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have\r
                just removed the privileged only parameters. */\r
-               xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =        \r
+               xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =\r
                                ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
                                ( portMPU_REGION_VALID ) |\r
                                ( portSTACK_REGION + 1 );\r
 \r
-               xMPUSettings->xRegion[ 1 ].ulRegionAttribute =          \r
+               xMPUSettings->xRegion[ 1 ].ulRegionAttribute =\r
                                ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
                                ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
                                prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
                                ( portMPU_REGION_ENABLE );\r
-                               \r
+\r
                /* Invalidate all other regions. */\r
                for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
-               { \r
-                       xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;     \r
+               {\r
+                       xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;\r
                        xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
                }\r
        }\r
@@ -600,12 +600,12 @@ unsigned long ul;
                if( usStackDepth > 0 )\r
                {\r
                        /* Define the region that allows access to the stack. */\r
-                       xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =        \r
-                                       ( ( unsigned long ) pxBottomOfStack ) | \r
+                       xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =\r
+                                       ( ( unsigned long ) pxBottomOfStack ) |\r
                                        ( portMPU_REGION_VALID ) |\r
                                        ( portSTACK_REGION ); /* Region number. */\r
 \r
-                       xMPUSettings->xRegion[ 0 ].ulRegionAttribute =  \r
+                       xMPUSettings->xRegion[ 0 ].ulRegionAttribute =\r
                                        ( portMPU_REGION_READ_WRITE ) | /* Read and write. */\r
                                        ( prvGetMPURegionSizeSetting( ( unsigned long ) usStackDepth * ( unsigned long ) sizeof( portSTACK_TYPE ) ) ) |\r
                                        ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
@@ -618,23 +618,23 @@ unsigned long ul;
                {\r
                        if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )\r
                        {\r
-                               /* Translate the generic region definition contained in \r
-                               xRegions into the CM3 specific MPU settings that are then \r
+                               /* Translate the generic region definition contained in\r
+                               xRegions into the CM3 specific MPU settings that are then\r
                                stored in xMPUSettings. */\r
-                               xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =       \r
-                                               ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) | \r
+                               xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =\r
+                                               ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) |\r
                                                ( portMPU_REGION_VALID ) |\r
                                                ( portSTACK_REGION + ul ); /* Region number. */\r
 \r
-                               xMPUSettings->xRegion[ ul ].ulRegionAttribute = \r
-                                               ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) | \r
-                                               ( xRegions[ lIndex ].ulParameters ) | \r
-                                               ( portMPU_REGION_ENABLE ); \r
+                               xMPUSettings->xRegion[ ul ].ulRegionAttribute =\r
+                                               ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |\r
+                                               ( xRegions[ lIndex ].ulParameters ) |\r
+                                               ( portMPU_REGION_ENABLE );\r
                        }\r
                        else\r
                        {\r
                                /* Invalidate the region. */\r
-                               xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;     \r
+                               xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;\r
                                xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
                        }\r
 \r
@@ -802,7 +802,7 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
        void MPU_vTaskList( signed char *pcWriteBuffer )\r
        {\r
        portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
-       \r
+\r
                vTaskList( pcWriteBuffer );\r
                portRESET_PRIVILEGE( xRunningPrivileged );\r
        }\r
@@ -920,12 +920,12 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
 #endif\r
 /*-----------------------------------------------------------*/\r
 \r
-xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize )\r
+xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType )\r
 {\r
 xQueueHandle xReturn;\r
 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 \r
-       xReturn = xQueueCreate( uxQueueLength, uxItemSize );\r
+       xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType );\r
        portRESET_PRIVILEGE( xRunningPrivileged );\r
        return xReturn;\r
 }\r
@@ -970,7 +970,7 @@ signed portBASE_TYPE xReturn;
     xQueueHandle xReturn;\r
        portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 \r
-               xReturn = xQueueCreateMutex();\r
+               xReturn = xQueueCreateMutex( queueQUEUE_TYPE_MUTEX );\r
                portRESET_PRIVILEGE( xRunningPrivileged );\r
                return xReturn;\r
        }\r
@@ -983,7 +983,7 @@ signed portBASE_TYPE xReturn;
     xQueueHandle xReturn;\r
        portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 \r
-               xReturn = xQueueHandle xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );\r
+               xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );\r
                portRESET_PRIVILEGE( xRunningPrivileged );\r
                return xReturn;\r
        }\r
@@ -1095,7 +1095,7 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
        xReturn = xPortGetFreeHeapSize();\r
 \r
        portRESET_PRIVILEGE( xRunningPrivileged );\r
-       \r
+\r
        return xReturn;\r
 }\r
 \r