]> git.sur5r.net Git - freertos/commitdiff
Make vSetupTimerInterrupt weak in the RVDS M4 MPU port to give the
authorgaurav-aws <gaurav-aws@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Wed, 1 Jan 2020 00:04:10 +0000 (00:04 +0000)
committergaurav-aws <gaurav-aws@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Wed, 1 Jan 2020 00:04:10 +0000 (00:04 +0000)
application writer a chance to override this function. This gives
the application write ability to use a different timer.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2787 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

FreeRTOS/Source/portable/RVDS/ARM_CM4_MPU/port.c

index 20e108addedc44c41b3b60fcb7548d67344aefa6..3cd73b29417ccd81dd7f9edc69208aef583fa8d3 100644 (file)
@@ -110,7 +110,7 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 /*\r
  * Setup the timer to generate the tick interrupts.\r
  */\r
-static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
+void vSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
 \r
 /*\r
  * Configure a number of standard MPU regions that are used by all tasks.\r
@@ -435,7 +435,7 @@ BaseType_t xPortStartScheduler( void )
 \r
        /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
         * here already. */\r
-       prvSetupTimerInterrupt();\r
+       vSetupTimerInterrupt();\r
 \r
        /* Initialise the critical nesting count ready for the first task. */\r
        uxCriticalNesting = 0;\r
@@ -598,7 +598,7 @@ uint32_t ulDummy;
  * Setup the systick timer to generate the tick interrupts at the required\r
  * frequency.\r
  */\r
-static void prvSetupTimerInterrupt( void )\r
+__weak void vSetupTimerInterrupt( void )\r
 {\r
        /* Reset the SysTick. */\r
        portNVIC_SYSTICK_CTRL_REG = 0UL;\r