</matcher>\r
</filter>\r
<filter>\r
- <id>1405341154152</id>\r
+ <id>1426008785534</id>\r
<name>src/lwIP_Demo/lwip-1.4.0/src/core</name>\r
<type>10</type>\r
<matcher>\r
</matcher>\r
</filter>\r
<filter>\r
- <id>1405341154162</id>\r
+ <id>1426008785544</id>\r
<name>src/lwIP_Demo/lwip-1.4.0/src/core</name>\r
<type>10</type>\r
<matcher>\r
}
if (time_needed == SYS_ARCH_TIMEOUT) {
- /* If time == SYS_ARCH_TIMEOUT, a timeout occured before a message
+ /* If time == SYS_ARCH_TIMEOUT, a timeout occurred before a message
could be fetched. We should now call the timeout handler and
deallocate the memory allocated for the timeout. */
tmptimeout = next_timeout;
purpose. */\r
vPortEnableInterrupt( XPAR_INTC_0_TMRCTR_0_VEC_ID );\r
\r
- /* Configure the timer interrupt handler. */\r
+ /* Configure the timer interrupt handler. This installs the handler\r
+ directly, rather than through the Xilinx driver. This is done for\r
+ efficiency. */\r
XTmrCtr_SetHandler( &xTickTimerInstance, ( void * ) vPortTickISR, NULL );\r
\r
/* Set the correct period for the timer. */\r
#define errQUEUE_EMPTY ( ( BaseType_t ) 0 )\r
#define errQUEUE_FULL ( ( BaseType_t ) 0 )\r
\r
-/* Error definitions. */\r
+/* FreeRTOS error definitions. */\r
#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 )\r
#define errQUEUE_BLOCKED ( -4 )\r
#define errQUEUE_YIELD ( -5 )\r
#define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL\r
#endif\r
\r
+/* The following endian values are used by FreeRTOS+ components, not FreeRTOS\r
+itself. */\r
+#define pdFREERTOS_LITTLE_ENDIAN 0\r
+#define pdFREERTOS_BIG_ENDIAN 1\r
+\r
#endif /* PROJDEFS_H */\r
\r
\r
* \ingroup SchedulerControl\r
*/\r
#define taskENTER_CRITICAL() portENTER_CRITICAL()\r
+#define taskENTER_CRITICAL_FROM_ISR( x ) portSET_INTERRUPT_MASK_FROM_ISR( x )\r
\r
/**\r
* task. h\r
* \ingroup SchedulerControl\r
*/\r
#define taskEXIT_CRITICAL() portEXIT_CRITICAL()\r
-\r
+#define taskEXIT_CRITICAL_FROM_ISR() portCLEAR_INTERRUPT_MASK_FROM_ISR()\r
/**\r
* task. h\r
*\r
configNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h. The\r
kernel does not use the pointers itself, so the application writer can use\r
the pointers for any purpose they wish. The following two functions are\r
- used to set and query a pointer respectively. */ \r
+ used to set and query a pointer respectively. */\r
void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue );\r
void *pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex );\r
\r
\r
\r
\r
-#if MICROBLAZE_EXCEPTIONS_ENABLED == 1\r
+#if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 )\r
\r
.text\r
.align 4\r
bralid r15, vPortExceptionHandler\r
or r0, r0, r0\r
\r
-#endif /* MICROBLAZE_EXCEPTIONS_ENABLED */\r
+#endif /* ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 ) */\r
\r
\r
\r
void microblaze_enable_interrupts( void );\r
#define portDISABLE_INTERRUPTS() microblaze_disable_interrupts()\r
#define portENABLE_INTERRUPTS() microblaze_enable_interrupts()\r
-\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section macros. */\r
void vPortEnterCritical( void );\r
void vPortExitCritical( void );\r
#define portENTER_CRITICAL() { \\r
- extern volatile UBaseType_t uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
microblaze_disable_interrupts(); \\r
uxCriticalNesting++; \\r
}\r
\r
#define portEXIT_CRITICAL() { \\r
- extern volatile UBaseType_t uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
/* Interrupts are disabled, so we can */ \\r
/* access the variable directly. */ \\r
uxCriticalNesting--; \\r
__weak void vPortSetupTimerInterrupt( void )\r
{\r
/* Calculate the constants required to configure the tick interrupt. */\r
- #if configUSE_TICKLESS_IDLE == 1\r
+ #if( configUSE_TICKLESS_IDLE == 1 )\r
{\r
ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );\r
xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;\r
/* Hardware specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
-\r
+#define portINLINE __inline\r
\r
#if defined( __x86_64__) || defined( _M_X64 )\r
#define portBYTE_ALIGNMENT 8\r
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )\r
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )\r
\r
-\r
#define portINTERRUPT_YIELD ( 0UL )\r
#define portINTERRUPT_TICK ( 1UL )\r
\r
ldr r0, =0xE000ED08\r
ldr r0, [r0]\r
ldr r0, [r0]\r
+\r
/* Set the msp back to the start of the stack. */\r
msr msp, r0\r
/* Globally enable interrupts. */\r
StackType_t *pxTopOfStack;\r
\r
configASSERT( pxTaskCode );\r
- configASSERT( ( ( uxPriority & ( ~portPRIVILEGE_BIT ) ) < configMAX_PRIORITIES ) );\r
+ configASSERT( ( ( uxPriority & ( UBaseType_t ) ( ~portPRIVILEGE_BIT ) ) < ( UBaseType_t ) configMAX_PRIORITIES ) );\r
\r
/* Allocate the memory required by the TCB and stack for the new task,\r
checking that the allocation was successful. */\r