.register_commands = arm720t_register_commands,
        .target_command = arm720t_target_command,
        .init_target = arm720t_init_target,
+       .examine = arm7tdmi_examine,
        .quit = arm720t_quit
 };
 
 
        .register_commands = arm7tdmi_register_commands,
        .target_command = arm7tdmi_target_command,
        .init_target = arm7tdmi_init_target,
+       .examine = arm7tdmi_examine,
        .quit = arm7tdmi_quit
 };
 
        }
 }
 
+int arm7tdmi_examine(struct command_context_s *cmd_ctx, struct target_s *target)
+{
+       return ERROR_OK;
+}
+
 int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
 {
        
 
 int arm7tdmi_register_commands(struct command_context_s *cmd_ctx);
 int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, int chain_pos, char *variant);
 int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
+int arm7tdmi_examine(struct command_context_s *cmd_ctx, struct target_s *target);
 
 
 #endif /* ARM7TDMI_H */
 
        .register_commands = arm920t_register_commands,
        .target_command = arm920t_target_command,
        .init_target = arm920t_init_target,
+       .examine = arm9tdmi_examine,
        .quit = arm920t_quit
 };
 
 
        .register_commands = arm926ejs_register_commands,
        .target_command = arm926ejs_target_command,
        .init_target = arm926ejs_init_target,
+       .examine = arm9tdmi_examine,
        .quit = arm926ejs_quit,
        .virt2phys = arm926ejs_virt2phys,
        .mmu = arm926ejs_mmu
 
        .register_commands = arm966e_register_commands,
        .target_command = arm966e_target_command,
        .init_target = arm966e_init_target,
+       .examine = arm9tdmi_examine,
        .quit = arm966e_quit,
 };
 
 
        .register_commands = arm9tdmi_register_commands,
        .target_command = arm9tdmi_target_command,
        .init_target = arm9tdmi_init_target,
+       .examine = arm9tdmi_examine,
        .quit = arm9tdmi_quit
 };
 
        }
 }
 
+int arm9tdmi_examine(struct command_context_s *cmd_ctx, struct target_s *target)
+{
+       return ERROR_OK;
+}
+
 int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
 {
        
 
 };
 
 extern int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
+int arm9tdmi_examine(struct command_context_s *cmd_ctx, struct target_s *target);
 extern int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, int chain_pos, char *variant);
 extern int arm9tdmi_register_commands(struct command_context_s *cmd_ctx);
 
 
        .register_commands = arm926ejs_register_commands,
        .target_command = feroceon_target_command,
        .init_target = feroceon_init_target,
+       .examine = arm9tdmi_examine,
        .quit = feroceon_quit
 };
 
 
 }
 
 
+/* Targets that correctly implement init+examine, i.e.
+ * no communication with target during init:
+ * 
+ * XScale 
+ */
 int target_examine(struct command_context_s *cmd_ctx)
 {
        int retval = ERROR_OK;
        }
        return retval;
 }
+
+
 int target_init(struct command_context_s *cmd_ctx)
 {
        target_t *target = targets;