[GENERAL_DATA]\r
[BREAKPOINTS]\r
[OPEN_WORKSPACE_FILES]\r
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[WORKSPACE_FILE_STATES]\r
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[LOADED_PROJECTS]\r
"RTOSDemo" \r
[END]\r
#define configMAC_ADDR5 0x11\r
\r
/* IP address configuration. */\r
-#define configIP_ADDR0 192\r
-#define configIP_ADDR1 168\r
-#define configIP_ADDR2 0\r
-#define configIP_ADDR3 201\r
+#define configIP_ADDR0 172\r
+#define configIP_ADDR1 25\r
+#define configIP_ADDR2 218\r
+#define configIP_ADDR3 200\r
\r
/* Netmask configuration. */\r
#define configNET_MASK0 255\r
{\r
/* Port pin configuration is done by the low level set up prior to this\r
function being called. */\r
-\r
- /* Start with all LEDs off. */\r
- LED0 = LED_OFF;\r
- LED1 = LED_OFF;\r
- LED2 = LED_OFF;\r
- LED3 = LED_OFF;\r
- LED4 = LED_OFF;\r
- LED5 = LED_OFF;\r
- LED6 = LED_OFF;\r
- LED7 = LED_OFF;\r
- LED8 = LED_OFF;\r
- LED9 = LED_OFF;\r
- LED10 = LED_OFF;\r
- LED11 = LED_OFF;\r
}\r
/*-----------------------------------------------------------*/\r
\r
{\r
switch( ulLED )\r
{\r
- case 0: LED0 = LED_ON;\r
+ case 0: LED4 = LED_ON;\r
break;\r
- case 1: LED1 = LED_ON;\r
+ case 1: LED5 = LED_ON;\r
break;\r
- case 2: LED2 = LED_ON;\r
+ case 2: LED6 = LED_ON;\r
break;\r
- case 3: LED3 = LED_ON;\r
+ case 3: LED7 = LED_ON;\r
break;\r
- case 4: LED4 = LED_ON;\r
+ case 4: LED8 = LED_ON;\r
break;\r
- case 5: LED5 = LED_ON;\r
+ case 5: LED9 = LED_ON;\r
break;\r
- case 6: LED6 = LED_ON;\r
+ case 6: LED10 = LED_ON;\r
break;\r
- case 7: LED7 = LED_ON;\r
+ case 7: LED11 = LED_ON;\r
break;\r
- case 8: LED8 = LED_ON;\r
+ case 8: LED12 = LED_ON;\r
break;\r
- case 9: LED9 = LED_ON;\r
+ case 9: LED13 = LED_ON;\r
break;\r
- case 10:LED10 = LED_ON;\r
+ case 10:LED14 = LED_ON;\r
break;\r
- case 11:LED11 = LED_ON;\r
+ case 11:LED15 = LED_ON;\r
break;\r
}\r
}\r
{\r
switch( ulLED )\r
{\r
- case 0: LED0 = LED_OFF;\r
+ case 0: LED4 = LED_OFF;\r
break;\r
- case 1: LED1 = LED_OFF;\r
+ case 1: LED5 = LED_OFF;\r
break;\r
- case 2: LED2 = LED_OFF;\r
+ case 2: LED6 = LED_OFF;\r
break;\r
- case 3: LED3 = LED_OFF;\r
+ case 3: LED7 = LED_OFF;\r
break;\r
- case 4: LED4 = LED_OFF;\r
+ case 4: LED8 = LED_OFF;\r
break;\r
- case 5: LED5 = LED_OFF;\r
+ case 5: LED9 = LED_OFF;\r
break;\r
- case 6: LED6 = LED_OFF;\r
+ case 6: LED10 = LED_OFF;\r
break;\r
- case 7: LED7 = LED_OFF;\r
+ case 7: LED11 = LED_OFF;\r
break;\r
- case 8: LED8 = LED_OFF;\r
+ case 8: LED12 = LED_OFF;\r
break;\r
- case 9: LED9 = LED_OFF;\r
+ case 9: LED13 = LED_OFF;\r
break;\r
- case 10:LED10 = LED_OFF;\r
+ case 10:LED14 = LED_OFF;\r
break;\r
- case 11:LED11 = LED_OFF;\r
+ case 11:LED15 = LED_OFF;\r
break;\r
}\r
\r
{\r
switch( ulLED )\r
{\r
- case 0 : if( LED0 != 0 )\r
+ case 0 : if( LED4 != 0 )\r
{\r
lReturn = pdTRUE;\r
}\r
break;\r
- case 1 : if( LED1 != 0 )\r
+ case 1 : if( LED5 != 0 )\r
{\r
lReturn = pdTRUE;\r
}\r
break;\r
- case 2 : if( LED2 != 0 )\r
+ case 2 : if( LED6 != 0 )\r
{\r
lReturn = pdTRUE;\r
}\r
break;\r
- case 3 : if( LED3 != 0 )\r
+ case 3 : if( LED7 != 0 )\r
{\r
lReturn = pdTRUE;\r
}\r
break;\r
- case 4 : if( LED4 != 0 )\r
+ case 4 : if( LED8 != 0 )\r
{\r
lReturn = pdTRUE;\r
}\r
break;\r
- case 5 : if( LED5 != 0 )\r
+ case 5 : if( LED9 != 0 )\r
{\r
lReturn = pdTRUE;\r
}\r
break;\r
- case 6 : if( LED6 != 0 )\r
+ case 6 : if( LED10 != 0 )\r
{\r
lReturn = pdTRUE;\r
}\r
break;\r
- case 7 : if( LED7 != 0 )\r
+ case 7 : if( LED11 != 0 )\r
{\r
lReturn = pdTRUE;\r
}\r
break;\r
- case 8 : if( LED8 != 0 )\r
+ case 8 : if( LED12 != 0 )\r
{\r
lReturn = pdTRUE;\r
}\r
break;\r
- case 9 : if( LED9 != 0 )\r
+ case 9 : if( LED13 != 0 )\r
{\r
lReturn = pdTRUE;\r
}\r
break;\r
- case 10 : if( LED10 != 0 )\r
+ case 10 : if( LED14 != 0 )\r
{\r
lReturn = pdTRUE;\r
}\r
break;\r
- case 11 : if( LED11 != 0 )\r
+ case 11 : if( LED15 != 0 )\r
{\r
lReturn = pdTRUE;\r
}\r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\integer.c" "User" "C source file|Common demo tasks" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\recmutex.c" "User" "C source file|Common demo tasks" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\semtest.c" "User" "C source file|Common demo tasks" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\apps\httpd\http-strings.c" "User" "C source file|FreeTCP (based on uIP)|webserver|Common" 2 \r
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+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\psock.c" "User" "C source file|FreeTCP (based on uIP)" 2 \r
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+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\uip.c" "User" "C source file|FreeTCP (based on uIP)" 2 \r
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"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\HighFrequencyTimerTest.c" "User" "C source file" 2 \r
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"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\main-blinky.c" "User" "C source file" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\main-full.c" "User" "C source file" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\uIP_Task.c" "User" "C source file" 2 \r
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+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\webserver\httpd-cgi.c" "User" "C source file|FreeTCP (based on uIP)|webserver|Port specific" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\webserver\httpd-fsdata.c" "User" "C source file|FreeTCP (based on uIP)|webserver|Port specific" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\webserver\phy.c" "User" "C source file|FreeTCP (based on uIP)|webserver|Port specific" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\list.c" "User" "C source file|FreeRTOS" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\MemMang\heap_2.c" "User" "C source file|FreeRTOS|Portable layer" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\Renesas\RX600\port.c" "User" "C source file|FreeRTOS|Portable layer" 2 \r
"C source file|Common demo tasks" "" \r
"C source file|FreeRTOS" "" \r
"C source file|FreeRTOS|Portable layer" "" \r
+"C source file|FreeTCP (based on uIP)" "" \r
+"C source file|FreeTCP (based on uIP)|webserver" "" \r
+"C source file|FreeTCP (based on uIP)|webserver|Common" "" \r
+"C source file|FreeTCP (based on uIP)|webserver|Port specific" "" \r
"C source file|Renesas Files" "" \r
[GENERAL_DATA_PROJECT]\r
"MAKEGEN_GENERATE_MAKEFILE_FOR" "0" \r
[GENERAL_DATA_SESSION_SessionRX600_E1_E20_SYSTEM]\r
[GENERAL_DATA_SESSION_SimSessionRX600]\r
[OPTIONS_Blinky_Renesas OptLinker]\r
-"Single Shot" "026c1f52b354bc10" 5 \r
+"Single Shot" "0cb38d9776b4bc10" 5 \r
[OPTIONS_Blinky_Renesas RX Assembler]\r
"Assembly source file" "088b30f0a993bc10" 4 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\Renesas-Files\lowlvl.src" "0cd92d23ed14bc10" 4 \r
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"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\main-blinky.c" "02c169eb6f14bc10" 2 \r
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"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\Renesas\RX600\port.c" "067b2354f2d3bc10" 2 \r
[OPTIONS_Blinky_Renesas RX C/C++ Library Generator]\r
"Single Shot" "0ca340787f14bc10" 1 \r
[OPTIONS_Blinky_Renesas RX Configurator]\r
-"Single Shot" "02c169eb6f14bc10" 6 \r
+"Single Shot" "0f825c9776b4bc10" 6 \r
[OPTIONS_Blinky]\r
"" 0 \r
"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON4] [S|OUTPUTPATH|^"$(CONFIGDIR)^"] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|FINT_REGISTER|0]" 6 \r
[LINKAGE_ORDER_Blinky]\r
[GENERAL_DATA_CONFIGURATION_Blinky]\r
[OPTIONS_Debug_Renesas OptLinker]\r
-"Single Shot" "021ac70d6f14bc10" 5 \r
+"Single Shot" "0cb38d9776b4bc10" 5 \r
[OPTIONS_Debug_Renesas RX Assembler]\r
"Assembly source file" "088b30f0a993bc10" 4 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\Renesas-Files\lowlvl.src" "0cd92d23ed14bc10" 4 \r
"Linkage symbol file" "088b30f0a993bc10" 4 \r
[OPTIONS_Debug_Renesas RX C/C++ Compiler]\r
-"C source file" "067b2354f2d3bc10" 2 \r
-"C++ source file" "067b2354f2d3bc10" 3 \r
-"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\BlockQ.c" "05d6fdab4a04bc10" 2 \r
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[OPTIONS_Debug_Renesas RX C/C++ Library Generator]\r
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[OPTIONS_Debug_Renesas RX Configurator]\r
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[OPTIONS_Debug]\r
"" 0 \r
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" 3 \r
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" 2 \r
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" 1 \r
" 5 \r
[EXCLUDED_FILES_Debug]\r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\main-blinky.c" \r
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[LINKAGE_ORDER_Debug]\r
[GENERAL_DATA_CONFIGURATION_Debug]\r
[OPTIONS_Debug_RX600_E1_E20_SYSTEM_Renesas OptLinker]\r
-"Single Shot" "0fd3fdfb6f14bc10" 4 \r
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[OPTIONS_Debug_RX600_E1_E20_SYSTEM_Renesas RX Assembler]\r
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[OPTIONS_Debug_RX600_E1_E20_SYSTEM_Renesas RX C/C++ Compiler]\r
"C source file" "0cb120ca4793bc10" 2 \r
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[OPTIONS_Debug_RX600_E1_E20_SYSTEM_Renesas RX C/C++ Library Generator]\r
"Single Shot" "0cb120ca4793bc10" 1 \r
[OPTIONS_Debug_RX600_E1_E20_SYSTEM_Renesas RX Configurator]\r
-"Single Shot" "02c169eb6f14bc10" 5 \r
+"Single Shot" "0f825c9776b4bc10" 6 \r
[OPTIONS_Debug_RX600_E1_E20_SYSTEM]\r
"" 0 \r
"[S|OUTPUTPATH|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] [V|VERSION|1] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|ROUND|NEAREST] [S|DBL_SIZE|4] [B|SIGNED_CHAR|0] [B|SIGNED_BITFIELD|0] [S|BIT_ORDER|RIGHT] [S|FINT_REGISTER|0] [S|BRANCH|24] [S|LANG|C] [B|RUNTIME|1] [B|CTYPE|0] [B|MATH|0] [B|MATHF|0] [B|STDARG|0] [B|STDIO|0] [B|STDLIB|0] [B|STRING|0] [B|IOS|0] [B|NEW|1] [B|COMPLEX|0] [B|CPPSTRING|0] [S|MODE|BUILD/CHANGED]" 1 \r
-"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON4] [S|OUTPUTPATH|^"$(CONFIGDIR)^"] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|FINT_REGISTER|0]" 5 \r
-"[V|VERSION|1] [B|DEBUG|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|LISTFILE|0] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|FINT_REGISTER|0]" 3 \r
+"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON4] [S|OUTPUTPATH|^"$(CONFIGDIR)^"] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|FINT_REGISTER|0]" 6 \r
+"[V|VERSION|1] [B|DEBUG|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|LISTFILE|0] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|FINT_REGISTER|0]" 4 \r
"[V|VERSION|1] [B|DEBUG|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|LISTFILE|0] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|ROUND|NEAREST] [S|DBL_SIZE|4] [B|SIGNED_CHAR|0] [B|SIGNED_BITFIELD|0] [S|BIT_ORDER|RIGHT] [S|FINT_REGISTER|0] [S|BRANCH|24]" 2 \r
-"[V|VERSION|6] [B|DEBUG|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).abs^"] [B|LIST|1] [S|LIST|^"$(CONFIGDIR)\$(PROJECTNAME).map^"] [B|OPTIMIZE|0] [S|ROM|(D,R)|(D_1,R_1)|(D_2,R_2)] [S|FORM|STYPE] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] [S|START|B_1,R_1,B_2,R_2,B,R,SU,SI(1000)|PResetPRG(FFFF8000)|C_1,C_2,C,C$*,D*,P,PIntPRG,W*(FFFF8100)|FIXEDVECT(FFFFFFD0)]" 4 \r
+"[V|VERSION|1] [S|LANG|CPP] [B|SJIS|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|DEBUG|1] [B|SIZE|1] [B|MAP|0] [I|INLINE|100] [I|LOOP|2] [S|MISRA2004_CHECK_RULE|ALL] [S|MISRA2004_RULE|1.1|3.4|4.1|5.2|5.3|5.4|5.5|5.6|5.7|6.1|6.2|6.3|6.4|6.5|7.1|8.1|8.2|8.3|8.5|8.6|8.7|8.8|8.11|8.12|9.2|9.3|10.1|10.2|10.3|10.4|10.5|10.6|11.1|11.2|11.3|11.4|11.5|12.1|12.2|12.3|12.4|12.5|12.6|12.7|12.8|12.9|12.10|12.11|12.12|12.13|13.1|13.2|13.3|13.4|13.7|14.1|14.2|14.3|14.4|14.5|14.6|14.7|14.8|14.9|14.10|15.1|15.2|15.3|15.4|15.5|16.1|16.2|16.3|16.4|16.5|16.6|16.8|16.9|17.3|17.4|17.5|17.6|18.1|18.2|18.4|19.1|20.2|20.4|20.5|20.7|20.8|20.9|20.10|20.11|20.12] [S|MISRA1998_CHECK_RULE|ALL] [S|MISRA1998_RULE|1|5|8|12|13|14|17|18|19|20|21|22|24|28|29|31|32|33|34|35|36|37|38|39|40|42|43|44|45|46|48|49|50|51|53|54|55|56|57|58|59|60|61|62|63|64|65|68|69|70|71|72|73|74|75|76|77|78|79|80|82|83|84|85|99|101|102|103|104|105|106|108|110|111|112|113|115|118|119|121|122|123|124|125|126|127] [S|MISRA_GROUP_FILE_PATH|^"$(PROJDIR)\$(PROJECTNAME).rde^"] [S|CPU|RX600] [S|BASE|00000000=NONE]\r
+" 3 \r
+"[V|VERSION|6] [B|DEBUG|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).abs^"] [B|LIST|1] [S|LIST|^"$(CONFIGDIR)\$(PROJECTNAME).map^"] [B|OPTIMIZE|0] [S|ROM|(D,R)|(D_1,R_1)|(D_2,R_2)] [S|FORM|STYPE] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] [S|START|B_1,R_1,B_2,R_2,B,R,SU,SI(1000)|PResetPRG(FFFF8000)|C_1,C_2,C,C$*,D*,P,PIntPRG,W*(FFFF8100)|FIXEDVECT(FFFFFFD0)]" 5 \r
[EXCLUDED_FILES_Debug_RX600_E1_E20_SYSTEM]\r
[LINKAGE_ORDER_Debug_RX600_E1_E20_SYSTEM]\r
[GENERAL_DATA_CONFIGURATION_Debug_RX600_E1_E20_SYSTEM]\r
[OPTIONS_Debug_with_optimisation_Renesas OptLinker]\r
-"Single Shot" "0365455c6f14bc10" 5 \r
+"Single Shot" "0cb38d9776b4bc10" 5 \r
[OPTIONS_Debug_with_optimisation_Renesas RX Assembler]\r
"Assembly source file" "088b30f0a993bc10" 4 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\Renesas-Files\lowlvl.src" "0cd92d23ed14bc10" 4 \r
"Linkage symbol file" "088b30f0a993bc10" 4 \r
[OPTIONS_Debug_with_optimisation_Renesas RX C/C++ Compiler]\r
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[OPTIONS_Debug_with_optimisation_Renesas RX C/C++ Library Generator]\r
"Single Shot" "00e576febe14bc10" 1 \r
[OPTIONS_Debug_with_optimisation_Renesas RX Configurator]\r
-"Single Shot" "02c169eb6f14bc10" 6 \r
+"Single Shot" "0f825c9776b4bc10" 6 \r
[OPTIONS_Debug_with_optimisation]\r
"" 0 \r
"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON4] [S|OUTPUTPATH|^"$(CONFIGDIR)^"] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|FINT_REGISTER|0]" 6 \r
"[V|VERSION|1] [B|SJIS|1] [B|DEBUG|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [S|CPU|RX600] [S|BASE|00000000=NONE] [B|SKIPDEPENDENCY|1]\r
" 4 \r
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" 3 \r
-"[V|VERSION|1] [S|LANG|C] [B|SJIS|1] [S|INCLUDE|^"$(PROJDIR)\..\..\..\Source\portable\Renesas\RX600^"|^"$(PROJDIR)\..\..\..\Source\include^"|^"$(PROJDIR)\.^"|^"$(PROJDIR)\..\..\include^"|^"$(PROJDIR)\..\..\Common\include^"|^"$(PROJDIR)\.\include^"] [S|DEFINE|INCLUDE_HIGH_FREQUENCY_TIMER_TEST=1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|DEBUG|1] [S|OPTIMIZE|MAX] [B|SIZE|1] [B|MAP|1] [S|MAPPATH|^"$(CONFIGDIR)\$(PROJECTNAME).bls^"] [I|INLINE|100] [I|LOOP|2] [S|MISRA2004_CHECK_RULE|ALL] [S|MISRA2004_RULE|1.1|3.4|4.1|5.2|5.3|5.4|5.5|5.6|5.7|6.1|6.2|6.3|6.4|6.5|7.1|8.1|8.2|8.3|8.5|8.6|8.7|8.8|8.11|8.12|9.2|9.3|10.1|10.2|10.3|10.4|10.5|10.6|11.1|11.2|11.3|11.4|11.5|12.1|12.2|12.3|12.4|12.5|12.6|12.7|12.8|12.9|12.10|12.11|12.12|12.13|13.1|13.2|13.3|13.4|13.7|14.1|14.2|14.3|14.4|14.5|14.6|14.7|14.8|14.9|14.10|15.1|15.2|15.3|15.4|15.5|16.1|16.2|16.3|16.4|16.5|16.6|16.8|16.9|17.3|17.4|17.5|17.6|18.1|18.2|18.4|19.1|20.2|20.4|20.5|20.7|20.8|20.9|20.10|20.11|20.12] [S|MISRA1998_CHECK_RULE|ALL] [S|MISRA1998_RULE|1|5|8|12|13|14|17|18|19|20|21|22|24|28|29|31|32|33|34|35|36|37|38|39|40|42|43|44|45|46|48|49|50|51|53|54|55|56|57|58|59|60|61|62|63|64|65|68|69|70|71|72|73|74|75|76|77|78|79|80|82|83|84|85|99|101|102|103|104|105|106|108|110|111|112|113|115|118|119|121|122|123|124|125|126|127] [S|MISRA_GROUP_FILE_PATH|^"$(PROJDIR)\$(PROJECTNAME).rde^"] [S|CPU|RX600] [S|BASE|00000000=NONE] [B|SKIPDEPENDENCY|1] [N|DEPENDSCAN|1]\r
+"[V|VERSION|1] [S|LANG|C] [B|SJIS|1] [S|INCLUDE|^"$(PROJDIR)\..\..\..\Source\portable\Renesas\RX600^"|^"$(PROJDIR)\..\..\..\Source\include^"|^"$(PROJDIR)\.^"|^"$(PROJDIR)\..\..\include^"|^"$(PROJDIR)\..\..\Common\include^"|^"$(PROJDIR)\.\include^"|^"$(PROJDIR)\..\..\Common\ethernet\FreeTCPIP^"|^"$(PROJDIR)\webserver^"] [S|DEFINE|INCLUDE_HIGH_FREQUENCY_TIMER_TEST=1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|DEBUG|1] [S|OPTIMIZE|MAX] [B|SIZE|1] [B|MAP|1] [S|MAPPATH|^"$(CONFIGDIR)\$(PROJECTNAME).bls^"] [I|INLINE|100] [I|LOOP|2] [S|MISRA2004_CHECK_RULE|ALL] [S|MISRA2004_RULE|1.1|3.4|4.1|5.2|5.3|5.4|5.5|5.6|5.7|6.1|6.2|6.3|6.4|6.5|7.1|8.1|8.2|8.3|8.5|8.6|8.7|8.8|8.11|8.12|9.2|9.3|10.1|10.2|10.3|10.4|10.5|10.6|11.1|11.2|11.3|11.4|11.5|12.1|12.2|12.3|12.4|12.5|12.6|12.7|12.8|12.9|12.10|12.11|12.12|12.13|13.1|13.2|13.3|13.4|13.7|14.1|14.2|14.3|14.4|14.5|14.6|14.7|14.8|14.9|14.10|15.1|15.2|15.3|15.4|15.5|16.1|16.2|16.3|16.4|16.5|16.6|16.8|16.9|17.3|17.4|17.5|17.6|18.1|18.2|18.4|19.1|20.2|20.4|20.5|20.7|20.8|20.9|20.10|20.11|20.12] [S|MISRA1998_CHECK_RULE|ALL] [S|MISRA1998_RULE|1|5|8|12|13|14|17|18|19|20|21|22|24|28|29|31|32|33|34|35|36|37|38|39|40|42|43|44|45|46|48|49|50|51|53|54|55|56|57|58|59|60|61|62|63|64|65|68|69|70|71|72|73|74|75|76|77|78|79|80|82|83|84|85|99|101|102|103|104|105|106|108|110|111|112|113|115|118|119|121|122|123|124|125|126|127] [S|MISRA_GROUP_FILE_PATH|^"$(PROJDIR)\$(PROJECTNAME).rde^"] [S|CPU|RX600] [S|BASE|00000000=NONE] [B|SKIPDEPENDENCY|1] [N|DEPENDSCAN|1]\r
" 2 \r
"[V|VERSION|1] [S|MODE|BUILD/CHANGED] [S|EXISTOUTPUTPATH|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] [B|RUNTIME|1] [B|MATH|1] [B|STDIO|1] [B|STDLIB|1] [B|STRING|1] [B|NOFLOAT|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] [B|SIZE|1] [I|INLINE|100] [I|LOOP|2] [S|CPU|RX600] [S|BASE|00000000=NONE] [B|SKIPDEPENDENCY|1]\r
" 1 \r
[LINKAGE_ORDER_Debug_with_optimisation]\r
[GENERAL_DATA_CONFIGURATION_Debug_with_optimisation]\r
[OPTIONS_SimDebug_RX600_Renesas OptLinker]\r
-"Single Shot" "0fd3fdfb6f14bc10" 4 \r
+"Single Shot" "0cb38d9776b4bc10" 5 \r
[OPTIONS_SimDebug_RX600_Renesas RX Assembler]\r
-"Assembly source file" "0cb120ca4793bc10" 3 \r
-"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\Renesas-Files\lowlvl.src" "0cd92d23ed14bc10" 3 \r
-"Linkage symbol file" "0cb120ca4793bc10" 3 \r
+"Assembly source file" "0cb120ca4793bc10" 4 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\Renesas-Files\lowlvl.src" "0cd92d23ed14bc10" 4 \r
+"Linkage symbol file" "0cb120ca4793bc10" 4 \r
[OPTIONS_SimDebug_RX600_Renesas RX C/C++ Compiler]\r
"C source file" "0cb120ca4793bc10" 2 \r
-"C++ source file" "0cb120ca4793bc10" 2 \r
+"C++ source file" "0c61074bd8a4bc10" 3 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\BlockQ.c" "05d6fdab4a04bc10" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\GenQTest.c" "05d6fdab4a04bc10" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\IntQueue.c" "090dfce07df3bc10" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\integer.c" "05d6fdab4a04bc10" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\recmutex.c" "05d6fdab4a04bc10" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\semtest.c" "05d6fdab4a04bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\apps\httpd\http-strings.c" "0b92e45f48a4bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\apps\httpd\httpd-fs.c" "0b92e45f48a4bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\apps\httpd\httpd.c" "0b92e45f48a4bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\psock.c" "004baa8c48a4bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\timer.c" "004baa8c48a4bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\uip.c" "004baa8c48a4bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\uip_arp.c" "004baa8c48a4bc10" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\HighFrequencyTimerTest.c" "00526507a114bc10" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\IntQueueTimer.c" "0a762c328df3bc10" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\ParTest.c" "08d08b78d2d3bc10" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\Renesas-Files\vecttbl.c" "0cd92d23ed14bc10" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\main-blinky.c" "02c169eb6f14bc10" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\main-full.c" "03ceac85ed14bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\uIP_Task.c" "0630f4bd78a4bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\webserver\EMAC.c" "0e36287188a4bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\webserver\httpd-cgi.c" "0e36287188a4bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\webserver\httpd-fsdata.c" "0e36287188a4bc10" 2 \r
+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\webserver\phy.c" "0f825c9776b4bc10" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\list.c" "04345d232893bc10" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\MemMang\heap_2.c" "0b083d452893bc10" 2 \r
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\Renesas\RX600\port.c" "0b8497895893bc10" 2 \r
[OPTIONS_SimDebug_RX600_Renesas RX C/C++ Library Generator]\r
"Single Shot" "0cb120ca4793bc10" 1 \r
[OPTIONS_SimDebug_RX600_Renesas RX Configurator]\r
-"Single Shot" "02c169eb6f14bc10" 5 \r
+"Single Shot" "0f825c9776b4bc10" 6 \r
[OPTIONS_SimDebug_RX600]\r
"" 0 \r
"[S|OUTPUTPATH|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] [V|VERSION|1] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|ROUND|NEAREST] [S|DBL_SIZE|4] [B|SIGNED_CHAR|0] [B|SIGNED_BITFIELD|0] [S|BIT_ORDER|RIGHT] [S|FINT_REGISTER|0] [S|BRANCH|24] [S|LANG|C] [B|RUNTIME|1] [B|CTYPE|0] [B|MATH|0] [B|MATHF|0] [B|STDARG|0] [B|STDIO|0] [B|STDLIB|0] [B|STRING|0] [B|IOS|0] [B|NEW|1] [B|COMPLEX|0] [B|CPPSTRING|0] [S|MODE|BUILD/CHANGED]" 1 \r
-"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON4] [S|OUTPUTPATH|^"$(CONFIGDIR)^"] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|FINT_REGISTER|0]" 5 \r
-"[V|VERSION|1] [B|DEBUG|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|LISTFILE|0] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|FINT_REGISTER|0]" 3 \r
+"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON4] [S|OUTPUTPATH|^"$(CONFIGDIR)^"] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|FINT_REGISTER|0]" 6 \r
+"[V|VERSION|1] [B|DEBUG|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|LISTFILE|0] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|FINT_REGISTER|0]" 4 \r
"[V|VERSION|1] [B|DEBUG|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|LISTFILE|0] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|ROUND|NEAREST] [S|DBL_SIZE|4] [B|SIGNED_CHAR|0] [B|SIGNED_BITFIELD|0] [S|BIT_ORDER|RIGHT] [S|FINT_REGISTER|0] [S|BRANCH|24]" 2 \r
-"[V|VERSION|6] [B|DEBUG|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).abs^"] [B|LIST|1] [S|LIST|^"$(CONFIGDIR)\$(PROJECTNAME).map^"] [B|OPTIMIZE|0] [S|ROM|(D,R)|(D_1,R_1)|(D_2,R_2)] [S|FORM|STYPE] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] [S|START|B_1,R_1,B_2,R_2,B,R,SU,SI(1000)|PResetPRG(FFFF8000)|C_1,C_2,C,C$*,D*,P,PIntPRG,W*(FFFF8100)|FIXEDVECT(FFFFFFD0)]" 4 \r
+"[V|VERSION|1] [S|LANG|CPP] [B|SJIS|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|DEBUG|1] [B|SIZE|1] [B|MAP|0] [I|INLINE|100] [I|LOOP|2] [S|MISRA2004_CHECK_RULE|ALL] [S|MISRA2004_RULE|1.1|3.4|4.1|5.2|5.3|5.4|5.5|5.6|5.7|6.1|6.2|6.3|6.4|6.5|7.1|8.1|8.2|8.3|8.5|8.6|8.7|8.8|8.11|8.12|9.2|9.3|10.1|10.2|10.3|10.4|10.5|10.6|11.1|11.2|11.3|11.4|11.5|12.1|12.2|12.3|12.4|12.5|12.6|12.7|12.8|12.9|12.10|12.11|12.12|12.13|13.1|13.2|13.3|13.4|13.7|14.1|14.2|14.3|14.4|14.5|14.6|14.7|14.8|14.9|14.10|15.1|15.2|15.3|15.4|15.5|16.1|16.2|16.3|16.4|16.5|16.6|16.8|16.9|17.3|17.4|17.5|17.6|18.1|18.2|18.4|19.1|20.2|20.4|20.5|20.7|20.8|20.9|20.10|20.11|20.12] [S|MISRA1998_CHECK_RULE|ALL] [S|MISRA1998_RULE|1|5|8|12|13|14|17|18|19|20|21|22|24|28|29|31|32|33|34|35|36|37|38|39|40|42|43|44|45|46|48|49|50|51|53|54|55|56|57|58|59|60|61|62|63|64|65|68|69|70|71|72|73|74|75|76|77|78|79|80|82|83|84|85|99|101|102|103|104|105|106|108|110|111|112|113|115|118|119|121|122|123|124|125|126|127] [S|MISRA_GROUP_FILE_PATH|^"$(PROJDIR)\$(PROJECTNAME).rde^"] [S|CPU|RX600] [S|BASE|00000000=NONE]\r
+" 3 \r
+"[V|VERSION|6] [B|DEBUG|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).abs^"] [B|LIST|1] [S|LIST|^"$(CONFIGDIR)\$(PROJECTNAME).map^"] [B|OPTIMIZE|0] [S|ROM|(D,R)|(D_1,R_1)|(D_2,R_2)] [S|FORM|STYPE] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] [S|START|B_1,R_1,B_2,R_2,B,R,SU,SI(1000)|PResetPRG(FFFF8000)|C_1,C_2,C,C$*,D*,P,PIntPRG,W*(FFFF8100)|FIXEDVECT(FFFFFFD0)]" 5 \r
[EXCLUDED_FILES_SimDebug_RX600]\r
[LINKAGE_ORDER_SimDebug_RX600]\r
[GENERAL_DATA_CONFIGURATION_SimDebug_RX600]\r
******************************************************************************/\r
void HardwareSetup(void)\r
{\r
-\r
uint32_t sckcr = 0;\r
\r
/* Configure system clocks based on header */\r
sckcr += (PCLK_MUL==8) ? (0ul << 8) : (PCLK_MUL==4) ? (1ul << 8) : (PCLK_MUL==2) ? (2ul << 8) : (3ul << 8);\r
SYSTEM.SCKCR.LONG = sckcr;\r
\r
- /* Configure LED pins as outputs */\r
- LED0_DDR = 1; \r
- LED1_DDR = 1;\r
- LED2_DDR = 1;\r
- LED3_DDR = 1;\r
+ /* Module standby clear - EtherC, EDMAC */\r
+ SYSTEM.MSTPCRB.BIT.MSTPB15 = 0;\r
+\r
+ PORT0.DDR.BYTE = 0x00 ; // Port 0: inputs (IRQ's from ethernet & WiFi)\r
+ PORT1.DDR.BYTE = 0x00 ; // Port 1: inputs (IIC and USB settings will override these later)\r
+ PORT2.DDR.BYTE = 0x1A ; // Port 2: USB signals\r
+ PORT3.DDR.BYTE = 0x04 ; // Port 3: JTAG (P30, P31, P34), CAN (P32=Tx, P33=Rx), NMI (P35)\r
+ PORT4.DDR.BYTE = 0x00 ; // Port 4: Switches (P40-P42), AIN (P43-P47)\r
+ PORT5.DDR.BYTE = 0x3B ; // Port 5: Audio (P55,P54), BCLK (P53), SCI (P52=Rx, P50=Tx), LCD-RS (P51)\r
+\r
+ PORTA.DR.BYTE = 0x00 ; // Port A outputs all LOW to start\r
+ PORTA.DDR.BYTE = 0xFF ; // Port A: Expansion (PA0-PA2), Ether (PA3-PA5), Audio (PA6-PA7)\r
+\r
+ PORTB.DR.BYTE = 0x00 ;\r
+ PORTB.DDR.BYTE = 0x70 ; // Port B: Ether\r
+\r
+ PORTC.DR.BYTE = 0xF7 ; // Port C: Chip selects, clock = high; IO reset = low (not reset, needed by Ether PHY)\r
+ PORTC.DDR.BYTE = 0x7F ; // Port C: SPI (PC0-2, PC4-7), IO reset (PC3) \r
+\r
+ // Ethernet settings\r
+ IOPORT.PFENET.BYTE = 0x82; // Enable Ether poins, RMII mode, enable LINKSTA\r
+ PORTA.ICR.BIT.B5 = 1; // ET_LINKSTA \r
+ PORTA.ICR.BIT.B3 = 1; // ET_MDIO\r
+ PORTB.ICR.BIT.B0 = 1; // RMII_RXD1\r
+ PORTB.ICR.BIT.B1 = 1; // RMII_RXD0\r
+ PORTB.ICR.BIT.B2 = 1; // REF50CLK\r
+ PORTB.ICR.BIT.B3 = 1; // RMII_RX_ER\r
+ PORTB.ICR.BIT.B7 = 1; // RMII_CRS_DV\r
+\r
+\r
+ /* Configure LEDs */\r
+ LED4 = LED_OFF;\r
+ LED5 = LED_OFF;\r
+ LED6 = LED_OFF;\r
+ LED7 = LED_OFF;\r
+ LED8 = LED_OFF;\r
+ LED9 = LED_OFF;\r
+ LED10 = LED_OFF;\r
+ LED11 = LED_OFF;\r
+ LED12 = LED_OFF;\r
+ LED13 = LED_OFF;\r
+ LED14 = LED_OFF;\r
+ LED15 = LED_OFF;\r
+\r
LED4_DDR = 1;\r
LED5_DDR = 1;\r
LED6_DDR = 1;\r
LED9_DDR = 1;\r
LED10_DDR = 1;\r
LED11_DDR = 1;\r
- \r
- /* Configure LCD pins as outputs - uncomment this if an LCD is present.\r
- LCD_RS_DDR = 1;\r
- LCD_EN_DDR = 1;\r
- LCD_DATA_DDR = 0xF0; */\r
-\r
- /* Initialize display - uncomment this if an LCD is present.\r
- InitialiseDisplay(); */\r
+ LED12_DDR = 1;\r
+ LED13_DDR = 1;\r
+ LED14_DDR = 1;\r
+ LED15_DDR = 1;\r
+\r
+ /* Configure push button switches */\r
+ SW1_DDR = 0;\r
+ SW2_DDR = 0;\r
+ SW3_DDR = 0;\r
+ SW1_ICR = 1;\r
+ SW2_ICR = 1;\r
+ SW3_ICR = 1;\r
}\r
\r
+\r
"{5F75FDA0-6FF0-11D5-B7CE-00E029352378}PACtrlViews" "0" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_EVAL_DENORMAL_MODE" "16777216" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_EVAL_ROUND_MODE" "768" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_0" "00000000000071F0" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_1" "0000000000006FA8" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_0" "000000000000BAEC" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_1" "0000000000000007" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_10" "00000000A5A5A5A5" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_11" "00000000A5A5A5A5" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_12" "00000000A5A5A5A5" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_13" "00000000A5A5A5A5" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_14" "000000000000CDBC" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_15" "0000000000006FA8" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_16" "00000000000071F0" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_17" "000000000000D354" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_18" "0000000004030001" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_19" "00000000FFF88980" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_2" "0000000000000000" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_20" "00000000FFF81644" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_14" "0000000000000007" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_15" "00000000A5A5A5A5" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_16" "000000000000BAEC" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_17" "0000000000011220" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_18" "0000000000030000" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_19" "00000000FFF8E520" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_2" "000000000000C508" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_20" "00000000FFF8C424" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_21" "0000000080000000" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_22" "0000000000000000" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_23" "0000000000000000" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_24" "0000000000000100" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_25" "1234567887650000" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_3" "0000000000000000" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_4" "0000000000000001" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_5" "0000000000000000" \r
-"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_6" "0000000000006A68" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_3" "0000000041480000" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_4" "0000000040E00000" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_5" "000000000000C4E0" \r
+"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_6" "00000000A5A5A5A5" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_7" "00000000A5A5A5A5" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_8" "00000000A5A5A5A5" \r
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_9" "00000000A5A5A5A5" \r
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_COMB_BUFFER" ",,,," \r
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_SAMPLING_RATE" "1000" \r
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}WaveformCtrlViews" "0" \r
-"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersCtrlViews" "1" \r
+"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersCtrlViews" "0" \r
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0ColumnWidth" "47,153,35" \r
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0ECX_REGISTER_COUNT" "33" \r
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersWnd0ECX_REGISTER_DISPLAYED" "1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" \r
0 \r
[WINDOW_POSITION_STATE_DATA_VD1]\r
"Help" "TOOLBAR 0" 59419 1 5 "0.00" 0 0 0 0 0 17 0 "" "0.0" \r
-"{WK_00000001_CmdLine}" "WINDOW" 59422 0 1 "0.07" 218 0 0 100 100 17 0 "32771|32772|32778|<<separator>>|32773|32774|<<separator>>" "0.0" \r
-"{WK_00000001_DEBUGCONSOLE}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59421 0 1 "1.00" 307 0 0 350 200 17 0 "57634|57637|57633|<<separator>>|32781|32782|<<separator>>|32780|32785|32787" "0.0" \r
+"{WK_00000001_CmdLine}" "WINDOW" 59422 0 2 "0.07" 270 0 0 350 200 17 0 "32771|32772|32778|<<separator>>|32773|32774|<<separator>>|32820|<<separator>>|32801|32824" "0.0" \r
+"{WK_00000001_DEBUGCONSOLE}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59421 0 0 "1.00" 307 0 0 350 200 17 0 "57634|57637|57633|<<separator>>|32781|32782|<<separator>>|32780|32785|32787" "0.0" \r
"{WK_00000001_DISASSEMBLY}" "WINDOW" 0 0 0 "0.00" 0 0 0 1062 571 9 0 "" "0.0" \r
-"{WK_00000001_IO}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59422 0 3 "0.58" 218 0 0 350 200 17 0 "32817|32826|32819|32820|32821" "0.0" \r
+"{WK_00000001_IO}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59422 0 3 "0.58" 270 0 0 350 200 17 0 "32817|32826|32819|32820|32821" "0.0" \r
"{WK_00000001_MEMORY}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59422 0 0 "0.64" 289 0 0 350 200 2065 0 "42202|42203|42204|42233|<<separator>>|42206|42205|42230|42229|42207|<<separator>>|42208|42209|42210|49076|42228|42227|<<separator>>|42231|42232|42234|42235|<<separator>>|42211|<<separator>>" "0.0" \r
-"{WK_00000001_OUTPUT}" "WINDOW" 59422 0 0 "1.00" 218 560 340 350 200 18 0 "36756|36757|36758|36759|<<separator>>|36746|36747|<<separator>>|39531|<<separator>>|39500|39534|<<separator>>|36687" "0.0" \r
-"{WK_00000001_REGISTERS}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59421 0 0 "1.00" 307 0 0 350 200 18 0 "" "0.0" \r
-"{WK_00000001_WATCH}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59422 0 1 "0.03" 218 0 0 853 610 18 0 "32781|32783|<<separator>>|32771|32829|32772|32827|32773|<<separator>>|32786|<<separator>>|32810|32811" "0.0" \r
-"{WK_00000002_WORKSPACE}" "WINDOW" 59420 0 0 "1.00" 214 560 340 350 200 18 0 "" "0.0" \r
+"{WK_00000001_OUTPUT}" "WINDOW" 59422 0 0 "0.97" 270 560 340 350 200 18 0 "36756|36757|36758|36759|<<separator>>|36746|36747|<<separator>>|39531|<<separator>>|39500|39534|<<separator>>|36687" "0.0" \r
+"{WK_00000001_REGISTERS}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59421 0 0 "1.00" 307 0 0 350 200 2065 0 "" "0.0" \r
+"{WK_00000001_WATCH}RTOSDemoSessionRX600_E1_E20_SYSTEM" "WINDOW" 59422 0 1 "0.03" 270 0 0 853 610 18 0 "32781|32783|<<separator>>|32771|32829|32772|32827|32773|<<separator>>|32786|<<separator>>|32810|32811" "0.0" \r
+"{WK_00000002_WORKSPACE}" "WINDOW" 59420 0 0 "1.00" 360 560 340 350 200 18 0 "" "0.0" \r
"{WK_TB00000001_STANDARD}" "TOOLBAR 0" 59419 0 2 "0.00" 0 0 0 0 0 18 0 "" "0.0" \r
"{WK_TB00000002_EDITOR}" "TOOLBAR 0" 59419 0 0 "0.00" 0 0 0 0 0 18 0 "" "0.0" \r
"{WK_TB00000003_BOOKMARKS}" "TOOLBAR 0" 59419 1 1 "0.00" 0 0 0 0 0 17 0 "" "0.0" \r
"{WK_TB00000016_GRAPHIC}" "TOOLBAR 0" 59419 2 8 "0.00" 0 0 0 0 0 17 0 "" "0.0" \r
"{WK_TB00000018_DEFAULTWINDOW}" "TOOLBAR 0" 59419 1 2 "0.00" 0 0 0 0 0 17 0 "" "0.0" \r
"{WK_TB00000023_RTOS}" "TOOLBAR 0" 59419 2 11 "0.00" 0 0 0 0 0 17 0 "" "0.0" \r
-"{WK_TB00000025_HELPSYSTEMTOOL}" "TOOLBAR 0" 59419 2 3 "0.00" 0 0 0 0 0 18 0 "" "0.0" \r
+"{WK_TB00000025_HELPSYSTEMTOOL}" "TOOLBAR 0" 59419 2 4 "0.00" 0 0 0 0 0 18 0 "" "0.0" \r
"{WK_TB00000026_MACRO}" "TOOLBAR 0" 59419 1 6 "0.00" 0 0 0 0 0 17 0 "" "0.0" \r
"{WK_TB00000027_EVENT}" "TOOLBAR 0" 59419 2 7 "0.00" 0 0 0 0 0 17 0 "" "0.0" \r
-"{WK_TB00000028_RTOSDEBUG}" "TOOLBAR 0" 59419 2 2 "0.00" 0 0 0 0 0 18 0 "" "0.0" \r
-"{WK_TB00000029_SYSTEMTOOL}" "TOOLBAR 0" 59419 2 4 "0.00" 0 0 0 0 0 17 0 "" "0.0" \r
+"{WK_TB00000028_RTOSDEBUG}" "TOOLBAR 0" 59419 2 3 "0.00" 0 0 0 0 0 18 0 "" "0.0" \r
+"{WK_TB00000029_SYSTEMTOOL}" "TOOLBAR 0" 59419 2 5 "0.00" 0 0 0 0 0 17 0 "" "0.0" \r
[WINDOW_POSITION_STATE_DATA_VD2]\r
[WINDOW_POSITION_STATE_DATA_VD3]\r
[WINDOW_POSITION_STATE_DATA_VD4]\r
[WINDOW_Z_ORDER]\r
-"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-RDK_Renesas\RTOSDemo\main-full.c" \r
[TARGET_NAME]\r
"RX600 E1/E20 SYSTEM" "" 0 \r
[STATUSBAR_STATEINFO_VD1]\r
"SBK_TAR_EMUE100|Exception" 1 \r
"SBK_TAR_EMUE100|BreakCondition" 1 \r
"SBK_TAR_EMUE100|TaskID" 1 \r
-"SBK_TAR_EMUE100|ExecutionTime" 1 \r
"SBK_TAR_EMUE100|PC" 1 \r
+"SBK_TAR_EMUE100|ExecutionTime" 1 \r
[STATUSBAR_DEBUGGER_PANESTATE_VD2]\r
[STATUSBAR_DEBUGGER_PANESTATE_VD3]\r
[STATUSBAR_DEBUGGER_PANESTATE_VD4]\r
* : 06.10.2009 1.00 First Release\r
******************************************************************************/\r
\r
-#ifndef RSKRX62N_H\r
-#define RSKRX62N_H\r
+#ifndef RDKRX62N_H\r
+#define RDKRX62N_H\r
\r
/******************************************************************************\r
Includes <System Includes> , "Project Includes"\r
/* General Values */\r
#define LED_ON (1)\r
#define LED_OFF (0)\r
+#define SET_BIT_HIGH (1)\r
+#define SET_BIT_LOW (0)\r
+#define SET_BYTE_HIGH (0xFF)\r
+#define SET_BYTE_LOW (0x00)\r
+\r
+/* Define switches to be polled if not available as interrupts */\r
+#define SW_ACTIVE FALSE\r
+#define SW1 PORT4.PORT.BIT.B0\r
+#define SW2 PORT4.PORT.BIT.B1\r
+#define SW3 PORT4.PORT.BIT.B2\r
+#define SW1_DDR PORT4.DDR.BIT.B0\r
+#define SW2_DDR PORT4.DDR.BIT.B1\r
+#define SW3_DDR PORT4.DDR.BIT.B2\r
+#define SW1_ICR PORT4.ICR.BIT.B0\r
+#define SW2_ICR PORT4.ICR.BIT.B1\r
+#define SW3_ICR PORT4.ICR.BIT.B2\r
\r
/* LEDs */\r
-/* Define LEDs to Port Numbers */\r
-#define LED0 PORTD.DR.BIT.B0\r
-#define LED1 PORTD.DR.BIT.B1\r
-#define LED2 PORTD.DR.BIT.B2\r
-#define LED3 PORTD.DR.BIT.B3\r
-#define LED4 PORTD.DR.BIT.B4\r
-#define LED5 PORTD.DR.BIT.B5\r
-#define LED6 PORTD.DR.BIT.B6\r
-#define LED7 PORTD.DR.BIT.B7\r
-#define LED8 PORTE.DR.BIT.B0\r
-#define LED9 PORTE.DR.BIT.B1\r
-#define LED10 PORTE.DR.BIT.B2\r
-#define LED11 PORTE.DR.BIT.B3\r
-\r
-#define LED0_DDR PORTD.DDR.BIT.B0\r
-#define LED1_DDR PORTD.DDR.BIT.B1\r
-#define LED2_DDR PORTD.DDR.BIT.B2\r
-#define LED3_DDR PORTD.DDR.BIT.B3\r
-#define LED4_DDR PORTD.DDR.BIT.B4\r
-#define LED5_DDR PORTD.DDR.BIT.B5\r
-#define LED6_DDR PORTD.DDR.BIT.B6\r
-#define LED7_DDR PORTD.DDR.BIT.B7\r
-#define LED8_DDR PORTE.DDR.BIT.B0\r
-#define LED9_DDR PORTE.DDR.BIT.B1\r
-#define LED10_DDR PORTE.DDR.BIT.B2\r
-#define LED11_DDR PORTE.DDR.BIT.B3\r
+#define LED4 PORTD.DR.BIT.B5\r
+#define LED5 PORTE.DR.BIT.B3\r
+#define LED6 PORTD.DR.BIT.B2\r
+#define LED7 PORTE.DR.BIT.B0\r
+#define LED8 PORTD.DR.BIT.B4\r
+#define LED9 PORTE.DR.BIT.B2\r
+#define LED10 PORTD.DR.BIT.B1\r
+#define LED11 PORTD.DR.BIT.B7\r
+#define LED12 PORTD.DR.BIT.B3\r
+#define LED13 PORTE.DR.BIT.B1\r
+#define LED14 PORTD.DR.BIT.B0\r
+#define LED15 PORTD.DR.BIT.B6\r
+\r
+#define LED4_DDR PORTD.DDR.BIT.B5\r
+#define LED5_DDR PORTE.DDR.BIT.B3\r
+#define LED6_DDR PORTD.DDR.BIT.B2\r
+#define LED7_DDR PORTE.DDR.BIT.B0\r
+#define LED8_DDR PORTD.DDR.BIT.B4\r
+#define LED9_DDR PORTE.DDR.BIT.B2\r
+#define LED10_DDR PORTD.DDR.BIT.B1\r
+#define LED11_DDR PORTD.DDR.BIT.B7\r
+#define LED12_DDR PORTD.DDR.BIT.B3\r
+#define LED13_DDR PORTE.DDR.BIT.B1\r
+#define LED14_DDR PORTD.DDR.BIT.B0\r
+#define LED15_DDR PORTD.DDR.BIT.B6\r
\r
\r
\r
\r
\r
\r
-/* RSKRX62N_H */\r
+/* RDKRX62N_H */\r
#endif \r
\r
#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
\r
+/* The WEB server uses string handling functions, which in turn use a bit more\r
+stack than most of the other tasks. */\r
+#define mainuIP_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3 )\r
+\r
/* The LED toggled by the check task. */\r
#define mainCHECK_LED ( 5 )\r
\r
*/\r
static void prvCheckTask( void *pvParameters );\r
\r
+/*\r
+ * Contains the implementation of the WEB server.\r
+ */\r
+extern void vuIP_Task( void *pvParameters );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
/* Variables that are incremented on each iteration of the reg test tasks -\r
provided the tasks have not reported any errors. The check task inspects these\r
variables to ensure they are still incrementing as expected. If a variable\r
stops incrementing then it is likely that its associate task has stalled. */\r
unsigned long ulRegTest1CycleCount = 0UL, ulRegTest2CycleCount = 0UL;\r
\r
+/* The status message that is displayed at the bottom of the "task stats" web\r
+page, which is served by the uIP task. */\r
+const char *pcStatusMessage = "All tasks executing without error.";\r
+\r
/*-----------------------------------------------------------*/\r
\r
void main(void)\r
xTaskCreate( prvRegTest1Task, "RegTst1", configMINIMAL_STACK_SIZE, ( void * ) mainREG_TEST_1_PARAMETER, tskIDLE_PRIORITY, NULL );\r
xTaskCreate( prvRegTest2Task, "RegTst2", configMINIMAL_STACK_SIZE, ( void * ) mainREG_TEST_2_PARAMETER, tskIDLE_PRIORITY, NULL );\r
\r
+ /* The web server task. */\r
+ xTaskCreate( vuIP_Task, "uIP", mainuIP_STACK_SIZE, NULL, mainuIP_TASK_PRIORITY, NULL );\r
+\r
/* Start the check task as described at the top of this file. */\r
xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE * 3, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
\r
extern void vSetupHighFrequencyTimer( void );\r
extern volatile unsigned short usMaxJitter;\r
volatile unsigned long ulActualJitter = 0;\r
-static char cErrorText[ 100 ];\r
\r
/* If this is being executed then the kernel has been started. Start the high\r
frequency timer test as described at the top of this file. This is only\r
rate at which mainCHECK_LED flashes to give visual feedback that an error\r
has occurred. */\r
xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: GenQueue" );\r
+ pcStatusMessage = "Error: GenQueue";\r
}\r
else if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
{\r
xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: QueuePeek" );\r
+ pcStatusMessage = "Error: QueuePeek";\r
}\r
else if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
{\r
xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: BlockQueue" );\r
+ pcStatusMessage = "Error: BlockQueue";\r
}\r
else if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
{\r
xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: BlockTime" );\r
+ pcStatusMessage = "Error: BlockTime";\r
}\r
else if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
{\r
xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: SemTest" );\r
+ pcStatusMessage = "Error: SemTest";\r
}\r
else if( xArePollingQueuesStillRunning() != pdTRUE )\r
{\r
xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: PollQueue" );\r
+ pcStatusMessage = "Error: PollQueue";\r
}\r
else if( xIsCreateTaskStillRunning() != pdTRUE )\r
{\r
xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: Death" );\r
+ pcStatusMessage = "Error: Death";\r
}\r
else if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
{\r
xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: IntMath" );\r
+ pcStatusMessage = "Error: IntMath";\r
}\r
else if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
{\r
xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: RecMutex" );\r
+ pcStatusMessage = "Error: RecMutex";\r
}\r
else if( xAreIntQueueTasksStillRunning() != pdPASS )\r
{\r
xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: IntQueue" );\r
+ pcStatusMessage = "Error: IntQueue";\r
}\r
else if( xAreMathsTaskStillRunning() != pdPASS )\r
{\r
xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: Flop" );\r
+ pcStatusMessage = "Error: Flop";\r
}\r
\r
/* Check the reg test tasks are still cycling. They will stop incrementing\r
if( ulRegTest1CycleCount == ulLastRegTest1CycleCount )\r
{\r
xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: RegTest1" );\r
+ pcStatusMessage = "Error: RegTest1";\r
}\r
\r
if( ulRegTest2CycleCount == ulLastRegTest2CycleCount )\r
{\r
xCycleFrequency = mainERROR_CYCLE_TIME;\r
- strcpy( cErrorText, "Error: RegTest2" );\r
+ pcStatusMessage = "Error: RegTest2";\r
}\r
\r
ulLastRegTest1CycleCount = ulRegTest1CycleCount;\r
; - causing the check task to indicate the error.\r
BRA RegTest2Error\r
}\r
+/*-----------------------------------------------------------*/\r
\r
+void vTaskGetRunTimeStats( signed char *pcWriteBuffer )\r
+{\r
+ /* Not implemented yet, so put here to keep the linker happy. */\r
+}\r
+/*-----------------------------------------------------------*/\r
\r
-\r
+char *pcGetTaskStatusMessage( void )\r
+{\r
+ /* Not bothered about a critical section here. This just returns a string\r
+ that is displaed on the "Task Stats" WEB page served by this demo. */\r
+ return pcStatusMessage;\r
+}\r
+/*-----------------------------------------------------------*/\r
\r
\r
/* Demo includes. */\r
#include "ParTest.h"\r
\r
-/* Hardware includes. */\r
-#include "hwEthernet.h"\r
-\r
/*-----------------------------------------------------------*/\r
\r
/* How long to wait before attempting to connect the MAC again. */\r
/* Hardware specific includes. */\r
#include "iodefine.h"\r
#include "typedefine.h"\r
-#include "hwEthernet.h"\r
-#include "hwEthernetPhy.h"\r
+#include "r_ether.h"\r
+#include "phy.h"\r
\r
/* FreeRTOS includes. */\r
#include "FreeRTOS.h"\r
/*-----------------------------------------------------------*/\r
\r
/* The buffers and descriptors themselves. */\r
-#pragma section RX_DESCR\r
- ethfifo xRxDescriptors[ emacNUM_RX_DESCRIPTORS ];\r
-#pragma section TX_DESCR\r
- ethfifo xTxDescriptors[ emacNUM_TX_BUFFERS ];\r
-#pragma section _ETHERNET_BUFFERS\r
- char xEthernetBuffers[ emacNUM_BUFFERS ][ UIP_BUFSIZE ];\r
-#pragma section\r
+static union x_RX_Desc\r
+{\r
+ unsigned long long ullAlignmentVariable;\r
+ ethfifo xDescriptorArray[ emacNUM_RX_DESCRIPTORS ];\r
+} xRxDescriptors;\r
+\r
+static union x_TX_Desc\r
+{\r
+ unsigned long long ullAlignmentVariable;\r
+ ethfifo xDescriptorArray[ emacNUM_TX_BUFFERS ];\r
+} xTxDescriptors;\r
+\r
+static union x_ETH_Buffers\r
+{\r
+ unsigned long long ullAlignmentVariable;\r
+ char xDataBuffers[ emacNUM_BUFFERS ][ UIP_BUFSIZE ];\r
+} xEthernetBuffers;\r
+\r
\r
/* Used to indicate which buffers are free and which are in use. If an index\r
-contains 0 then the corresponding buffer in xEthernetBuffers is free, otherwise \r
+contains 0 then the corresponding buffer in xEthernetBuffers.xDataBuffers is free, otherwise \r
the buffer is in use or about to be used. */\r
static unsigned char ucBufferInUse[ emacNUM_BUFFERS ];\r
\r
static void prvInitialiseDescriptors( void );\r
\r
/*\r
- * Return a pointer to a free buffer within xEthernetBuffers.\r
+ * Return a pointer to a free buffer within xEthernetBuffers.xDataBuffers.\r
*/\r
static unsigned char *prvGetNextBuffer( void );\r
\r
/*\r
* Setup the microcontroller for communication with the PHY.\r
*/\r
-static void prvSetupPortPinsAndReset( void );\r
+static void prvResetMAC( void );\r
\r
/*\r
* Configure the Ethernet interface peripherals.\r
\r
void vInitEmac( void )\r
{\r
- /* Setup the SH hardware for MII communications. */\r
- prvSetupPortPinsAndReset();\r
+ /* Software reset. */\r
+ prvResetMAC();\r
\r
/* Set the Rx and Tx descriptors into their initial state. */\r
prvInitialiseDescriptors();\r
\r
/* Set the MAC address into the ETHERC */\r
- EtherC.MAHR = ( ( unsigned long ) configMAC_ADDR0 << 24UL ) | \r
+ ETHERC.MAHR = ( ( unsigned long ) configMAC_ADDR0 << 24UL ) | \r
( ( unsigned long ) configMAC_ADDR1 << 16UL ) | \r
( ( unsigned long ) configMAC_ADDR2 << 8UL ) | \r
( unsigned long ) configMAC_ADDR3;\r
\r
- EtherC.MALR.BIT.MA = ( ( unsigned long ) configMAC_ADDR4 << 8UL ) |\r
+ ETHERC.MALR.BIT.MA = ( ( unsigned long ) configMAC_ADDR4 << 8UL ) |\r
( unsigned long ) configMAC_ADDR5;\r
\r
/* Perform rest of interface hardware configuration. */\r
uip_buf = NULL;\r
\r
/* Initialize the PHY */\r
- phyReset();\r
+ phy_init();\r
}\r
/*-----------------------------------------------------------*/\r
\r
/* Wait until the second transmission of the last packet has completed. */\r
for( x = 0; x < emacTX_WAIT_ATTEMPTS; x++ )\r
{\r
- if( ( xTxDescriptors[ 1 ].status & ACT ) != 0 )\r
+ if( ( xTxDescriptors.xDescriptorArray[ 1 ].status & ACT ) != 0 )\r
{\r
/* Descriptor is still active. */\r
vTaskDelay( emacTX_WAIT_DELAY_ms );\r
}\r
\r
/* Is the descriptor free after waiting for it? */\r
- if( ( xTxDescriptors[ 1 ].status & ACT ) != 0 )\r
+ if( ( xTxDescriptors.xDescriptorArray[ 1 ].status & ACT ) != 0 )\r
{\r
/* Something has gone wrong. */\r
prvResetEverything();\r
}\r
\r
/* Setup both descriptors to transmit the frame. */\r
- xTxDescriptors[ 0 ].buf_p = ( char * ) uip_buf;\r
- xTxDescriptors[ 0 ].bufsize = uip_len; \r
- xTxDescriptors[ 1 ].buf_p = ( char * ) uip_buf;\r
- xTxDescriptors[ 1 ].bufsize = uip_len;\r
+ xTxDescriptors.xDescriptorArray[ 0 ].buf_p = ( char * ) uip_buf;\r
+ xTxDescriptors.xDescriptorArray[ 0 ].bufsize = uip_len; \r
+ xTxDescriptors.xDescriptorArray[ 1 ].buf_p = ( char * ) uip_buf;\r
+ xTxDescriptors.xDescriptorArray[ 1 ].bufsize = uip_len;\r
\r
/* uip_buf is being sent by the Tx descriptor. Allocate a new buffer\r
for use by the stack. */\r
uip_buf = prvGetNextBuffer();\r
\r
/* Clear previous settings and go. */\r
- xTxDescriptors[0].status &= ~( FP1 | FP0 );\r
- xTxDescriptors[0].status |= ( FP1 | FP0 | ACT );\r
- xTxDescriptors[1].status &= ~( FP1 | FP0 );\r
- xTxDescriptors[1].status |= ( FP1 | FP0 | ACT );\r
+ xTxDescriptors.xDescriptorArray[0].status &= ~( FP1 | FP0 );\r
+ xTxDescriptors.xDescriptorArray[0].status |= ( FP1 | FP0 | ACT );\r
+ xTxDescriptors.xDescriptorArray[1].status &= ~( FP1 | FP0 );\r
+ xTxDescriptors.xDescriptorArray[1].status |= ( FP1 | FP0 | ACT );\r
\r
EDMAC.EDTRR.LONG = 0x00000001;\r
}\r
long lReturn;\r
\r
/* Set the link status. */\r
- switch( phyStatus() )\r
+ switch( phy_set_autonegotiate() )\r
{\r
/* Half duplex link */\r
case PHY_LINK_100H:\r
case PHY_LINK_10H:\r
- EtherC.ECMR.BIT.DM = 0;\r
+ ETHERC.ECMR.BIT.DM = 0;\r
lReturn = pdPASS;\r
break;\r
\r
/* Full duplex link */\r
case PHY_LINK_100F:\r
case PHY_LINK_10F:\r
- EtherC.ECMR.BIT.DM = 1;\r
+ ETHERC.ECMR.BIT.DM = 1;\r
lReturn = pdPASS;\r
break;\r
\r
if( lReturn == pdPASS )\r
{\r
/* Enable receive and transmit. */\r
- EtherC.ECMR.BIT.RE = 1;\r
- EtherC.ECMR.BIT.TE = 1;\r
+ ETHERC.ECMR.BIT.RE = 1;\r
+ ETHERC.ECMR.BIT.TE = 1;\r
\r
/* Enable EDMAC receive */\r
EDMAC.EDRRR.LONG = 0x1;\r
/* Initialise the Rx descriptors. */\r
for( x = 0; x < emacNUM_RX_DESCRIPTORS; x++ )\r
{\r
- pxDescriptor = &( xRxDescriptors[ x ] );\r
- pxDescriptor->buf_p = &( xEthernetBuffers[ x ][ 0 ] );\r
+ pxDescriptor = &( xRxDescriptors.xDescriptorArray[ x ] );\r
+ pxDescriptor->buf_p = &( xEthernetBuffers.xDataBuffers[ x ][ 0 ] );\r
\r
pxDescriptor->bufsize = UIP_BUFSIZE;\r
pxDescriptor->size = 0;\r
pxDescriptor->status = ACT;\r
- pxDescriptor->next = &xRxDescriptors[ x + 1 ]; \r
+ pxDescriptor->next = &xRxDescriptors.xDescriptorArray[ x + 1 ]; \r
\r
/* Mark this buffer as in use. */\r
ucBufferInUse[ x ] = pdTRUE;\r
\r
/* The last descriptor points back to the start. */\r
pxDescriptor->status |= DL;\r
- pxDescriptor->next = &xRxDescriptors[ 0 ];\r
+ pxDescriptor->next = &xRxDescriptors.xDescriptorArray[ 0 ];\r
\r
/* Initialise the Tx descriptors. */\r
for( x = 0; x < emacNUM_TX_BUFFERS; x++ )\r
{\r
- pxDescriptor = &( xTxDescriptors[ x ] );\r
+ pxDescriptor = &( xTxDescriptors.xDescriptorArray[ x ] );\r
\r
/* A buffer is not allocated to the Tx descriptor until a send is\r
actually required. */\r
pxDescriptor->bufsize = UIP_BUFSIZE;\r
pxDescriptor->size = 0;\r
pxDescriptor->status = 0;\r
- pxDescriptor->next = &xTxDescriptors[ x + 1 ]; \r
+ pxDescriptor->next = &xTxDescriptors.xDescriptorArray[ x + 1 ]; \r
}\r
\r
/* The last descriptor points back to the start. */\r
pxDescriptor->status |= DL;\r
- pxDescriptor->next = &( xTxDescriptors[ 0 ] );\r
+ pxDescriptor->next = &( xTxDescriptors.xDescriptorArray[ 0 ] );\r
\r
/* Use the first Rx descriptor to start with. */\r
- xCurrentRxDesc = &( xRxDescriptors[ 0 ] );\r
+ xCurrentRxDesc = &( xRxDescriptors.xDescriptorArray[ 0 ] );\r
}\r
/*-----------------------------------------------------------*/\r
\r
if( ucBufferInUse[ x ] == pdFALSE )\r
{\r
ucBufferInUse[ x ] = pdTRUE;\r
- pucReturn = ( unsigned char * ) &( xEthernetBuffers[ x ][ 0 ] );\r
+ pucReturn = ( unsigned char * ) &( xEthernetBuffers.xDataBuffers[ x ][ 0 ] );\r
break;\r
}\r
}\r
/* Return a buffer to the pool of free buffers. */\r
for( ul = 0; ul < emacNUM_BUFFERS; ul++ )\r
{\r
- if( &( xEthernetBuffers[ ul ][ 0 ] ) == ( void * ) pucBuffer )\r
+ if( &( xEthernetBuffers.xDataBuffers[ ul ][ 0 ] ) == ( void * ) pucBuffer )\r
{\r
ucBufferInUse[ ul ] = pdFALSE;\r
break;\r
}\r
/*-----------------------------------------------------------*/\r
\r
-static void prvSetupPortPinsAndReset( void )\r
+static void prvResetMAC( void )\r
{\r
- /* Initialisation code taken from Renesas example project. */\r
- \r
- PFC.PACRL4.BIT.PA12MD = 0x7; /* Set TX_CLK input (EtherC) */\r
- PFC.PACRL3.BIT.PA11MD = 0x7; /* Set TX_EN output (EtherC) */\r
- PFC.PACRL3.BIT.PA10MD = 0x7; /* Set MII_TXD0 output (EtherC) */\r
- PFC.PACRL3.BIT.PA9MD = 0x7; /* Set MII_TXD1 output (EtherC) */\r
- PFC.PACRL3.BIT.PA8MD = 0x7; /* Set MII_TXD2 output (EtherC) */\r
- PFC.PACRL2.BIT.PA7MD = 0x7; /* Set MII_TXD3 output (EtherC) */\r
- PFC.PACRL2.BIT.PA6MD = 0x7; /* Set TX_ER output (EtherC) */\r
- PFC.PDCRH4.BIT.PD31MD = 0x7; /* Set RX_DV input (EtherC) */\r
- PFC.PDCRH4.BIT.PD30MD = 0x7; /* Set RX_ER input (EtherC) */\r
- PFC.PDCRH4.BIT.PD29MD = 0x7; /* Set MII_RXD3 input (EtherC) */\r
- PFC.PDCRH4.BIT.PD28MD = 0x7; /* Set MII_RXD2 input (EtherC) */\r
- PFC.PDCRH3.BIT.PD27MD = 0x7; /* Set MII_RXD1 input (EtherC) */\r
- PFC.PDCRH3.BIT.PD26MD = 0x7; /* Set MII_RXD0 input (EtherC) */\r
- PFC.PDCRH3.BIT.PD25MD = 0x7; /* Set RX_CLK input (EtherC) */\r
- PFC.PDCRH3.BIT.PD24MD = 0x7; /* Set CRS input (EtherC) */\r
- PFC.PDCRH2.BIT.PD23MD = 0x7; /* Set COL input (EtherC) */\r
- PFC.PDCRH2.BIT.PD22MD = 0x7; /* Set WOL output (EtherC) */\r
- PFC.PDCRH2.BIT.PD21MD = 0x7; /* Set EXOUT output (EtherC) */\r
- PFC.PDCRH2.BIT.PD20MD = 0x7; /* Set MDC output (EtherC) */\r
- PFC.PDCRH1.BIT.PD19MD = 0x7; /* Set LINKSTA input (EtherC) */\r
- PFC.PDCRH1.BIT.PD18MD = 0x7; /* Set MDIO input/output (EtherC) */\r
+ /* Ensure the EtherC and EDMAC are enabled. */\r
+ SYSTEM.MSTPCRB.BIT.MSTPB15 = 0;\r
+ vTaskDelay( 100 / portTICK_RATE_MS );\r
\r
- STB.CR4.BIT._ETHER = 0x0; \r
EDMAC.EDMR.BIT.SWR = 1; \r
\r
/* Crude wait for reset to complete. */\r
/* Initialisation code taken from Renesas example project. */\r
\r
/* TODO: Check bit 5 */\r
- EtherC.ECSR.LONG = 0x00000037; /* Clear all EtherC statuS BFR, PSRTO, LCHNG, MPD, ICD */\r
+ ETHERC.ECSR.LONG = 0x00000037; /* Clear all ETHERC statuS BFR, PSRTO, LCHNG, MPD, ICD */\r
+\r
+ /* Set the EDMAC interrupt priority. */\r
+ _IPR( _ETHER_EINT ) = configKERNEL_INTERRUPT_PRIORITY;\r
\r
/* TODO: Check bit 5 */\r
- EtherC.ECSIPR.LONG = 0x00000020; /* Disable EtherC status change interrupt */\r
- EtherC.RFLR.LONG = 1518; /* Ether payload is 1500+ CRC */\r
- EtherC.IPGR.LONG = 0x00000014; /* Intergap is 96-bit time */\r
+ /* Enable interrupts of interest only. */\r
+ EDMAC.EESIPR.LONG = emacTX_END_INTERRUPT | emacRX_END_INTERRUPT;\r
+ ETHERC.RFLR.LONG = 1518; /* Ether payload is 1500+ CRC */\r
+ ETHERC.IPGR.LONG = 0x00000014; /* Intergap is 96-bit time */\r
\r
/* EDMAC */\r
- EDMAC.EESR.LONG = 0x47FF0F9F; /* Clear all EtherC and EDMAC status bits */\r
+ EDMAC.EESR.LONG = 0x47FF0F9F; /* Clear all ETHERC and EDMAC status bits */\r
EDMAC.RDLAR = ( void * ) xCurrentRxDesc; /* Initialaize Rx Descriptor List Address */\r
- EDMAC.TDLAR = &( xTxDescriptors[ 0 ] ); /* Initialaize Tx Descriptor List Address */\r
+ EDMAC.TDLAR = &( xTxDescriptors.xDescriptorArray[ 0 ] ); /* Initialaize Tx Descriptor List Address */\r
EDMAC.TRSCER.LONG = 0x00000000; /* Copy-back status is RFE & TFE only */\r
EDMAC.TFTR.LONG = 0x00000000; /* Threshold of Tx_FIFO */\r
EDMAC.FDR.LONG = 0x00000000; /* Transmit fifo & receive fifo is 256 bytes */\r
EDMAC.RMCR.LONG = 0x00000003; /* Receive function is normal mode(continued) */\r
-\r
- /* Set the EDMAC interrupt priority - the interrupt priority must be\r
- configKERNEL_INTERRUPT_PRIORITY no matter which peripheral is used to \r
- generate the tick interrupt. */\r
- INTC.IPR19.BIT._EDMAC = portKERNEL_INTERRUPT_PRIORITY;\r
- EDMAC.EESIPR.LONG = emacTX_END_INTERRUPT | emacRX_END_INTERRUPT; /* Enable Rx and Tx end interrupts. */\r
-\r
- /* Clear the interrupt flag. */\r
- CMT0.CMCSR.BIT.CMF = 0;\r
}\r
/*-----------------------------------------------------------*/\r
\r
+#pragma interrupt ( vEMAC_ISR_Handler( vect = VECT_ETHER_EINT, enable ) )\r
void vEMAC_ISR_Handler( void )\r
{\r
unsigned long ul = EDMAC.EESR.LONG;\r
if( ulTxEndInts >= 2 )\r
{\r
/* Only return the buffer to the pool once both Txes have completed. */\r
- prvReturnBuffer( ( void * ) xTxDescriptors[ 0 ].buf_p );\r
+ prvReturnBuffer( ( void * ) xTxDescriptors.xDescriptorArray[ 0 ].buf_p );\r
ulTxEndInts = 0;\r
}\r
EDMAC.EESR.LONG = emacTX_END_INTERRUPT;\r
+++ /dev/null
-;/*\r
-; FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.\r
-;\r
-; ***************************************************************************\r
-; * *\r
-; * If you are: *\r
-; * *\r
-; * + New to FreeRTOS, *\r
-; * + Wanting to learn FreeRTOS or multitasking in general quickly *\r
-; * + Looking for basic training, *\r
-; * + Wanting to improve your FreeRTOS skills and productivity *\r
-; * *\r
-; * then take a look at the FreeRTOS eBook *\r
-; * *\r
-; * "Using the FreeRTOS Real Time Kernel - a Practical Guide" *\r
-; * http://www.FreeRTOS.org/Documentation *\r
-; * *\r
-; * A pdf reference manual is also available. Both are usually delivered *\r
-; * to your inbox within 20 minutes to two hours when purchased between 8am *\r
-; * and 8pm GMT (although please allow up to 24 hours in case of *\r
-; * exceptional circumstances). Thank you for your support! *\r
-; * *\r
-; ***************************************************************************\r
-;\r
-; This file is part of the FreeRTOS distribution.\r
-;\r
-; FreeRTOS is free software; you can redistribute it and/or modify it under\r
-; the terms of the GNU General Public License (version 2) as published by the\r
-; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
-; ***NOTE*** The exception to the GPL is included to allow you to distribute\r
-; a combined work that includes FreeRTOS without being obliged to provide the\r
-; source code for proprietary components outside of the FreeRTOS kernel.\r
-; FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
-; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
-; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
-; more details. You should have received a copy of the GNU General Public \r
-; License and the FreeRTOS license exception along with FreeRTOS; if not it \r
-; can be viewed here: http://www.freertos.org/a00114.html and also obtained \r
-; by writing to Richard Barry, contact details for whom are available on the\r
-; FreeRTOS WEB site.\r
-;\r
-; 1 tab == 4 spaces!\r
-;\r
-; http://www.FreeRTOS.org - Documentation, latest information, license and\r
-; contact details.\r
-;\r
-; http://www.SafeRTOS.com - A version that is certified for use in safety\r
-; critical systems.\r
-;\r
-; http://www.OpenRTOS.com - Commercial support, development, porting,\r
-; licensing and training services.\r
-;*/\r
-\r
- .import _vEMAC_ISR_Handler\r
- .import _pxCurrentTCB\r
- .export _vEMAC_ISR_Wrapper\r
-\r
- .INCLUDE "ISR_Support.inc"\r
-\r
- .section P\r
-\r
-;-----------------------------------------------------------\r
- \r
-_vEMAC_ISR_Wrapper:\r
-\r
- portSAVE_CONTEXT\r
-\r
- mov.l #_vEMAC_ISR_Handler, r0\r
- jsr @r0\r
- nop\r
-\r
- portRESTORE_CONTEXT\r
- \r
-;-----------------------------------------------------------\r
-\r
-\r
-\r
- .end\r
- \r
projects / freertos / commitdiff