--- /dev/null
+/*\r
+ FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining\r
+all the API functions to use the MPU wrappers. That should only be done when\r
+task.h is included from an application file. */\r
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
+\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "queue.h"\r
+\r
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
+\r
+#if configUSE_MPU == 1\r
+\r
+/* Function for raising the privilege of a task. */\r
+extern portBASE_TYPE xPortRaisePrivilege( void );\r
+\r
+/*\r
+ * Prototypes for all the MPU wrappers.\r
+ */\r
+signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions );\r
+void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions );\r
+void MPU_vTaskDelete( xTaskHandle pxTaskToDelete );\r
+void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement );\r
+void MPU_vTaskDelay( portTickType xTicksToDelay );\r
+unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask );\r
+void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );\r
+void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend );\r
+signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask );\r
+void MPU_vTaskResume( xTaskHandle pxTaskToResume );\r
+void MPU_vTaskSuspendAll( void );\r
+signed portBASE_TYPE MPU_xTaskResumeAll( void );\r
+portTickType MPU_xTaskGetTickCount( void );\r
+unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void );\r
+void MPU_vTaskList( signed char *pcWriteBuffer );\r
+void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer );\r
+void MPU_vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize );\r
+unsigned long MPU_ulTaskEndTrace( void );\r
+void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue );\r
+pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask );\r
+portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter );\r
+unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask );\r
+xTaskHandle MPU_xTaskGetCurrentTaskHandle( void );\r
+portBASE_TYPE MPU_xTaskGetSchedulerState( void );\r
+xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize );\r
+signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
+unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue );\r
+signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
+xQueueHandle MPU_xQueueCreateMutex( void );\r
+xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount );\r
+portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime );\r
+portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex );\r
+signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
+signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
+void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName );\r
+void *MPU_pvPortMalloc( size_t xSize );\r
+void MPU_vPortFree( void *pv );\r
+void MPU_vPortInitialiseBlocks( void );\r
+size_t MPU_xPortGetFreeHeapSize( void );\r
+/*---------------------------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )\r
+{\r
+signed portBASE_TYPE xReturn;\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )\r
+{\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vTaskAllocateMPURegions( xTask, xRegions );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_vTaskDelete == 1 )\r
+ void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vTaskDelete( pxTaskToDelete );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_vTaskDelayUntil == 1 )\r
+ void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_vTaskDelay == 1 )\r
+ void MPU_vTaskDelay( portTickType xTicksToDelay )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vTaskDelay( xTicksToDelay );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_uxTaskPriorityGet == 1 )\r
+ unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )\r
+ {\r
+ unsigned portBASE_TYPE uxReturn;\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ uxReturn = uxTaskPriorityGet( pxTask );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return uxReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_vTaskPrioritySet == 1 )\r
+ void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vTaskPrioritySet( pxTask, uxNewPriority );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_vTaskSuspend == 1 )\r
+ void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vTaskSuspend( pxTaskToSuspend );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_vTaskSuspend == 1 )\r
+ signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )\r
+ {\r
+ signed portBASE_TYPE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xTaskIsTaskSuspended( xTask );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_vTaskSuspend == 1 )\r
+ void MPU_vTaskResume( xTaskHandle pxTaskToResume )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vTaskResume( pxTaskToResume );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+void MPU_vTaskSuspendAll( void )\r
+{\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vTaskSuspendAll();\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE MPU_xTaskResumeAll( void )\r
+{\r
+signed portBASE_TYPE xReturn;\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xTaskResumeAll();\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portTickType MPU_xTaskGetTickCount( void )\r
+{\r
+portTickType xReturn;\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xTaskGetTickCount();\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )\r
+{\r
+unsigned portBASE_TYPE uxReturn;\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ uxReturn = uxTaskGetNumberOfTasks();\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return uxReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_TRACE_FACILITY == 1 )\r
+ void MPU_vTaskList( signed char *pcWriteBuffer )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vTaskList( pcWriteBuffer );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configGENERATE_RUN_TIME_STATS == 1 )\r
+ void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vTaskGetRunTimeStats( pcWriteBuffer );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_TRACE_FACILITY == 1 )\r
+ void MPU_vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vTaskStartTrace( pcBuffer, ulBufferSize );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_TRACE_FACILITY == 1 )\r
+ unsigned long MPU_ulTaskEndTrace( void )\r
+ {\r
+ unsigned long ulReturn;\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ ulReturn = ulTaskEndTrace();\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return ulReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
+ void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vTaskSetApplicationTaskTag( xTask, pxTagValue );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
+ pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )\r
+ {\r
+ pdTASK_HOOK_CODE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xTaskGetApplicationTaskTag( xTask );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
+ portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )\r
+ {\r
+ portBASE_TYPE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )\r
+ unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )\r
+ {\r
+ unsigned portBASE_TYPE uxReturn;\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ uxReturn = uxTaskGetStackHighWaterMark( xTask );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return uxReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )\r
+ xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )\r
+ {\r
+ xTaskHandle xReturn;\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xTaskGetCurrentTaskHandle();\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( INCLUDE_xTaskGetSchedulerState == 1 )\r
+ portBASE_TYPE MPU_xTaskGetSchedulerState( void )\r
+ {\r
+ portBASE_TYPE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xTaskGetSchedulerState();\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+void MPU_vTaskEnterCritical( void )\r
+{\r
+extern void vTaskEnterCritical( void );\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vTaskEnterCritical();\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void MPU_vTaskExitCritical( void )\r
+{\r
+extern void vTaskExitCritical( void );\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vTaskExitCritical();\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize )\r
+{\r
+xQueueHandle xReturn;\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xQueueCreate( uxQueueLength, uxItemSize );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
+{\r
+signed portBASE_TYPE xReturn;\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )\r
+{\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+unsigned portBASE_TYPE uxReturn;\r
+\r
+ uxReturn = uxQueueMessagesWaiting( pxQueue );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return uxReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
+{\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+signed portBASE_TYPE xReturn;\r
+\r
+ xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_MUTEXES == 1 )\r
+ xQueueHandle MPU_xQueueCreateMutex( void )\r
+ {\r
+ xQueueHandle xReturn;\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xQueueCreateMutex();\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if configUSE_COUNTING_SEMAPHORES == 1\r
+ xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )\r
+ {\r
+ xQueueHandle xReturn;\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = (xQueueHandle) xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_MUTEXES == 1 )\r
+ portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )\r
+ {\r
+ portBASE_TYPE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if ( configUSE_MUTEXES == 1 )\r
+ portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )\r
+ {\r
+ portBASE_TYPE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xQueueGiveMutexRecursive( xMutex );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if configUSE_ALTERNATIVE_API == 1\r
+ signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
+ {\r
+ signed portBASE_TYPE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if configUSE_ALTERNATIVE_API == 1\r
+ signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
+ {\r
+ signed portBASE_TYPE xReturn;\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ return xReturn;\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+#if configQUEUE_REGISTRY_SIZE > 0\r
+ void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName )\r
+ {\r
+ portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vQueueAddToRegistry( xQueue, pcName );\r
+\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+ }\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+void *MPU_pvPortMalloc( size_t xSize )\r
+{\r
+void *pvReturn;\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ pvReturn = pvPortMalloc( xSize );\r
+\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+\r
+ return pvReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void MPU_vPortFree( void *pv )\r
+{\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vPortFree( pv );\r
+\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+size_t xPortGetFreeHeapSize( void )\r
+{\r
+ /* This just exists to keep the linker quiet. */\r
+extern unsigned long _lc_ub_heap[]; /* Heap */\r
+extern unsigned long _lc_ue_heap[]; /* Heap end */\r
+ return (size_t)( _lc_ue_heap - _lc_ub_heap );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortInitialiseBlocks( void )\r
+{\r
+ /* This just exists to keep the linker quiet. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void MPU_vPortInitialiseBlocks( void )\r
+{\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ vPortInitialiseBlocks();\r
+\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+size_t MPU_xPortGetFreeHeapSize( void )\r
+{\r
+size_t xReturn;\r
+portBASE_TYPE xRunningPrivileged = xPortRaisePrivilege();\r
+\r
+ xReturn = xPortGetFreeHeapSize();\r
+\r
+ portMPU_RESTORE_PRIORITY( xRunningPrivileged );\r
+\r
+ return xReturn;\r
+}\r
+\r
+#endif /* configUSE_MPU */\r
--- /dev/null
+/*\r
+ FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/* Standard includes. */\r
+#include <stdlib.h>\r
+#include <string.h>\r
+#include <tc1782.h>\r
+#include <machine/intrinsics.h>\r
+#include <machine/cint.h>\r
+#include <machine/wdtcon.h>\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "list.h"\r
+/*-----------------------------------------------------------*/\r
+\r
+/* System register Definitions. */\r
+#define portSYSTEM_PROGRAM_STATUS_WORD ( (unsigned portBASE_TYPE) 0x000008FF ) /* Supervisor Mode, MPU Register Set 0 and Call Depth Counting disabled. */\r
+#define portINITIAL_PRIVILEGED_PROGRAM_STATUS_WORD ( (unsigned portBASE_TYPE) 0x000014FF ) /* IO Level 1, MPU Register Set 1 and Call Depth Counting disabled. */\r
+#define portINITIAL_UNPRIVILEGED_PROGRAM_STATUS_WORD ( (unsigned portBASE_TYPE) 0x000010FF ) /* IO Level 0, MPU Register Set 1 and Call Depth Counting disabled. */\r
+#define portINITIAL_PCXI_UPPER_CONTEXT_WORD ( (unsigned portBASE_TYPE) 0x00C00000 ) /* The lower 20 bits identify the CSA address. */\r
+#define portINITIAL_PCXI_LOWER_CONTEXT_WORD ( (unsigned portBASE_TYPE) 0x00000000 ) /* The lower 20 bits identify the CSA address. */\r
+#define portUPPER_CONTEXT_BIT ( (unsigned portBASE_TYPE) 0x00400000 ) /* Bit that indicates whether the context is upper or lower. */\r
+\r
+#define portINITIAL_SYSCON ( (unsigned portBASE_TYPE) 0x00000000 ) /* MPU Disable. */\r
+\r
+#define portSELECT_PROGRAM_STATUS_WORD( xRunPrivileged ) ( ( xRunPrivileged ) ? portINITIAL_PRIVILEGED_PROGRAM_STATUS_WORD : portINITIAL_UNPRIVILEGED_PROGRAM_STATUS_WORD )\r
+\r
+/* CSA manipulation macros. */\r
+#define portCSA_FCX_MASK ( 0x000FFFFFUL )\r
+\r
+/* OS Interrupt and Trap mechanisms. */\r
+#define portRESTORE_PSW_MASK ( ~( 0x000000FFUL ) )\r
+#define portSYSCALL_TRAP 6\r
+#define portCCPN_MASK ( 0x000000FFUL )\r
+\r
+#define portSYSTEM_DATA_PRIVILEGES ( 0xC0C0C0C0UL )\r
+#define portSYSTEM_CODE_PRIVILEGES ( 0x00008080UL )\r
+\r
+#define portSYSTEM_PRIVILEGE_PROGRAM_STATUS_WORD ( (unsigned portBASE_TYPE) 0x00000800 ) /* Supervisor Mode. */\r
+/*-----------------------------------------------------------*/\r
+\r
+#if configCHECK_FOR_STACK_OVERFLOW > 0\r
+ #error "pxTopOfStack is used to store the last used CSA so it is not appropriate to enable stack checking."\r
+ /* The stack pointer is accessible using portCSA_TO_ADDRESS( portCSA_TO_ADDRESS( pxCurrentTCB->pxTopOfStack )[ 0 ] )[ 2 ]; */\r
+#endif /* configCHECK_FOR_STACK_OVERFLOW */\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * This reference is required by the Save/Restore Context Macros.\r
+ */\r
+extern volatile unsigned portBASE_TYPE * pxCurrentTCB;\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Perform any hardware configuration necessary to generate the tick interrupt.\r
+ */\r
+void vPortSystemTickHandler( int ) __attribute__((longcall));\r
+static void prvSetupTimerInterrupt( void );\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The Yield Handler and Syscalls when using the MPU build.\r
+ */\r
+void vPortYield( int iTrapIdentification );\r
+/*-----------------------------------------------------------*/\r
+\r
+portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+{\r
+unsigned portBASE_TYPE *pxUpperCSA = NULL;\r
+unsigned portBASE_TYPE *pxLowerCSA = NULL;\r
+\r
+ /* 16 Address Registers (4 Address registers are global) and 16 Data Registers. */\r
+ /* 3 System Registers */\r
+\r
+ /* There are 3 registers that track the CSAs. */\r
+ /* FCX points to the head of globally free set of CSAs.\r
+ * PCX for the task needs to point to Lower->Upper->NULL arrangement.\r
+ * LCX points to the last free CSA so that corrective action can be taken.\r
+ */\r
+\r
+ /* Need two CSAs to store the context of a task.\r
+ * The upper context contains D8-D15, A10-A15, PSW and PCXI->NULL.\r
+ * The lower context contains D0-D7, A2-A7, A11 and PCXI->UpperContext.\r
+ * The pxCurrentTCB->pxTopOfStack points to the Lower Context RSLCX matching the initial BISR.\r
+ * The Lower Context points to the Upper Context ready for the ready return from the interrupt handler.\r
+ * The Real stack pointer for the task is stored in the A10 which is restored with the upper context.\r
+ */\r
+\r
+ /* Have to disable interrupts here because we are manipulating the CSAs. */\r
+ portENTER_CRITICAL();\r
+ {\r
+ /* DSync to ensure that buffering is not a problem. */\r
+ _dsync();\r
+\r
+ /* Consume two Free CSAs. */\r
+ pxLowerCSA = portCSA_TO_ADDRESS( _mfcr( $FCX ) );\r
+ if ( NULL != pxLowerCSA )\r
+ {\r
+ /* The Lower Links to the Upper. */\r
+ pxUpperCSA = portCSA_TO_ADDRESS( pxLowerCSA[ 0 ] );\r
+ }\r
+\r
+ /* Check that we have successfully reserved two CSAs. */\r
+ if ( ( NULL != pxLowerCSA ) && ( NULL != pxUpperCSA ) )\r
+ {\r
+ /* Remove the two consumed CSAs from the Free List. */\r
+ _mtcr( $FCX, pxUpperCSA[ 0 ] );\r
+ /* ISync to commit the change to the FCX. */\r
+ _isync();\r
+ }\r
+ else\r
+ {\r
+ /* For the time being, simply trigger a context list depletion trap. */\r
+ _svlcx();\r
+ }\r
+ }\r
+ portEXIT_CRITICAL();\r
+\r
+ /* Clear the CSA. */\r
+ memset( pxUpperCSA, 0, 16 * sizeof( unsigned portBASE_TYPE ) );\r
+\r
+ /* Upper Context. */\r
+ pxUpperCSA[ 2 ] = (unsigned portBASE_TYPE)pxTopOfStack; /* A10; Stack Return aka Stack Pointer */\r
+ pxUpperCSA[ 1 ] = portSELECT_PROGRAM_STATUS_WORD( pdTRUE ); /* PSW */\r
+\r
+ /* Clear the CSA. */\r
+ memset( pxLowerCSA, 0, 16 * sizeof( unsigned portBASE_TYPE ) );\r
+\r
+ /* Lower Context. */\r
+ pxLowerCSA[ 8 ] = (unsigned portBASE_TYPE)pvParameters; /* A4; Address Type Parameter Register */\r
+ pxLowerCSA[ 1 ] = (unsigned portBASE_TYPE)pxCode; /* A11; Return Address aka RA */\r
+ /* PCXI pointing to the Upper context. */\r
+ pxLowerCSA[ 0 ] = ( portINITIAL_PCXI_UPPER_CONTEXT_WORD | (unsigned portBASE_TYPE)portADDRESS_TO_CSA( pxUpperCSA ) );\r
+\r
+ /* Save the link to the CSA in the Top of Stack. */\r
+ pxTopOfStack = (unsigned portBASE_TYPE *)portADDRESS_TO_CSA( pxLowerCSA );\r
+\r
+ /* DSync to ensure that buffering is not a problem. */\r
+ _dsync();\r
+\r
+ return pxTopOfStack;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE xPortStartScheduler( void )\r
+{\r
+unsigned portBASE_TYPE uxMFCR = 0UL;\r
+unsigned portBASE_TYPE *pxUpperCSA = NULL;\r
+unsigned portBASE_TYPE *pxLowerCSA = NULL;\r
+ /* Set-up the timer interrupt. */\r
+ prvSetupTimerInterrupt();\r
+\r
+ /* Install the Trap Handlers. */\r
+extern void vTrapInstallHandlers( void );\r
+ vTrapInstallHandlers();\r
+\r
+ /* Install the Syscall Handler. */\r
+ if ( 0 == _install_trap_handler( portSYSCALL_TRAP, vPortYield ) )\r
+ {\r
+ /* Failed to install the Yield handler. */\r
+ _debug();\r
+ }\r
+\r
+ /* Load the initial SYSCON. */\r
+ _dsync();\r
+ _mtcr( $SYSCON, portINITIAL_SYSCON );\r
+\r
+ /* ENDINIT has already been applied in the 'cstart.c' code. */\r
+\r
+ /* Set-up the Task switching ISR. */\r
+ CPU_SRC0.reg = 0x00001001UL;\r
+\r
+ /* Clear the PSW.CDC to enable RFE */\r
+ uxMFCR = _mfcr( $PSW );\r
+ uxMFCR &= portRESTORE_PSW_MASK;\r
+ _mtcr( $PSW, uxMFCR );\r
+\r
+ /* Finally, perform the equivalent of a portRESTORE_CONTEXT() */\r
+ pxLowerCSA = portCSA_TO_ADDRESS( *(unsigned portBASE_TYPE *)pxCurrentTCB );\r
+ pxUpperCSA = portCSA_TO_ADDRESS( pxLowerCSA[0] );\r
+ _mtcr( $PCXI, *pxCurrentTCB );\r
+\r
+ _dsync();\r
+ _nop();\r
+ _rslcx();\r
+ _nop();\r
+ __asm volatile( "rfe" );\r
+\r
+ /* Will not get here. */\r
+ return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetupTimerInterrupt( void )\r
+{\r
+ /* Set-up the clock divider. */\r
+ unlock_wdtcon();\r
+ while ( 0 != ( WDT_CON0.reg & 0x1UL ) );\r
+ /* RMC == 1 so STM Clock == FPI */\r
+ STM_CLC.reg = ( 1UL << 8 );\r
+ lock_wdtcon();\r
+\r
+ /* Set-up the Compare value. */\r
+ STM_CMCON.reg = ( 31UL - __CLZ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) );\r
+ /* Take into account the current time so a tick doesn't happen immediately. */\r
+ STM_CMP0.reg = ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) + STM_TIM0.reg;\r
+\r
+ if ( 0 != _install_int_handler( portKERNEL_INTERRUPT_PRIORITY_LEVEL, vPortSystemTickHandler, 0 ) )\r
+ {\r
+ /* Set-up the interrupt. */\r
+ STM_SRC0.reg = ( portKERNEL_INTERRUPT_PRIORITY_LEVEL | 0x00005000UL );\r
+\r
+ /* Enable the Interrupt. */\r
+ STM_ISRR.reg = 0x1UL;\r
+ STM_ICR.reg = 0x1UL;\r
+ }\r
+ else\r
+ {\r
+ /* Failed to install the Tick Interrupt. */\r
+ _debug();\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortSystemTickHandler( int iArg )\r
+{\r
+ /* Clear the interrupt source. */\r
+ STM_ISRR.reg = 1UL;\r
+ /* Reload the Compare Match register for X ticks into the future. */\r
+ STM_CMP0.reg += ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ );\r
+\r
+ /* Kernel API calls require Critical Sections. */\r
+ portINTERRUPT_ENTER_CRITICAL();\r
+ {\r
+ /* Increment the Tick. */\r
+ vTaskIncrementTick();\r
+ }\r
+ portINTERRUPT_EXIT_CRITICAL();\r
+\r
+#if configUSE_PREEMPTION == 1\r
+ portYIELD_FROM_ISR( pdTRUE );\r
+#endif\r
+\r
+ (void)iArg;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * When a task is deleted, it is yielded permanently until the IDLE task\r
+ * has an opportunity to reclaim the memory that that task was using.\r
+ * Typically, the memory used by a task is the TCB and Stack but in the\r
+ * TriCore this includes the CSAs that were consumed as part of the Call\r
+ * Stack. These CSAs can only be returned to the Globally Free Pool when\r
+ * they are not part of the current Call Stack, hence, delaying the\r
+ * reclamation until the IDLE task is freeing the task's other resources.\r
+ * This function uses the head of the linked list of CSAs (from when the\r
+ * task yielded for the last time) and finds the tail (the very bottom of\r
+ * the call stack) and inserts this list at the head of the Free list,\r
+ * attaching the existing Free List to the tail of the reclaimed call stack.\r
+ *\r
+ * NOTE: the IDLE task needs processing time to complete this function\r
+ * and in heavily loaded systems, the Free CSAs may be consumed faster\r
+ * than they can be freed assuming that tasks are being spawned and\r
+ * deleted frequently.\r
+ */\r
+void vPortReclaimCSA( unsigned portBASE_TYPE *pxTCB )\r
+{\r
+unsigned portBASE_TYPE pxHeadCSA, pxTailCSA, pxFreeCSA;\r
+\r
+ /* The first element in a TCB is the Last Used CSA.\r
+ * These simply need to be free'd to add them back to\r
+ * the global pool of CSAs.\r
+ */\r
+\r
+ /* Lookup the first element from the TCB. */\r
+ pxHeadCSA = ( *pxTCB ) & portCSA_FCX_MASK;\r
+\r
+ /* If there is something to reclaim. */\r
+ if ( 0UL != ( pxHeadCSA & portCSA_FCX_MASK ) )\r
+ {\r
+ /* Iterate over the CSAs that were consumed as part of the task. */\r
+ pxTailCSA = pxHeadCSA;\r
+ while ( 0UL != ( portCSA_TO_ADDRESS( pxTailCSA )[ 0 ] & portCSA_FCX_MASK ) )\r
+ {\r
+ /* Clear any extra bits from the link words. */\r
+ portCSA_TO_ADDRESS( pxTailCSA )[ 0 ] = pxTailCSA & portCSA_FCX_MASK;\r
+\r
+ /* Iterate to the next CSA. */\r
+ pxTailCSA = portCSA_TO_ADDRESS( pxTailCSA )[ 0 ];\r
+ }\r
+\r
+ /* pxHeadCSA points to the first in the chain\r
+ * pxNextCSA points to the Head or the last in the chain.\r
+ */\r
+\r
+ portENTER_CRITICAL();\r
+ {\r
+ /* Look up the current free CSA. */\r
+ _dsync();\r
+ pxFreeCSA = _mfcr( $FCX );\r
+\r
+ /* Join the current Free onto the Tail of what is being reclaimed. */\r
+ portCSA_TO_ADDRESS( pxTailCSA )[ 0 ] = pxFreeCSA;\r
+\r
+ /* Move the head of the reclaimed into the Free. */\r
+ _dsync();\r
+ _mtcr( $FCX, pxHeadCSA );\r
+ /* ISync to commit the change to the FCX. */\r
+ _isync();\r
+ }\r
+ portEXIT_CRITICAL();\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEndScheduler( void )\r
+{\r
+ /* Nothing to do. Unlikely to want to end. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortYield( int iTrapIdentification )\r
+{\r
+ switch ( iTrapIdentification )\r
+ {\r
+ case portSYSCALL_TASK_YIELD:\r
+ /* Select another task to run. */\r
+ portYIELD_FROM_ISR( pdTRUE );\r
+ break;\r
+\r
+ default:\r
+ _debug();\r
+ break;\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
--- /dev/null
+/*\r
+ FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+#ifndef PORTMACRO_H\r
+#define PORTMACRO_H\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/* System Includes. */\r
+#include <tc1782.h>\r
+#include <machine/intrinsics.h>\r
+\r
+/*-----------------------------------------------------------\r
+ * Port specific definitions.\r
+ *\r
+ * The settings in this file configure FreeRTOS correctly for the\r
+ * given hardware and compiler.\r
+ *\r
+ * These settings should not be altered.\r
+ *-----------------------------------------------------------\r
+ */\r
+\r
+/* Type definitions. */\r
+#define portCHAR char\r
+#define portFLOAT float\r
+#define portDOUBLE double\r
+#define portLONG long\r
+#define portSHORT short\r
+#define portSTACK_TYPE unsigned long\r
+#define portBASE_TYPE long\r
+\r
+#if( configUSE_16_BIT_TICKS == 1 )\r
+ typedef unsigned portSHORT portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffff\r
+#else\r
+ typedef unsigned portLONG portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+#endif\r
+/*---------------------------------------------------------------------------*/\r
+\r
+/* Architecture specifics. */\r
+#define portSTACK_GROWTH ( -1 )\r
+#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portBYTE_ALIGNMENT 4\r
+#define portNOP() __asm volatile( " nop " )\r
+#define portCRITICAL_NESTING_IN_TCB 1\r
+#define portRESTORE_FIRST_TASK_PRIORITY_LEVEL 1\r
+#define portKERNEL_INTERRUPT_PRIORITY_LEVEL 4\r
+#define portSYSTEM_INTERRUPT_PRIORITY_LEVEL 64\r
+/*---------------------------------------------------------------------------*/\r
+\r
+typedef struct MPU_SETTINGS { unsigned long ulNotUsed; } xMPU_SETTINGS;\r
+\r
+/* Define away the instruction from the Restore Context Macro. */\r
+#define portPRIVILEGE_BIT 0x0UL\r
+\r
+extern void vTaskEnterCritical( void );\r
+extern void vTaskExitCritical( void );\r
+#define portENTER_CRITICAL() vTaskEnterCritical()\r
+#define portEXIT_CRITICAL() vTaskExitCritical()\r
+/*---------------------------------------------------------------------------*/\r
+\r
+/* Task utilities. */\r
+\r
+extern void vPortReclaimCSA( unsigned portBASE_TYPE *pxTCB );\r
+\r
+/* CSA Manipulation. */\r
+#define portCSA_TO_ADDRESS( pCSA ) ( ( unsigned portBASE_TYPE * )( ( ( ( pCSA ) & 0x000F0000 ) << 12 ) | ( ( ( pCSA ) & 0x0000FFFF ) << 6 ) ) )\r
+#define portADDRESS_TO_CSA( pAddress ) ( ( unsigned portBASE_TYPE )( ( ( ( (unsigned portBASE_TYPE)( pAddress ) ) & 0xF0000000 ) >> 12 ) | ( ( (unsigned portBASE_TYPE)( pAddress ) & 0x003FFFC0 ) >> 6 ) ) )\r
+/*---------------------------------------------------------------------------*/\r
+\r
+#define portYIELD() _syscall(0)\r
+/* Port Restore is implicit in the platform when the function is returned from the original PSW is automatically replaced. */\r
+#define portSYSCALL_TASK_YIELD 0\r
+#define portSYSCALL_RAISE_PRIORITY 1\r
+/*---------------------------------------------------------------------------*/\r
+\r
+/* Critical section management. */\r
+\r
+/* Clear the ICR.IE bit. */ /* Or set ICR.CCPN to portSYSTEM_INTERRUPT_PRIORITY_LEVEL */\r
+#define portDISABLE_INTERRUPTS() _disable()\r
+/* Set the ICR.IE bit. */ /* Or set ICR.CCPN to 0 */\r
+#define portENABLE_INTERRUPTS() _enable()\r
+\r
+#define portINTERRUPT_ENTER_CRITICAL() _disable()\r
+#define portINTERRUPT_EXIT_CRITICAL() _enable()\r
+\r
+/*---------------------------------------------------------------------------*/\r
+\r
+/*\r
+ * Save the context of a task.\r
+ * The upper context is automatically saved when entering a trap or interrupt.\r
+ * Need to save the lower context as well and copy the PCXI CSA ID into\r
+ * pxCurrentTCB->pxTopOfStack. Only Lower Context CSA IDs may be saved to the\r
+ * TCB of a task.\r
+ *\r
+ * Call vTaskSwitchContext to select the next task, note that this changes the\r
+ * value of pxCurrentTCB so that it needs to be reloaded.\r
+ *\r
+ * Call vPortSetMPURegisterSetOne to change the MPU mapping for the task\r
+ * that has just been switched in.\r
+ *\r
+ * Load the context of the task.\r
+ * Need to restore the lower context by loading the CSA from\r
+ * pxCurrentTCB->pxTopOfStack into PCXI (effectively changing the call stack).\r
+ * In the Interrupt handler post-amble, RSLCX will restore the lower context\r
+ * of the task. RFE will restore the upper context of the task, jump to the\r
+ * return address and restore the previous state of interrupts being\r
+ * enabled/disabled.\r
+ */\r
+#define portYIELD_FROM_ISR( xHigherPriorityTaskWoken ) \\r
+{ \\r
+unsigned portBASE_TYPE *pxUpperCSA = NULL; \\r
+unsigned portBASE_TYPE xUpperCSA = 0UL; \\r
+ if ( pdTRUE == xHigherPriorityTaskWoken ) \\r
+ { \\r
+ /*_disable();*/ \\r
+ portINTERRUPT_ENTER_CRITICAL(); \\r
+ _isync(); \\r
+ xUpperCSA = _mfcr( $PCXI ); \\r
+ pxUpperCSA = portCSA_TO_ADDRESS( xUpperCSA ); \\r
+ *pxCurrentTCB = pxUpperCSA[0]; \\r
+ vTaskSwitchContext(); \\r
+ pxUpperCSA[0] = *pxCurrentTCB; \\r
+ _dsync(); \\r
+ _isync(); \\r
+ _nop(); \\r
+ _nop(); \\r
+ } \\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+/* Task function macros as described on the FreeRTOS.org WEB site. */\r
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+/*---------------------------------------------------------------------------*/\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* PORTMACRO_H */\r
--- /dev/null
+/*\r
+ FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+\r
+/* Machine includes */\r
+#include <tc1782.h>\r
+#include <machine/intrinsics.h>\r
+#include <machine/cint.h>\r
+/*---------------------------------------------------------------------------*/\r
+\r
+/*\r
+ * This reference is required by the Save/Restore Context Macros.\r
+ */\r
+extern volatile unsigned portBASE_TYPE * pxCurrentTCB;\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * This file contains base definitions for all of the possible traps in the system.\r
+ * It is suggested to provide implementations for all of the traps but for\r
+ * the time being they simply trigger a DEBUG instruction so that it is easy\r
+ * to see what caused a particular trap.\r
+ *\r
+ * Trap Class 6, the SYSCALL, is used exclusively by the operating system.\r
+ */\r
+\r
+/* The Trap Classes. */\r
+#define portMMU_TRAP 0\r
+#define portIPT_TRAP 1\r
+#define portIE_TRAP 2\r
+#define portCM_TRAP 3\r
+#define portSBP_TRAP 4\r
+#define portASSERT_TRAP 5\r
+#define portNMI_TRAP 7\r
+\r
+/* MMU Trap Identifications. */\r
+#define portTIN_MMU_VIRTUAL_ADDRESS_FILL 0\r
+#define portTIN_MMU_VIRTUAL_ADDRESS_PROTECTION 1\r
+\r
+/* Internal Protection Trap Identifications. */\r
+#define portTIN_IPT_PRIVILIGED_INSTRUCTION 1\r
+#define portTIN_IPT_MEMORY_PROTECTION_READ 2\r
+#define portTIN_IPT_MEMORY_PROTECTION_WRITE 3\r
+#define portTIN_IPT_MEMORY_PROTECTION_EXECUTION 4\r
+#define portTIN_IPT_MEMORY_PROTECTION_PERIPHERAL_ACCESS 5\r
+#define portTIN_IPT_MEMORY_PROTECTION_NULL_ADDRESS 6\r
+#define portTIN_IPT_MEMORY_PROTECTION_GLOBAL_REGISTER_WRITE_PROTECTION 7\r
+\r
+/* Instruction Error Trap Identifications. */\r
+#define portTIN_IE_ILLEGAL_OPCODE 1\r
+#define portTIN_IE_UNIMPLEMENTED_OPCODE 2\r
+#define portTIN_IE_INVALID_OPERAND 3\r
+#define portTIN_IE_DATA_ADDRESS_ALIGNMENT 4\r
+#define portTIN_IE_INVALID_LOCAL_MEMORY_ADDRESS 5\r
+\r
+/* Context Management Trap Identifications. */\r
+#define portTIN_CM_FREE_CONTEXT_LIST_DEPLETION 1\r
+#define portTIN_CM_CALL_DEPTH_OVERFLOW 2\r
+#define portTIN_CM_CALL_DEPTH_UNDEFLOW 3\r
+#define portTIN_CM_FREE_CONTEXT_LIST_UNDERFLOW 4\r
+#define portTIN_CM_CALL_STACK_UNDERFLOW 5\r
+#define portTIN_CM_CONTEXT_TYPE 6\r
+#define portTIN_CM_NESTING_ERROR 7\r
+\r
+/* System Bus and Peripherals Trap Identifications. */\r
+#define portTIN_SBP_PROGRAM_FETCH_SYNCHRONOUS_ERROR 1\r
+#define portTIN_SBP_DATA_ACCESS_SYNCHRONOUS_ERROR 2\r
+#define portTIN_SBP_DATA_ACCESS_ASYNCHRONOUS_ERROR 3\r
+#define portTIN_SBP_COPROCESSOR_TRAP_ASYNCHRONOUS_ERROR 4\r
+#define portTIN_SBP_PROGRAM_MEMORY_INTEGRITY_ERROR 5\r
+#define portTIN_SBP_DATA_MEMORY_INTEGRITY_ERROR 6\r
+\r
+/* Assertion Trap Identifications. */\r
+#define portTIN_ASSERT_ARITHMETIC_OVERFLOW 1\r
+#define portTIN_ASSERT_STICKY_ARITHMETIC_OVERFLOW 2\r
+\r
+/* Non-maskable Interrupt Trap Identifications. */\r
+#define portTIN_NMI_NON_MASKABLE_INTERRUPT 0\r
+/*---------------------------------------------------------------------------*/\r
+\r
+void vMMUTrap( int iTrapIdentification );\r
+void vInternalProtectionTrap( int iTrapIdentification );\r
+void vInstructionErrorTrap( int iTrapIdentification );\r
+void vContextManagementTrap( int iTrapIdentification );\r
+void vSystemBusAndPeripheralsTrap( int iTrapIdentification );\r
+void vAssertionTrap( int iTrapIdentification );\r
+void vNonMaskableInterruptTrap( int iTrapIdentification );\r
+/*---------------------------------------------------------------------------*/\r
+\r
+void vTrapInstallHandlers( void )\r
+{\r
+ if ( 0 == _install_trap_handler ( portMMU_TRAP, vMMUTrap ) )\r
+ {\r
+ _debug();\r
+ }\r
+ if ( 0 == _install_trap_handler ( portIPT_TRAP, vInternalProtectionTrap ) )\r
+ {\r
+ _debug();\r
+ }\r
+ if ( 0 == _install_trap_handler ( portIE_TRAP, vInstructionErrorTrap ) )\r
+ {\r
+ _debug();\r
+ }\r
+ if ( 0 == _install_trap_handler ( portCM_TRAP, vContextManagementTrap ) )\r
+ {\r
+ _debug();\r
+ }\r
+ if ( 0 == _install_trap_handler ( portSBP_TRAP, vSystemBusAndPeripheralsTrap ) )\r
+ {\r
+ _debug();\r
+ }\r
+ if ( 0 == _install_trap_handler ( portASSERT_TRAP, vAssertionTrap ) )\r
+ {\r
+ _debug();\r
+ }\r
+/* Trap Handler 6 (Syscall) is installed in port.c as it is fundamental to\r
+ * the OS operation. These trap handlers is are place holders.\r
+ * if ( 0 != _install_trap_handler ( portMMU_TRAP, vMMUTrap ) )\r
+ {\r
+ _debug();\r
+ }\r
+*/\r
+ if ( 0 == _install_trap_handler ( portNMI_TRAP, vNonMaskableInterruptTrap ) )\r
+ {\r
+ _debug();\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vMMUTrap( int iTrapIdentification )\r
+{\r
+ switch ( iTrapIdentification )\r
+ {\r
+ case portTIN_MMU_VIRTUAL_ADDRESS_FILL:\r
+ case portTIN_MMU_VIRTUAL_ADDRESS_PROTECTION:\r
+ default:\r
+ _debug();\r
+ break;\r
+ }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+void vInternalProtectionTrap( int iTrapIdentification )\r
+{\r
+ switch ( iTrapIdentification )\r
+ {\r
+ case portTIN_IPT_PRIVILIGED_INSTRUCTION:\r
+ /* Instruction is not allowed at current execution level, eg DISABLE at User-0. */\r
+ case portTIN_IPT_MEMORY_PROTECTION_READ:\r
+ /* Load word using invalid address. */\r
+ case portTIN_IPT_MEMORY_PROTECTION_WRITE:\r
+ /* Store Word using invalid address. */\r
+ case portTIN_IPT_MEMORY_PROTECTION_EXECUTION:\r
+ /* PC jumped to an address outside of the valid range. */\r
+ case portTIN_IPT_MEMORY_PROTECTION_PERIPHERAL_ACCESS:\r
+ /* Access to a peripheral denied at current execution level. */\r
+ case portTIN_IPT_MEMORY_PROTECTION_NULL_ADDRESS:\r
+ /* NULL Pointer. */\r
+ case portTIN_IPT_MEMORY_PROTECTION_GLOBAL_REGISTER_WRITE_PROTECTION:\r
+ /* Tried to modify a global address pointer register. */\r
+ default:\r
+ pxCurrentTCB[ 0 ] = _mfcr( $PCXI );\r
+ _debug();\r
+ break;\r
+ }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+void vInstructionErrorTrap( int iTrapIdentification )\r
+{\r
+ switch ( iTrapIdentification )\r
+ {\r
+ case portTIN_IE_ILLEGAL_OPCODE:\r
+ case portTIN_IE_UNIMPLEMENTED_OPCODE:\r
+ case portTIN_IE_INVALID_OPERAND:\r
+ case portTIN_IE_DATA_ADDRESS_ALIGNMENT:\r
+ case portTIN_IE_INVALID_LOCAL_MEMORY_ADDRESS:\r
+ default:\r
+ _debug();\r
+ break;\r
+ }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+void vContextManagementTrap( int iTrapIdentification )\r
+{\r
+ switch ( iTrapIdentification )\r
+ {\r
+ case portTIN_CM_FREE_CONTEXT_LIST_DEPLETION:\r
+ case portTIN_CM_CALL_DEPTH_OVERFLOW:\r
+ case portTIN_CM_CALL_DEPTH_UNDEFLOW:\r
+ case portTIN_CM_FREE_CONTEXT_LIST_UNDERFLOW:\r
+ case portTIN_CM_CALL_STACK_UNDERFLOW:\r
+ case portTIN_CM_CONTEXT_TYPE:\r
+ case portTIN_CM_NESTING_ERROR:\r
+ default:\r
+ _debug();\r
+ break;\r
+ }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+void vSystemBusAndPeripheralsTrap( int iTrapIdentification )\r
+{\r
+ switch ( iTrapIdentification )\r
+ {\r
+ case portTIN_SBP_PROGRAM_FETCH_SYNCHRONOUS_ERROR:\r
+ case portTIN_SBP_DATA_ACCESS_SYNCHRONOUS_ERROR:\r
+ case portTIN_SBP_DATA_ACCESS_ASYNCHRONOUS_ERROR:\r
+ case portTIN_SBP_COPROCESSOR_TRAP_ASYNCHRONOUS_ERROR:\r
+ case portTIN_SBP_PROGRAM_MEMORY_INTEGRITY_ERROR:\r
+ case portTIN_SBP_DATA_MEMORY_INTEGRITY_ERROR:\r
+ default:\r
+ _debug();\r
+ break;\r
+ }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+void vAssertionTrap( int iTrapIdentification )\r
+{\r
+ switch ( iTrapIdentification )\r
+ {\r
+ case portTIN_ASSERT_ARITHMETIC_OVERFLOW:\r
+ case portTIN_ASSERT_STICKY_ARITHMETIC_OVERFLOW:\r
+ default:\r
+ _debug();\r
+ break;\r
+ }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
+\r
+void vNonMaskableInterruptTrap( int iTrapIdentification )\r
+{\r
+ switch ( iTrapIdentification )\r
+ {\r
+ case portTIN_NMI_NON_MASKABLE_INTERRUPT:\r
+ default:\r
+ _debug();\r
+ break;\r
+ }\r
+}\r
+/*---------------------------------------------------------------------------*/\r
projects / freertos / commitdiff