if (!current)
buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, address);
- u32 current_pc;
- current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
-
/* the front-end may request us not to handle breakpoints */
if (handle_breakpoints)
{
return retval;
}
- u32 next_pc;
- if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
- {
- u32 current_opcode;
- target_read_u32(target, current_pc, ¤t_opcode);
- LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
- return retval;
- }
-
LOG_DEBUG("enable single-step");
- arm7_9->enable_single_step(target, next_pc);
+ arm7_9->enable_single_step(target);
target->debug_reason = DBG_REASON_SINGLESTEP;
return ERROR_OK;
}
-void arm7_9_enable_eice_step(target_t *target, u32 next_pc)
+void arm7_9_enable_eice_step(target_t *target)
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ int retval;
u32 current_pc;
current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
+
+ u32 next_pc;
+ if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
+ {
+ u32 current_opcode;
+ target_read_u32(target, current_pc, ¤t_opcode);
+ LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
+ return retval;
+ }
if(next_pc != current_pc)
{
if (!current)
buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, address);
- u32 current_pc;
- current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
-
/* the front-end may request us not to handle breakpoints */
if (handle_breakpoints)
if ((breakpoint = breakpoint_find(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32))))
target->debug_reason = DBG_REASON_SINGLESTEP;
- u32 next_pc;
- if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
- {
- u32 current_opcode;
- target_read_u32(target, current_pc, ¤t_opcode);
- LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
- return retval;
- }
-
if ((retval = arm7_9_restore_context(target)) != ERROR_OK)
{
return retval;
}
- arm7_9->enable_single_step(target, next_pc);
+ arm7_9->enable_single_step(target);
if (armv4_5->core_state == ARMV4_5_STATE_ARM)
{
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
- * Copyright (C) 2008 by Hongtao Zheng *
- * hontor@126.com *
- * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
void (*branch_resume)(target_t *target);
void (*branch_resume_thumb)(target_t *target);
- void (*enable_single_step)(target_t *target, u32 next_pc);
+ void (*enable_single_step)(target_t *target);
void (*disable_single_step)(target_t *target);
void (*set_special_dbgrq)(target_t *target);
int arm7_9_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
int arm7_9_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
-void arm7_9_enable_eice_step(target_t *target, u32 next_pc);
+void arm7_9_enable_eice_step(target_t *target);
void arm7_9_disable_eice_step(target_t *target);
int arm7_9_execute_sys_speed(struct target_s *target);
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
- * Copyright (C) 2008 by Hongtao Zheng *
- * hontor@126.com *
- * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
}
-void arm9tdmi_enable_single_step(target_t *target, u32 next_pc)
+void arm9tdmi_enable_single_step(target_t *target)
{
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
}
else
{
- arm7_9_enable_eice_step(target, next_pc);
+ arm7_9_enable_eice_step(target);
}
}