pSegIdDrvInfo->vendor_unique1[1] = 0x7570;
pSegIdDrvInfo->vendor_unique1[2] = 0x8888;
- memcpy(pSegIdDrvInfo->serial_number, (void *)g_strSEG_SerialNum, 20);
+ memcpy(pSegIdDrvInfo->serial_number, g_strSEG_SerialNum, 20);
/* 0x2 : dual buffer */
pSegIdDrvInfo->buffer_type = 0x2;
/* buffer size : 2KB */
pSegIdDrvInfo->buffer_sector_size = 0x800;
pSegIdDrvInfo->number_of_ecc_bytes = 0;
- memcpy(pSegIdDrvInfo->firmware_revision, (void *)g_strSEG_FWRev, 8);
+ memcpy(pSegIdDrvInfo->firmware_revision, g_strSEG_FWRev, 8);
- memcpy(pSegIdDrvInfo->model_number, (void *)g_strSEG_ModelNum, 40);
+ memcpy(pSegIdDrvInfo->model_number, g_strSEG_ModelNum, 40);
pSegIdDrvInfo->maximum_block_transfer = 0x4;
pSegIdDrvInfo->vendor_unique2 = 0x0;
pSegIdDrvInfo->recommend_dma_cyc = 0x1E0;
pSegIdDrvInfo->min_pio_cyc_no_iordy = 0x1E0;
pSegIdDrvInfo->min_pio_cyc_with_iordy = 0x1E0;
- memset((void *)pSegIdDrvInfo->reserved3, 0x00, 22);
+ memset(pSegIdDrvInfo->reserved3, 0x00, 22);
/* b7 : ATA/ATAPI-7 ,b6 : ATA/ATAPI-6 ,b5 : ATA/ATAPI-5,b4 : ATA/ATAPI-4 */
pSegIdDrvInfo->major_ver_num = 0x7E;
/* 0x1C : ATA/ATAPI-6 T13 1532D revision1 */
/* Advanced power management level 1 */
pSegIdDrvInfo->adv_pwr_mgm_lvl_val = 0x0;
pSegIdDrvInfo->reserved5 = 0x0;
- memset((void *)pSegIdDrvInfo->reserved6, 0x00, 68);
+ memset(pSegIdDrvInfo->reserved6, 0x00, 68);
/* Security mode feature is disabled */
pSegIdDrvInfo->security_stas = 0x0;
- memset((void *)pSegIdDrvInfo->vendor_uniq_bytes, 0x00, 62);
+ memset(pSegIdDrvInfo->vendor_uniq_bytes, 0x00, 62);
/* CFA power mode 1 support in maximum 200mA */
pSegIdDrvInfo->cfa_pwr_mode = 0x0100;
- memset((void *)pSegIdDrvInfo->reserved7, 0x00, 190);
+ memset(pSegIdDrvInfo->reserved7, 0x00, 190);
}
static int mg_storage_config(void)
l2x_cache->base,l2x_cache->way);*/
if (armv7a->armv7a_mmu.armv7a_cache.l2_cache)
LOG_INFO("cache l2 already initialized\n");
- armv7a->armv7a_mmu.armv7a_cache.l2_cache = (void *) l2x_cache;
+ armv7a->armv7a_mmu.armv7a_cache.l2_cache = l2x_cache;
/* initialize l1 / l2x cache function */
armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache
= armv7a_l2x_flush_all_data;
armv7a = target_to_armv7a(curr);
if (armv7a->armv7a_mmu.armv7a_cache.l2_cache)
LOG_ERROR("smp target : cache l2 already initialized\n");
- armv7a->armv7a_mmu.armv7a_cache.l2_cache = (void *) l2x_cache;
+ armv7a->armv7a_mmu.armv7a_cache.l2_cache = l2x_cache;
armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache =
armv7a_l2x_flush_all_data;
armv7a->armv7a_mmu.armv7a_cache.display_cache_info =
etm_core, 1);
etm_get_reg(reg_list);
- etm_ctx->config = buf_get_u32((void *)&arch_info->value, 0, 32);
+ etm_ctx->config = buf_get_u32(&arch_info->value, 0, 32);
config = etm_ctx->config;
/* figure ETM version then add base registers */
etm_core + 1, 1);
etm_get_reg(reg_list + 1);
etm_ctx->id = buf_get_u32(
- (void *)&arch_info[1].value, 0, 32);
+ &arch_info[1].value, 0, 32);
LOG_DEBUG("ETM ID: %08x", (unsigned) etm_ctx->id);
bcd_vers = 0x10 + (((etm_ctx->id) >> 4) & 0xff);