Add graphics to the SAM4E demo.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2099 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.atsuo b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.atsuo
index 1c351b4d6d67bddc1d4527c47e30bf0fa0cd282a..6280b307596ffaa730c889cc572ae1770f2756c5 100644 (file)
Binary files a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.atsuo and b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.atsuo differ

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.cproj b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.cproj
index 3bb685b49a239cea457da8488b631fcc515ff69a..ec820c4e3321a45cc8a9260648921ce153fd0e25 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.cproj
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/RTOSDemo.cproj
@@ -12,8 +12,11 @@
         <options>\r
           <option id="common.boards" value="Add" config="" content-id="Atmel.ASF" />\r
           <option id="common.services.ioport" value="Add" config="" content-id="Atmel.ASF" />\r
+          <option id="sam.components.display.aat31xx" value="Add" config="" content-id="Atmel.ASF" />\r
+          <option id="sam.components.display.ili93xx" value="Add" config="" content-id="Atmel.ASF" />\r
           <option id="sam.components.ethernet_phy.ksz8051mnl" value="Add" config="" content-id="Atmel.ASF" />\r
           <option id="sam.drivers.gmac" value="Add" config="" content-id="Atmel.ASF" />\r
+          <option id="sam.drivers.smc" value="Add" config="" content-id="Atmel.ASF" />\r
           <option id="common.applications.user_application" value="Add" config="" content-id="Atmel.ASF" />\r
           <option id="sam.utils.cmsis.sam4e.source.template" value="Add" config="" content-id="Atmel.ASF" />\r
         </options>\r
@@ -160,6 +163,16 @@
           <file path="src/ASF/sam/drivers/gmac/gmac.h" framework="" version="3.11.0" source="sam\drivers\gmac\gmac.h" changed="False" content-id="Atmel.ASF" />\r
           <file path="src/Config/conf_eth.h" framework="" version="3.11.0" source="sam\drivers\gmac\module_config\conf_eth.h" changed="False" content-id="Atmel.ASF" />\r
           <file path="src/ASF/sam/components/ethernet_phy/documentation.h" framework="" version="3.11.0" source="sam\components\ethernet_phy\documentation.h" changed="False" content-id="Atmel.ASF" />\r
+          <file path="src/ASF/sam/components/display/aat31xx/aat31xx.c" framework="" version="3.11.0" source="sam\components\display\aat31xx\aat31xx.c" changed="False" content-id="Atmel.ASF" />\r
+          <file path="src/ASF/sam/components/display/aat31xx/aat31xx.h" framework="" version="3.11.0" source="sam\components\display\aat31xx\aat31xx.h" changed="False" content-id="Atmel.ASF" />\r
+          <file path="src/Config/conf_aat31xx.h" framework="" version="3.11.0" source="sam\components\display\aat31xx\module_config\conf_aat31xx.h" changed="False" content-id="Atmel.ASF" />\r
+          <file path="src/ASF/sam/components/display/ili93xx/ili93xx.c" framework="" version="3.11.0" source="sam\components\display\ili93xx\ili93xx.c" changed="False" content-id="Atmel.ASF" />\r
+          <file path="src/ASF/sam/components/display/ili93xx/ili93xx.h" framework="" version="3.11.0" source="sam\components\display\ili93xx\ili93xx.h" changed="False" content-id="Atmel.ASF" />\r
+          <file path="src/ASF/sam/components/display/ili93xx/ili9325_regs.h" framework="" version="3.11.0" source="sam\components\display\ili93xx\ili9325_regs.h" changed="False" content-id="Atmel.ASF" />\r
+          <file path="src/ASF/sam/components/display/ili93xx/ili9341_regs.h" framework="" version="3.11.0" source="sam\components\display\ili93xx\ili9341_regs.h" changed="False" content-id="Atmel.ASF" />\r
+          <file path="src/Config/conf_ili93xx.h" framework="" version="3.11.0" source="sam\components\display\ili93xx\module_config\conf_ili93xx.h" changed="False" content-id="Atmel.ASF" />\r
+          <file path="src/ASF/sam/drivers/ebi/smc/smc.c" framework="" version="3.11.0" source="sam\drivers\ebi\smc\smc.c" changed="False" content-id="Atmel.ASF" />\r
+          <file path="src/ASF/sam/drivers/ebi/smc/smc.h" framework="" version="3.11.0" source="sam\drivers\ebi\smc\smc.h" changed="False" content-id="Atmel.ASF" />\r
         </files>\r
         <documentation help="http://asf.atmel.com/docs/3.11.0/common.applications.user_application.sam4e_ek/html/index.html" />\r
         <offline-documentation help="" />\r
@@ -245,6 +258,9 @@
       <Value>%24(ToolchainDir)\..\..\CMSIS_Atmel\Device\ATMEL\sam4e\include</Value>\r
       <Value>../src/ASF/sam/components/ethernet_phy/ksz8051mnl</Value>\r
       <Value>../src/ASF/sam/drivers/gmac</Value>\r
+      <Value>../src/ASF/sam/components/display/aat31xx</Value>\r
+      <Value>../src/ASF/sam/components/display/ili93xx</Value>\r
+      <Value>../src/ASF/sam/drivers/ebi/smc</Value>\r
     </ListValues>\r
   </armgcc.compiler.directories.IncludePaths>\r
   <armgcc.compiler.optimization.level>Optimize for size (-Os)</armgcc.compiler.optimization.level>\r
@@ -290,6 +306,9 @@
       <Value>%24(ToolchainDir)\..\..\CMSIS_Atmel\Device\ATMEL\sam4e\include</Value>\r
       <Value>../src/ASF/sam/components/ethernet_phy/ksz8051mnl</Value>\r
       <Value>../src/ASF/sam/drivers/gmac</Value>\r
+      <Value>../src/ASF/sam/components/display/aat31xx</Value>\r
+      <Value>../src/ASF/sam/components/display/ili93xx</Value>\r
+      <Value>../src/ASF/sam/drivers/ebi/smc</Value>\r
     </ListValues>\r
   </armgcc.assembler.general.IncludePaths>\r
   <armgcc.preprocessingassembler.general.AssemblerFlags>-DARM_MATH_CM4=true -DBOARD=SAM4E_EK -D__SAM4E16E__ -Dprintf=iprintf</armgcc.preprocessingassembler.general.AssemblerFlags>\r
@@ -318,6 +337,9 @@
       <Value>%24(ToolchainDir)\..\..\CMSIS_Atmel\Device\ATMEL\sam4e\include</Value>\r
       <Value>../src/ASF/sam/components/ethernet_phy/ksz8051mnl</Value>\r
       <Value>../src/ASF/sam/drivers/gmac</Value>\r
+      <Value>../src/ASF/sam/components/display/aat31xx</Value>\r
+      <Value>../src/ASF/sam/components/display/ili93xx</Value>\r
+      <Value>../src/ASF/sam/drivers/ebi/smc</Value>\r
     </ListValues>\r
   </armgcc.preprocessingassembler.general.IncludePaths>\r
 </ArmGcc>\r
@@ -376,6 +398,10 @@
       <Value>../../../../FreeRTOS-Plus/Source/FreeRTOS-Plus-FAT-SL/api</Value>\r
       <Value>../../../../FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/CLICommands</Value>\r
       <Value>../../Common/include</Value>\r
+      <Value>../src/ASF/sam/components/display/aat31xx</Value>\r
+      <Value>../src/ASF/sam/components/display/ili93xx</Value>\r
+      <Value>../src/ASF/sam/drivers/ebi/smc</Value>\r
+      <Value>../../../../FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/EchoClients</Value>\r
     </ListValues>\r
   </armgcc.compiler.directories.IncludePaths>\r
   <armgcc.compiler.optimization.OtherFlags>-fdata-sections</armgcc.compiler.optimization.OtherFlags>\r
@@ -421,6 +447,9 @@
       <Value>%24(ToolchainDir)\..\..\CMSIS_Atmel\Device\ATMEL\sam4e\include</Value>\r
       <Value>../src/ASF/sam/components/ethernet_phy/ksz8051mnl</Value>\r
       <Value>../src/ASF/sam/drivers/gmac</Value>\r
+      <Value>../src/ASF/sam/components/display/aat31xx</Value>\r
+      <Value>../src/ASF/sam/components/display/ili93xx</Value>\r
+      <Value>../src/ASF/sam/drivers/ebi/smc</Value>\r
     </ListValues>\r
   </armgcc.assembler.general.IncludePaths>\r
   <armgcc.assembler.debugging.DebugLevel>Default (-g)</armgcc.assembler.debugging.DebugLevel>\r
@@ -450,6 +479,9 @@
       <Value>%24(ToolchainDir)\..\..\CMSIS_Atmel\Device\ATMEL\sam4e\include</Value>\r
       <Value>../src/ASF/sam/components/ethernet_phy/ksz8051mnl</Value>\r
       <Value>../src/ASF/sam/drivers/gmac</Value>\r
+      <Value>../src/ASF/sam/components/display/aat31xx</Value>\r
+      <Value>../src/ASF/sam/components/display/ili93xx</Value>\r
+      <Value>../src/ASF/sam/drivers/ebi/smc</Value>\r
     </ListValues>\r
   </armgcc.preprocessingassembler.general.IncludePaths>\r
   <armgcc.preprocessingassembler.debugging.DebugLevel>Default (-Wa,-g)</armgcc.preprocessingassembler.debugging.DebugLevel>\r
@@ -481,6 +513,10 @@
       <SubType>compile</SubType>\r
       <Link>src\UDPCommandServer.c</Link>\r
     </Compile>\r
+    <Compile Include="..\..\..\FreeRTOS-Plus\Demo\Common\FreeRTOS_Plus_UDP_Demos\EchoClients\TwoEchoClients.c">\r
+      <SubType>compile</SubType>\r
+      <Link>src\TwoEchoClients.c</Link>\r
+    </Compile>\r
     <Compile Include="..\..\..\FreeRTOS-Plus\Source\FreeRTOS-Plus-FAT-SL\fat_sl\common\dir.c">\r
       <SubType>compile</SubType>\r
       <Link>src\FreeRTOS+\FreeRTOS+FAT SL\dir.c</Link>\r
@@ -561,6 +597,30 @@
       <SubType>compile</SubType>\r
       <Link>src\Common Demo Tasks\semtest.c</Link>\r
     </Compile>\r
+    <Compile Include="src\ASF\sam\components\display\aat31xx\aat31xx.c">\r
+      <SubType>compile</SubType>\r
+    </Compile>\r
+    <None Include="src\ASF\sam\components\display\aat31xx\aat31xx.h">\r
+      <SubType>compile</SubType>\r
+    </None>\r
+    <None Include="src\ASF\sam\components\display\ili93xx\ili9325_regs.h">\r
+      <SubType>compile</SubType>\r
+    </None>\r
+    <None Include="src\ASF\sam\components\display\ili93xx\ili9341_regs.h">\r
+      <SubType>compile</SubType>\r
+    </None>\r
+    <Compile Include="src\ASF\sam\components\display\ili93xx\ili93xx.c">\r
+      <SubType>compile</SubType>\r
+    </Compile>\r
+    <None Include="src\ASF\sam\components\display\ili93xx\ili93xx.h">\r
+      <SubType>compile</SubType>\r
+    </None>\r
+    <Compile Include="src\ASF\sam\drivers\ebi\smc\smc.c">\r
+      <SubType>compile</SubType>\r
+    </Compile>\r
+    <None Include="src\ASF\sam\drivers\ebi\smc\smc.h">\r
+      <SubType>compile</SubType>\r
+    </None>\r
     <Compile Include="src\ASF\sam\utils\syscalls\gcc\syscalls.c">\r
       <SubType>compile</SubType>\r
     </Compile>\r
@@ -570,9 +630,18 @@
     <Compile Include="src\config\config_mdriver_ram.h">\r
       <SubType>compile</SubType>\r
     </Compile>\r
+    <None Include="src\config\conf_aat31xx.h">\r
+      <SubType>compile</SubType>\r
+    </None>\r
+    <None Include="src\config\conf_ili93xx.h">\r
+      <SubType>compile</SubType>\r
+    </None>\r
     <Compile Include="src\FreeRTOS+\FreeRTOS+FAT SL\API\fat_sl.h">\r
       <SubType>compile</SubType>\r
     </Compile>\r
+    <Compile Include="src\LCDUtils.c">\r
+      <SubType>compile</SubType>\r
+    </Compile>\r
     <Compile Include="src\main_blinky.c">\r
       <SubType>compile</SubType>\r
     </Compile>\r
@@ -1037,9 +1106,6 @@
     <None Include="src\ASF\sam\utils\status_codes.h">\r
       <SubType>compile</SubType>\r
     </None>\r
-    <None Include="src\ASF\thirdparty\CMSIS\CMSIS END USER LICENCE AGREEMENT.pdf">\r
-      <SubType>compile</SubType>\r
-    </None>\r
     <None Include="src\ASF\thirdparty\CMSIS\Include\arm_math.h">\r
       <SubType>compile</SubType>\r
     </None>\r
@@ -1081,9 +1147,14 @@
     <Folder Include="src\ASF\sam\boards\" />\r
     <Folder Include="src\ASF\sam\boards\sam4e_ek\" />\r
     <Folder Include="src\ASF\sam\components\" />\r
+    <Folder Include="src\ASF\sam\components\display\" />\r
+    <Folder Include="src\ASF\sam\components\display\aat31xx\" />\r
+    <Folder Include="src\ASF\sam\components\display\ili93xx\" />\r
     <Folder Include="src\ASF\sam\components\ethernet_phy\" />\r
     <Folder Include="src\ASF\sam\components\ethernet_phy\ksz8051mnl\" />\r
     <Folder Include="src\ASF\sam\drivers\" />\r
+    <Folder Include="src\ASF\sam\drivers\ebi\" />\r
+    <Folder Include="src\ASF\sam\drivers\ebi\smc\" />\r
     <Folder Include="src\ASF\sam\drivers\gmac\" />\r
     <Folder Include="src\ASF\sam\drivers\pmc\" />\r
     <Folder Include="src\ASF\sam\utils\" />\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/aat31xx/aat31xx.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/aat31xx/aat31xx.c
new file mode 100644 (file)
index 0000000..6a5d4b3
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/aat31xx/aat31xx.c
@@ -0,0 +1,137 @@
+/**\r
+ * \file\r
+ *\r
+ * \brief API driver for component aat31xx.\r
+ *\r
+ * Copyright (c) 2011-2013 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ *    Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+\r
+/**\r
+ * \defgroup aat31xx_display_group Display - AAT31XX Controller\r
+ *\r
+ * Low-level driver for the AAT31XX LCD backlight controller. This driver provides access to the main\r
+ * features of the AAT31XX controller.\r
+ *\r
+ * \{\r
+ */\r
+\r
+#include "board.h"\r
+#include "ioport.h"\r
+#include "aat31xx.h"\r
+#include "conf_aat31xx.h"\r
+\r
+/// @cond 0\r
+/**INDENT-OFF**/\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+/**INDENT-ON**/\r
+/// @endcond\r
+\r
+#define DELAY_PULSE      (0x18u)\r
+#define DELAY_ENABLE     (0x20000u)\r
+#define DELAY_DISABLE    (0x20000u)\r
+\r
+/**\r
+ * \brief Set the LCD backlight level.\r
+ *\r
+ * \param ul_level backlight level.\r
+ *\r
+ * \note pin BOARD_AAT31XX_SET_GPIO must be configured before calling aat31xx_set_backlight.\r
+ */\r
+void aat31xx_set_backlight(uint32_t ul_level)\r
+{\r
+       volatile uint32_t ul_delay;\r
+       uint32_t i;\r
+\r
+#ifdef CONF_BOARD_AAT3155\r
+       ul_level = AAT31XX_MAX_BACKLIGHT_LEVEL - ul_level + 1;\r
+#endif\r
+\r
+#ifdef CONF_BOARD_AAT3193\r
+       ul_level = AAT31XX_MAX_BACKLIGHT_LEVEL - ul_level + 1;\r
+#endif\r
+\r
+       /* Ensure valid level */\r
+       ul_level = (ul_level > AAT31XX_MAX_BACKLIGHT_LEVEL) ? AAT31XX_MAX_BACKLIGHT_LEVEL : ul_level;\r
+       ul_level = (ul_level < AAT31XX_MIN_BACKLIGHT_LEVEL) ? AAT31XX_MIN_BACKLIGHT_LEVEL : ul_level;\r
+\r
+       /* Set new backlight level */\r
+       for (i = 0; i < ul_level; i++) {\r
+               ioport_set_pin_level(BOARD_AAT31XX_SET_GPIO, IOPORT_PIN_LEVEL_LOW);\r
+               ul_delay = DELAY_PULSE;\r
+               while (ul_delay--) {\r
+               }\r
+\r
+               ioport_set_pin_level(BOARD_AAT31XX_SET_GPIO, IOPORT_PIN_LEVEL_HIGH);\r
+\r
+               ul_delay = DELAY_PULSE;\r
+               while (ul_delay--) {\r
+               }\r
+       }\r
+\r
+       ul_delay = DELAY_ENABLE;\r
+       while (ul_delay--) {\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Switch off backlight.\r
+ */\r
+void aat31xx_disable_backlight(void)\r
+{\r
+       volatile uint32_t ul_delay;\r
+\r
+       ioport_set_pin_level(BOARD_AAT31XX_SET_GPIO, IOPORT_PIN_LEVEL_LOW);\r
+\r
+       ul_delay = DELAY_DISABLE;\r
+       while (ul_delay--) {\r
+       }\r
+}\r
+\r
+/// @cond 0\r
+/**INDENT-OFF**/\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+/**INDENT-ON**/\r
+/// @endcond\r
+\r
+/**\r
+ * \}\r
+ */\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/aat31xx/aat31xx.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/aat31xx/aat31xx.h
new file mode 100644 (file)
index 0000000..8d0397b
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/aat31xx/aat31xx.h
@@ -0,0 +1,94 @@
+/**\r
+ * \file\r
+ *\r
+ * \brief API driver for component aat31xx.\r
+ *\r
+ * Copyright (c) 2011-2012 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ *    Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+\r
+#ifndef AAT31XX_H_INCLUDED\r
+#define AAT31XX_H_INCLUDED\r
+\r
+#include "compiler.h"\r
+#include "conf_board.h"\r
+\r
+/// @cond 0\r
+/**INDENT-OFF**/\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+/**INDENT-ON**/\r
+/// @endcond\r
+\r
+/* The minimum, average and maximum brightness level values */\r
+#ifdef CONF_BOARD_AAT3155\r
+#define AAT31XX_MIN_BACKLIGHT_LEVEL           1\r
+#define AAT31XX_AVG_BACKLIGHT_LEVEL           8\r
+#define AAT31XX_MAX_BACKLIGHT_LEVEL           16\r
+#endif\r
+#ifdef CONF_BOARD_AAT3193\r
+#define AAT31XX_MIN_BACKLIGHT_LEVEL           1\r
+#define AAT31XX_AVG_BACKLIGHT_LEVEL           8\r
+#define AAT31XX_MAX_BACKLIGHT_LEVEL           16\r
+#endif\r
+#ifdef CONF_BOARD_AAT3194\r
+#define AAT31XX_MIN_BACKLIGHT_LEVEL           1\r
+#define AAT31XX_AVG_BACKLIGHT_LEVEL           25\r
+#define AAT31XX_MAX_BACKLIGHT_LEVEL           32\r
+#endif\r
+\r
+/* No component found */\r
+#ifndef AAT31XX_MIN_BACKLIGHT_LEVEL\r
+#warning Cannot configure AAT31XX. The component must be declared in conf_board.h first!\r
+#define AAT31XX_MIN_BACKLIGHT_LEVEL           0\r
+#define AAT31XX_AVG_BACKLIGHT_LEVEL           0\r
+#define AAT31XX_MAX_BACKLIGHT_LEVEL           0\r
+#endif\r
+\r
+void aat31xx_set_backlight(uint32_t ul_level);\r
+void aat31xx_disable_backlight(void);\r
+\r
+/// @cond 0\r
+/**INDENT-OFF**/\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+/**INDENT-ON**/\r
+/// @endcond\r
+\r
+#endif /* AAT31XX_H_INCLUDED */\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili9325_regs.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili9325_regs.h
new file mode 100644 (file)
index 0000000..6e0ac4f
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili9325_regs.h
@@ -0,0 +1,646 @@
+/**\r
+ * \file\r
+ *\r
+ * \brief registers definition for ili9325 TFT display component.\r
+ *\r
+ * Copyright (c) 2013 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ *    Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+\r
+#ifndef ILI9325_REGS_H_INCLUDED\r
+#define ILI9325_REGS_H_INCLUDED\r
+\r
+/** @cond 0 */\r
+/**INDENT-OFF**/\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+/**INDENT-ON**/\r
+/** @endcond */\r
+\r
+/** ili9325 LCD Registers */\r
+\r
+/** Driver Code Read */\r
+#define ILI9325_DEVICE_CODE_REG (0x00u)\r
+\r
+/** ILI9325_START_OSC_CTRL : (Offset: 0x00) Start Oscillator Control*/\r
+#define ILI9325_START_OSC_CTRL    (0x00u)\r
+#define ILI9325_START_OSC_CTRL_EN (0x1u << 0)\r
+\r
+/** ILI9325_DRIVER_OUTPUT_CTRL1 : (Offset: 0x01) Driver Output Control 1*/\r
+#define ILI9325_DRIVER_OUTPUT_CTRL1    (0x01u)\r
+#define ILI9325_DRIVER_OUTPUT_CTRL1_SS (0x1u << 8)\r
+#define ILI9325_DRIVER_OUTPUT_CTRL1_SM (0x1u << 10)\r
+\r
+/** ILI9325_LCD_DRIVING_CTRL : (Offset: 0x02) LCD Driving Control */\r
+#define ILI9325_LCD_DRIVING_CTRL       (0x02u)\r
+#define ILI9325_LCD_DRIVING_CTRL_EOR   (0x1u << 8)\r
+#define ILI9325_LCD_DRIVING_CTRL_BC0   (0x1u << 9)\r
+#define ILI9325_LCD_DRIVING_CTRL_BIT10 (0x1u << 10)\r
+\r
+/** ILI9325_ENTRY_MODE : (Offset: 0x03) Entry Mode*/\r
+#define ILI9325_ENTRY_MODE           (0x03u)\r
+#define ILI9325_ENTRY_MODE_AM        (0x1u << 3)\r
+#define ILI9325_ENTRY_MODE_ID_POS     4\r
+#define ILI9325_ENTRY_MODE_ID_MSK    (0x3u << ILI9325_ENTRY_MODE_ID_POS)\r
+#define ILI9325_ENTRY_MODE_ID(value) ((ILI9325_ENTRY_MODE_ID_MSK & \\r
+       ((value) << ILI9325_ENTRY_MODE_ID_POS)))\r
+#define ILI9325_ENTRY_MODE_ORG       (0x1u << 7)\r
+#define ILI9325_ENTRY_MODE_HWM       (0x1u << 9)\r
+#define ILI9325_ENTRY_MODE_BGR       (0x1u << 12)\r
+#define ILI9325_ENTRY_MODE_DFM       (0x1u << 14)\r
+#define ILI9325_ENTRY_MODE_TRI       (0x1u << 15)\r
+\r
+/** ILI9325_RESIZE_CTRL : (Offset: 0x04) Resize Control */\r
+#define ILI9325_RESIZE_CTRL            (0x04u)\r
+#define ILI9325_RESIZE_CTRL_RSZ_POS     0\r
+#define ILI9325_RESIZE_CTRL_RSZ_MSK    (0x3u << ILI9325_RESIZE_CTRL_RSZ_POS)\r
+#define ILI9325_RESIZE_CTRL_RSZ(value) ((ILI9325_RESIZE_CTRL_RSZ_MSK & \\r
+       ((value) << ILI9325_RESIZE_CTRL_RSZ_POS)))\r
+#define ILI9325_RESIZE_CTRL_RCH_POS     4\r
+#define ILI9325_RESIZE_CTRL_RCH_MSK    (0x3u << ILI9325_RESIZE_CTRL_RCH_POS)\r
+#define ILI9325_RESIZE_CTRL_RCH(value) ((ILI9325_RESIZE_CTRL_RCH_MSK & \\r
+       ((value) << ILI9325_RESIZE_CTRL_RCH_POS)))\r
+#define ILI9325_RESIZE_CTRL_RCV_POS     8\r
+#define ILI9325_RESIZE_CTRL_RCV_MSK    (0x3u << ILI9325_RESIZE_CTRL_RCV_POS)\r
+#define ILI9325_RESIZE_CTRL_RCV(value) ((ILI9325_RESIZE_CTRL_RCV_MSK & \\r
+       ((value) << ILI9325_RESIZE_CTRL_RCV_POS)))\r
+\r
+/** ILI9325_DISP_CTRL1 : (Offset: 0x07) Display Control 1 */\r
+#define ILI9325_DISP_CTRL1             (0x07u)\r
+#define ILI9325_DISP_CTRL1_D_POS        0\r
+#define ILI9325_DISP_CTRL1_D_MSK       (0x3u << ILI9325_DISP_CTRL1_D_POS)\r
+#define ILI9325_DISP_CTRL1_D(value)    ((ILI9325_DISP_CTRL1_D_MSK & \\r
+       ((value) << ILI9325_DISP_CTRL1_D_POS)))\r
+#define ILI9325_DISP_CTRL1_CL          (0x1u << 3)\r
+#define ILI9325_DISP_CTRL1_DTE         (0x1u << 4)\r
+#define ILI9325_DISP_CTRL1_GON         (0x1u << 5)\r
+#define ILI9325_DISP_CTRL1_BASEE       (0x1u << 8)\r
+#define ILI9325_DISP_CTRL1_PTDE_POS     12\r
+#define ILI9325_DISP_CTRL1_PTDE_MSK    (0x3u << ILI9325_DISP_CTRL1_PTDE_POS)\r
+#define ILI9325_DISP_CTRL1_PTDE(value) ((ILI9325_DISP_CTRL1_PTDE_MSK & \\r
+       ((value) << ILI9325_DISP_CTRL1_PTDE_POS)))\r
+\r
+/** ILI9325_DISP_CTRL2 : (Offset: 0x08) Display Control 2 */\r
+#define ILI9325_DISP_CTRL2           (0x08u)\r
+#define ILI9325_DISP_CTRL2_BP_POS     0\r
+#define ILI9325_DISP_CTRL2_BP_MSK    (0xfu << ILI9325_DISP_CTRL2_BP_POS)\r
+#define ILI9325_DISP_CTRL2_BP(value) ((ILI9325_DISP_CTRL2_BP_MSK & \\r
+       ((value) << ILI9325_DISP_CTRL2_BP_POS)))\r
+#define ILI9325_DISP_CTRL2_FP_POS     8\r
+#define ILI9325_DISP_CTRL2_FP_MSK    (0xfu << ILI9325_DISP_CTRL2_FP_POS)\r
+#define ILI9325_DISP_CTRL2_FP(value) ((ILI9325_DISP_CTRL2_FP_MSK & \\r
+       ((value) << ILI9325_DISP_CTRL2_FP_POS)))\r
+\r
+/** ILI9325_DISP_CTRL3 : (Offset: 0x09) Display Control 3 */\r
+#define ILI9325_DISP_CTRL3            (0x09u)\r
+#define ILI9325_DISP_CTRL3_ISC_POS     0\r
+#define ILI9325_DISP_CTRL3_ISC_MSK    (0xfu << ILI9325_DISP_CTRL3_ISC_POS)\r
+#define ILI9325_DISP_CTRL3_ISC(value) ((ILI9325_DISP_CTRL3_ISC_MSK & \\r
+       ((value) << ILI9325_DISP_CTRL3_ISC_POS)))\r
+#define ILI9325_DISP_CTRL3_PTG_POS     4\r
+#define ILI9325_DISP_CTRL3_PTG_MSK    (0x3u << ILI9325_DISP_CTRL3_PTG_POS)\r
+#define ILI9325_DISP_CTRL3_PTG(value) ((ILI9325_DISP_CTRL3_PTG_MSK & \\r
+       ((value) << ILI9325_DISP_CTRL3_PTG_POS)))\r
+#define ILI9325_DISP_CTRL3_PTS_POS     8\r
+#define ILI9325_DISP_CTRL3_PTS_MSK    (0x7u << ILI9325_DISP_CTRL3_PTS_POS)\r
+#define ILI9325_DISP_CTRL3_PTS(value) ((ILI9325_DISP_CTRL3_PTS_MSK & \\r
+       ((value) << ILI9325_DISP_CTRL3_PTS_POS)))\r
+\r
+/** ILI9325_DISP_CTRL4 : (Offset: 0x0A) Display Control 4 */\r
+#define ILI9325_DISP_CTRL4            (0x0Au)\r
+#define ILI9325_DISP_CTRL4_FMI_POS     0\r
+#define ILI9325_DISP_CTRL4_FMI_MSK    (0x7u << ILI9325_DISP_CTRL4_FMI_POS)\r
+#define ILI9325_DISP_CTRL4_FMI(value) ((ILI9325_DISP_CTRL4_FMI_MSK & \\r
+       ((value) << ILI9325_DISP_CTRL4_FMI_POS)))\r
+#define ILI9325_DISP_CTRL4_FMARKOE    (0x1u << 3)\r
+\r
+/** ILI9325_RGB_DISP_INTERFACE_CTRL1 : (Offset: 0x0C) RGB Display\r
+ *Interface Control 1 */\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL1            (0x0Cu)\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM_POS     0\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM_MSK    (0x3u << \\r
+       ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM_POS)\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM(value) (( \\r
+               ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM_MSK & \\r
+               ((value) << ILI9325_RGB_DISP_INTERFACE_CTRL1_RIM_POS)))\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL1_DM0        (0x1u << 4)\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL1_DM1        (0x1u << 5)\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL1_DM_POS      4\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL1_DM_MSK     (0x3u << \\r
+       ILI9325_RGB_DISP_INTERFACE_CTRL1_DM_POS)\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL1_DM(value)  (( \\r
+               ILI9325_RGB_DISP_INTERFACE_CTRL1_DM_MSK & \\r
+               ((value) << ILI9325_RGB_DISP_INTERFACE_CTRL1_DM_POS)))\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL1_RM         (0x1u << 8)\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC_POS     12\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC_MSK    (0x7u << \\r
+       ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC_POS)\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC(value) (( \\r
+               ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC_MSK & \\r
+               ((value) < ILI9325_RGB_DISP_INTERFACE_CTRL1_ENC_POS)))\r
+\r
+/** ILI9325_FRAME_MAKER_POS : (Offset: 0x0D) Frame Maker Position */\r
+#define ILI9325_FRAME_MAKER_POS            (0x0Du)\r
+#define ILI9325_FRAME_MAKER_POS_FMP_POS     0\r
+#define ILI9325_FRAME_MAKER_POS_FMP_MSK    (0x1ffu << \\r
+       ILI9325_FRAME_MAKER_POS_FMP_POS)\r
+#define ILI9325_FRAME_MAKER_POS_FMP(value) ((ILI9325_FRAME_MAKER_POS_FMP_MSK & \\r
+       ((value) << ILI9325_FRAME_MAKER_POS_FMP_POS)))\r
+\r
+/** ILI9325_RGB_DISP_INTERFACE_CTRL2 : (Offset: 0x0F) RGB Display\r
+ * Interface Control 2 */\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL2      (0x0Fu)\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL2_EPL  (0x1u << 0)\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL2_DPL  (0x1u << 1)\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL2_HSPL (0x1u << 3)\r
+#define ILI9325_RGB_DISP_INTERFACE_CTRL2_VSPL (0x1u << 4)\r
+\r
+/** ILI9325_POWER_CTRL1 : (Offset: 0x10) Power Control 1 */\r
+#define ILI9325_POWER_CTRL1           (0x10u)\r
+#define ILI9325_POWER_CTRL1_STB       (0x1u << 0)\r
+#define ILI9325_POWER_CTRL1_SLP       (0x1u << 1)\r
+#define ILI9325_POWER_CTRL1_DSTB      (0x1u << 2)\r
+#define ILI9325_POWER_CTRL1_AP_POS     4\r
+#define ILI9325_POWER_CTRL1_AP_MSK    (0x7u << ILI9325_POWER_CTRL1_AP_POS)\r
+#define ILI9325_POWER_CTRL1_AP(value) ((ILI9325_POWER_CTRL1_AP_MSK & \\r
+       ((value) << ILI9325_POWER_CTRL1_AP_POS)))\r
+#define ILI9325_POWER_CTRL1_APE       (0x1u << 7)\r
+#define ILI9325_POWER_CTRL1_BT_POS     8\r
+#define ILI9325_POWER_CTRL1_BT_MSK    (0x7u << ILI9325_POWER_CTRL1_BT_POS)\r
+#define ILI9325_POWER_CTRL1_BT(value) ((ILI9325_POWER_CTRL1_BT_MSK & \\r
+       ((value) << ILI9325_POWER_CTRL1_BT_POS)))\r
+#define ILI9325_POWER_CTRL1_SAP       (0x1u << 12)\r
+\r
+/** ILI9325_POWER_CTRL2 : (Offset: 0x11) Power Control 2 */\r
+#define ILI9325_POWER_CTRL2            (0x11u)\r
+#define ILI9325_POWER_CTRL2_VC_POS      0\r
+#define ILI9325_POWER_CTRL2_VC_MSK     (0x7u << ILI9325_POWER_CTRL2_VC_POS)\r
+#define ILI9325_POWER_CTRL2_VC(value)  ((ILI9325_POWER_CTRL2_VC_MSK & \\r
+       ((value) << ILI9325_POWER_CTRL2_VC_POS)))\r
+#define ILI9325_POWER_CTRL2_DC0_POS     4\r
+#define ILI9325_POWER_CTRL2_DC0_MSK    (0x7u << ILI9325_POWER_CTRL2_DC0_POS)\r
+#define ILI9325_POWER_CTRL2_DC0(value) ((ILI9325_POWER_CTRL2_DC0_MSK & \\r
+       ((value) << ILI9325_POWER_CTRL2_DC0_POS)))\r
+#define ILI9325_POWER_CTRL2_DC1_POS     8\r
+#define ILI9325_POWER_CTRL2_DC1_MSK    (0x7u << ILI9325_POWER_CTRL2_DC1_POS)\r
+#define ILI9325_POWER_CTRL2_DC1(value) ((ILI9325_POWER_CTRL2_DC1_MSK & \\r
+       ((value) << ILI9325_POWER_CTRL2_DC1_POS)))\r
+\r
+/** ILI9325_POWER_CTRL3 : (Offset: 0x12) Power Control 3 */\r
+#define ILI9325_POWER_CTRL3            (0x12u)\r
+#define ILI9325_POWER_CTRL3_VRH_POS     0\r
+#define ILI9325_POWER_CTRL3_VRH_MSK    (0xfu << ILI9325_POWER_CTRL3_VRH_POS)\r
+#define ILI9325_POWER_CTRL3_VRH(value) ((ILI9325_POWER_CTRL3_VRH_MSK & \\r
+       ((value) << ILI9325_POWER_CTRL3_VRH_POS)))\r
+#define ILI9325_POWER_CTRL3_PON        (0x1u << 4)\r
+#define ILI9325_POWER_CTRL3_VCIRE      (0x1u << 7)\r
+\r
+/** ILI9325_POWER_CTRL4 : (Offset: 0x13) Power Control 4 */\r
+#define ILI9325_POWER_CTRL4            (0x13u)\r
+#define ILI9325_POWER_CTRL4_VDV_POS     8\r
+#define ILI9325_POWER_CTRL4_VDV_MSK    (0x1fu << ILI9325_POWER_CTRL4_VDV_POS)\r
+#define ILI9325_POWER_CTRL4_VDV(value) ((ILI9325_POWER_CTRL4_VDV_MSK & \\r
+       ((value) << ILI9325_POWER_CTRL4_VDV_POS)))\r
+\r
+/** ILI9325_HORIZONTAL_GRAM_ADDR_SET : (Offset: 0x20) Horizontal GRAM\r
+ * Address Set */\r
+#define ILI9325_HORIZONTAL_GRAM_ADDR_SET           (0x20u)\r
+#define ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD_POS     0\r
+#define ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD_MSK    (0xffu << \\r
+       ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD_POS)\r
+#define ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD(value) (( \\r
+               ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD_MSK & \\r
+               ((value) << ILI9325_HORIZONTAL_GRAM_ADDR_SET_AD_POS)))\r
+\r
+/** ILI9325_VERTICAL_GRAM_ADDR_SET : (Offset: 0x21) Vertical  GRAM\r
+ * Address Set */\r
+#define ILI9325_VERTICAL_GRAM_ADDR_SET           (0x21u)\r
+#define ILI9325_VERTICAL_GRAM_ADDR_SET_AD_POS     0\r
+#define ILI9325_VERTICAL_GRAM_ADDR_SET_AD_MSK    (0xffu << \\r
+       ILI9325_VERTICAL_GRAM_ADDR_SET_AD_POS)\r
+#define ILI9325_VERTICAL_GRAM_ADDR_SET_AD(value) (( \\r
+               ILI9325_VERTICAL_GRAM_ADDR_SET_AD_MSK & \\r
+               ((value) << ILI9325_VERTICAL_GRAM_ADDR_SET_AD_POS)))\r
+\r
+/** ILI9325_GRAM_DATA_REG : (Offset: 0x22) GRAM Data Register */\r
+#define ILI9325_GRAM_DATA_REG (0x22u)\r
+\r
+/** ILI9325_POWER_CTRL7 : (Offset: 0x29) Power Control 7 */\r
+#define ILI9325_POWER_CTRL7            (0x29u)\r
+#define ILI9325_POWER_CTRL7_VCM_POS     0\r
+#define ILI9325_POWER_CTRL7_VCM_MSK    (0x3fu << ILI9325_POWER_CTRL7_VCM_POS)\r
+#define ILI9325_POWER_CTRL7_VCM(value) ((ILI9325_POWER_CTRL7_VCM_MSK & \\r
+       ((value) << ILI9325_POWER_CTRL7_VCM_POS)))\r
+\r
+/** ILI9325_FRAME_RATE_AND_COLOR_CTRL : (Offset: 0x2B) Frame Rate and\r
+ * Color Control */\r
+#define ILI9325_FRAME_RATE_AND_COLOR_CTRL            (0x2Bu)\r
+#define ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS_POS     0\r
+#define ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS_MSK    (0xfu << \\r
+       ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS_POS)\r
+#define ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS(value) ((        \\r
+               ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS_MSK & \\r
+               ((value) << ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS_POS)))\r
+\r
+/** ILI9325_GAMMA_CTL1 : (Offset: 0x30) Gamma Control 1 */\r
+#define ILI9325_GAMMA_CTL1            (0x30u)\r
+#define ILI9325_GAMMA_CTL1_KP0_POS     0\r
+#define ILI9325_GAMMA_CTL1_KP0_MSK    (0x7u << ILI9325_GAMMA_CTL1_KP0_POS)\r
+#define ILI9325_GAMMA_CTL1_KP0(value) ((ILI9325_GAMMA_CTL1_KP0_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL1_KP0_POS)))\r
+#define ILI9325_GAMMA_CTL1_KP1_POS     8\r
+#define ILI9325_GAMMA_CTL1_KP1_MSK    (0x7u << ILI9325_GAMMA_CTL1_KP1_POS)\r
+#define ILI9325_GAMMA_CTL1_KP1(value) ((ILI9325_GAMMA_CTL1_KP1_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL1_KP1_POS)))\r
+\r
+/** ILI9325_GAMMA_CTL2 : (Offset: 0x31) Gamma Control 2 */\r
+#define ILI9325_GAMMA_CTL2            (0x31u)\r
+#define ILI9325_GAMMA_CTL2_KP2_POS     0\r
+#define ILI9325_GAMMA_CTL2_KP2_MSK    (0x7u << ILI9325_GAMMA_CTL2_KP2_POS)\r
+#define ILI9325_GAMMA_CTL2_KP2(value) ((ILI9325_GAMMA_CTL2_KP2_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL2_KP2_POS)))\r
+#define ILI9325_GAMMA_CTL2_KP3_POS     8\r
+#define ILI9325_GAMMA_CTL2_KP3_MSK    (0x7u << ILI9325_GAMMA_CTL2_KP3_POS)\r
+#define ILI9325_GAMMA_CTL2_KP3(value) ((ILI9325_GAMMA_CTL2_KP3_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL2_KP3_POS)))\r
+\r
+/** ILI9325_GAMMA_CTL3 : (Offset: 0x32) Gamma Control 3 */\r
+#define ILI9325_GAMMA_CTL3            (0x32u)\r
+#define ILI9325_GAMMA_CTL3_KP4_POS     0\r
+#define ILI9325_GAMMA_CTL3_KP4_MSK    (0x7u << ILI9325_GAMMA_CTL3_KP4_POS)\r
+#define ILI9325_GAMMA_CTL3_KP4(value) ((ILI9325_GAMMA_CTL3_KP4_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL3_KP4_POS)))\r
+#define ILI9325_GAMMA_CTL3_KP5_POS     8\r
+#define ILI9325_GAMMA_CTL3_KP5_MSK    (0x7u << ILI9325_GAMMA_CTL3_KP5_POS)\r
+#define ILI9325_GAMMA_CTL3_KP5(value) ((ILI9325_GAMMA_CTL3_KP5_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL3_KP5_POS)))\r
+\r
+/** ILI9325_GAMMA_CTL4 : (Offset: 0x35) Gamma Control 4 */\r
+#define ILI9325_GAMMA_CTL4            (0x35u)\r
+#define ILI9325_GAMMA_CTL4_RP0_POS     0\r
+#define ILI9325_GAMMA_CTL4_RP0_MSK    (0x7u << ILI9325_GAMMA_CTL4_RP0_POS)\r
+#define ILI9325_GAMMA_CTL4_RP0(value) ((ILI9325_GAMMA_CTL4_RP0_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL4_RP0_POS)))\r
+#define ILI9325_GAMMA_CTL4_RP1_POS     8\r
+#define ILI9325_GAMMA_CTL4_RP1_MSK    (0x7u << ILI9325_GAMMA_CTL4_RP1_POS)\r
+#define ILI9325_GAMMA_CTL4_RP1(value) ((ILI9325_GAMMA_CTL4_RP1_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL4_RP1_POS)))\r
+\r
+/** ILI9325_GAMMA_CTL5 : (Offset: 0x36) Gamma Control 5 */\r
+#define ILI9325_GAMMA_CTL5             (0x36u)\r
+#define ILI9325_GAMMA_CTL5_VRP0_POS     0\r
+#define ILI9325_GAMMA_CTL5_VRP0_MSK    (0xfu << ILI9325_GAMMA_CTL5_VRP0_POS)\r
+#define ILI9325_GAMMA_CTL5_VRP0(value) ((ILI9325_GAMMA_CTL5_VRP0_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL5_VRP0_POS)))\r
+#define ILI9325_GAMMA_CTL5_VRP1_POS     8\r
+#define ILI9325_GAMMA_CTL5_VRP1_MSK    (0x1fu << ILI9325_GAMMA_CTL5_VRP1_POS)\r
+#define ILI9325_GAMMA_CTL5_VRP1(value) ((ILI9325_GAMMA_CTL5_VRP1_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL5_VRP1_POS)))\r
+\r
+/** ILI9325_GAMMA_CTL6 : (Offset: 0x37) Gamma Control 6*/\r
+#define ILI9325_GAMMA_CTL6            (0x37u)\r
+#define ILI9325_GAMMA_CTL6_KN0_POS     0\r
+#define ILI9325_GAMMA_CTL6_KN0_MSK    (0x7u << ILI9325_GAMMA_CTL6_KN0_POS)\r
+#define ILI9325_GAMMA_CTL6_KN0(value) ((ILI9325_GAMMA_CTL6_KN0_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL6_KN0_POS)))\r
+#define ILI9325_GAMMA_CTL6_KN1_POS     8\r
+#define ILI9325_GAMMA_CTL6_KN1_MSK    (0x7u << ILI9325_GAMMA_CTL6_KN1_POS)\r
+#define ILI9325_GAMMA_CTL6_KN1(value) ((ILI9325_GAMMA_CTL6_KN1_MSK \\r
+       & ((value) << ILI9325_GAMMA_CTL6_KN1_POS)))\r
+\r
+/** ILI9325_GAMMA_CTL7 : (Offset: 0x38) Gamma Control 7*/\r
+#define ILI9325_GAMMA_CTL7            (0x38u)\r
+#define ILI9325_GAMMA_CTL7_KN2_POS     0\r
+#define ILI9325_GAMMA_CTL7_KN2_MSK    (0x7u << ILI9325_GAMMA_CTL7_KN2_POS)\r
+#define ILI9325_GAMMA_CTL7_KN2(value) ((ILI9325_GAMMA_CTL7_KN2_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL7_KN2_POS)))\r
+#define ILI9325_GAMMA_CTL7_KN3_POS     8\r
+#define ILI9325_GAMMA_CTL7_KN3_MSK    (0x7u << ILI9325_GAMMA_CTL7_KN3_POS)\r
+#define ILI9325_GAMMA_CTL7_KN3(value) ((ILI9325_GAMMA_CTL7_KN3_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL7_KN3_POS)))\r
+\r
+/** ILI9325_GAMMA_CTL8 : (Offset: 0x39) Gamma Control 8*/\r
+#define ILI9325_GAMMA_CTL8            (0x39u)\r
+#define ILI9325_GAMMA_CTL8_KN4_POS     0\r
+#define ILI9325_GAMMA_CTL8_KN4_MSK    (0x7u << ILI9325_GAMMA_CTL8_KN4_POS)\r
+#define ILI9325_GAMMA_CTL8_KN4(value) ((ILI9325_GAMMA_CTL8_KN4_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL8_KN4_POS)))\r
+#define ILI9325_GAMMA_CTL8_KN5_POS     8\r
+#define ILI9325_GAMMA_CTL8_KN5_MSK    (0x7u << ILI9325_GAMMA_CTL8_KN5_POS)\r
+#define ILI9325_GAMMA_CTL8_KN5(value) ((ILI9325_GAMMA_CTL8_KN5_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL8_KN5_POS)))\r
+\r
+/** ILI9325_GAMMA_CTL9 : (Offset: 0x3C) Gamma Control 9*/\r
+#define ILI9325_GAMMA_CTL9            (0x3Cu)\r
+#define ILI9325_GAMMA_CTL9_RN0_POS     0\r
+#define ILI9325_GAMMA_CTL9_RN0_MSK    (0x7u << ILI9325_GAMMA_CTL9_RN0_POS)\r
+#define ILI9325_GAMMA_CTL9_RN0(value) ((ILI9325_GAMMA_CTL9_RN0_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL9_RN0_POS)))\r
+#define ILI9325_GAMMA_CTL9_RN1_POS     8\r
+#define ILI9325_GAMMA_CTL9_RN1_MSK    (0x7u << ILI9325_GAMMA_CTL9_RN1_POS)\r
+#define ILI9325_GAMMA_CTL9_RN1(value) ((ILI9325_GAMMA_CTL9_RN1_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL9_RN1_POS)))\r
+\r
+/** ILI9325_GAMMA_CTL10 : (Offset: 0x3D) Gamma Control 10*/\r
+#define ILI9325_GAMMA_CTL10             (0x3Du)\r
+#define ILI9325_GAMMA_CTL10_VRN0_POS     0\r
+#define ILI9325_GAMMA_CTL10_VRN0_MSK    (0xfu << ILI9325_GAMMA_CTL10_VRN0_POS)\r
+#define ILI9325_GAMMA_CTL10_VRN0(value) ((ILI9325_GAMMA_CTL10_VRN0_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL10_VRN0_POS)))\r
+#define ILI9325_GAMMA_CTL10_VRN1_POS     8\r
+#define ILI9325_GAMMA_CTL10_VRN1_MSK    (0x1fu << \\r
+       ILI9325_GAMMA_CTL10_VRN1_POS)\r
+#define ILI9325_GAMMA_CTL10_VRN1(value) ((ILI9325_GAMMA_CTL10_VRN1_MSK & \\r
+       ((value) << ILI9325_GAMMA_CTL10_VRN1_POS)))\r
+\r
+/**\r
+ * ILI9325_HORIZONTAL_ADDR_START : (Offset: 0x50) Horizontal Address\r
+ * Start Position\r
+ */\r
+#define ILI9325_HORIZONTAL_ADDR_START            (0x50u)\r
+#define ILI9325_HORIZONTAL_ADDR_START_HSA_POS     0\r
+#define ILI9325_HORIZONTAL_ADDR_START_HSA_MSK    (0xffu << \\r
+       ILI9325_HORIZONTAL_ADDR_START_HSA_POS)\r
+#define ILI9325_HORIZONTAL_ADDR_START_HSA(value) (( \\r
+               ILI9325_HORIZONTAL_ADDR_START_HSA_MSK & \\r
+               ((value) << ILI9325_HORIZONTAL_ADDR_START_HSA_POS)))\r
+\r
+/**\r
+ * ILI9325_HORIZONTAL_ADDR_END : (Offset: 0x51) Horizontal Address End\r
+ * Position\r
+ */\r
+#define ILI9325_HORIZONTAL_ADDR_END            (0x51u)\r
+#define ILI9325_HORIZONTAL_ADDR_END_HEA_POS     0\r
+#define ILI9325_HORIZONTAL_ADDR_END_HEA_MSK    (0xffu << \\r
+       ILI9325_HORIZONTAL_ADDR_END_HEA_POS)\r
+#define ILI9325_HORIZONTAL_ADDR_END_HEA(value) (( \\r
+               ILI9325_HORIZONTAL_ADDR_END_HEA_MSK & \\r
+               ((value) << ILI9325_HORIZONTAL_ADDR_END_HEA_POS)))\r
+\r
+/**\r
+ * ILI9325_VERTICAL_ADDR_START : (Offset: 0x52) Vertical Address Start\r
+ * Position\r
+ */\r
+#define ILI9325_VERTICAL_ADDR_START            (0x52u)\r
+#define ILI9325_VERTICAL_ADDR_START_VSA_POS     0\r
+#define ILI9325_VERTICAL_ADDR_START_VSA_MSK    (0x1ffu << \\r
+       ILI9325_VERTICAL_ADDR_START_VSA_POS)\r
+#define ILI9325_VERTICAL_ADDR_START_VSA(value) (( \\r
+               ILI9325_VERTICAL_ADDR_START_VSA_MSK & \\r
+               ((value) << ILI9325_VERTICAL_ADDR_START_VSA_POS)))\r
+\r
+/**\r
+ * ILI9325_VERTICAL_ADDR_END : (Offset: 0x53) Vertical Address End\r
+ * Position\r
+ */\r
+#define ILI9325_VERTICAL_ADDR_END            (0x53u)\r
+#define ILI9325_VERTICAL_ADDR_END_VEA_POS     0\r
+#define ILI9325_VERTICAL_ADDR_END_VEA_MSK    (0x1ffu <<        \\r
+       ILI9325_VERTICAL_ADDR_END_VEA_POS)\r
+#define ILI9325_VERTICAL_ADDR_END_VEA(value) ((ILI9325_VERTICAL_ADDR_END_VEA_MSK \\r
+       & ((value) << ILI9325_VERTICAL_ADDR_END_VEA_POS)))\r
+\r
+/**\r
+ * ILI9325_DRIVER_OUTPUT_CTRL2 : (Offset: 0x60) Driver Output\r
+ * Control 2\r
+ */\r
+#define ILI9325_DRIVER_OUTPUT_CTRL2            (0x60u)\r
+#define ILI9325_DRIVER_OUTPUT_CTRL2_SCN_POS     0\r
+#define ILI9325_DRIVER_OUTPUT_CTRL2_SCN_MSK    (0x3fu << \\r
+       ILI9325_DRIVER_OUTPUT_CTRL2_SCN_POS)\r
+#define ILI9325_DRIVER_OUTPUT_CTRL2_SCN(value) (( \\r
+               ILI9325_DRIVER_OUTPUT_CTRL2_SCN_MSK & \\r
+               ((value) << ILI9325_DRIVER_OUTPUT_CTRL2_SCN_POS)))\r
+#define ILI9325_DRIVER_OUTPUT_CTRL2_NL_POS      8\r
+#define ILI9325_DRIVER_OUTPUT_CTRL2_NL_MSK     (0x3fu << \\r
+       ILI9325_DRIVER_OUTPUT_CTRL2_NL_POS)\r
+#define ILI9325_DRIVER_OUTPUT_CTRL2_NL(value)  (( \\r
+               ILI9325_DRIVER_OUTPUT_CTRL2_NL_MSK & \\r
+               ((value) << ILI9325_DRIVER_OUTPUT_CTRL2_NL_POS)))\r
+#define ILI9325_DRIVER_OUTPUT_CTRL2_GS         (0x1u << 15)\r
+\r
+/**\r
+ * ILI9325_BASE_IMG_DISP_CTRL : (Offset: 0x61) Base Image Display\r
+ * Control\r
+ */\r
+#define ILI9325_BASE_IMG_DISP_CTRL     (0x61u)\r
+#define ILI9325_BASE_IMG_DISP_CTRL_REV (0x1u << 0)\r
+#define ILI9325_BASE_IMG_DISP_CTRL_VLE (0x1u << 1)\r
+#define ILI9325_BASE_IMG_DISP_CTRL_NDL (0x1u << 2)\r
+\r
+/**\r
+ * ILI9325_VERTICAL_SCROLL_CTRL : (Offset: 0x6A) Vertical Scroll\r
+ * Control\r
+ */\r
+#define ILI9325_VERTICAL_SCROLL_CTRL           (0x6Au)\r
+#define ILI9325_VERTICAL_SCROLL_CTRL_VL_POS     0\r
+#define ILI9325_VERTICAL_SCROLL_CTRL_VL_MSK    (0x1ffu << \\r
+       ILI9325_VERTICAL_SCROLL_CTRL_VL_POS)\r
+#define ILI9325_VERTICAL_SCROLL_CTRL_VL(value) (( \\r
+               ILI9325_VERTICAL_SCROLL_CTRL_VL_MSK & \\r
+               ((value) << ILI9325_VERTICAL_SCROLL_CTRL_VL_POS)))\r
+\r
+/**\r
+ * ILI9325_PARTIAL_IMG1_DISP_POS : (Offset: 0x80) Partial Image 1\r
+ * Display Position\r
+ */\r
+#define ILI9325_PARTIAL_IMG1_DISP_POS              (0x80u)\r
+#define ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0_POS     0\r
+#define ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0_MSK    (0x1ffu << \\r
+       ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0_POS)\r
+#define ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0(value) (( \\r
+               ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0_MSK & \\r
+               ((value) << ILI9325_PARTIAL_IMG1_DISP_POS_PTDP0_POS)))\r
+\r
+/**\r
+ * ILI9325_PARTIAL_IMG1_AREA_START_LINE : (Offset: 0x81) Partial Image\r
+ * 1 Area (Start Line)\r
+ */\r
+#define ILI9325_PARTIAL_IMG1_AREA_START_LINE              (0x81u)\r
+#define ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0_POS     0\r
+#define ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0_MSK    (0x1ffu << \\r
+       ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0_POS)\r
+#define ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0(value) (( \\r
+               ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0_MSK & \\r
+               ((value) << \\r
+               ILI9325_PARTIAL_IMG1_AREA_START_LINE_PTSA0_POS)))\r
+\r
+/**\r
+ * ILI9325_PARTIAL_IMG1_AREA_END_LINE : (Offset: 0x82) Partial Image 1\r
+ * Area (End Line)\r
+ */\r
+#define ILI9325_PARTIAL_IMG1_AREA_END_LINE              (0x82u)\r
+#define ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0_POS     0\r
+#define ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0_MSK    (0x1ffu << \\r
+       ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0_POS)\r
+#define ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0(value) (( \\r
+               ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0_MSK & \\r
+               ((value) << \\r
+               ILI9325_PARTIAL_IMG1_AREA_END_LINE_PTEA0_POS)))\r
+\r
+/**\r
+ * ILI9325_PARTIAL_IMG2_DISP_POS : (Offset: 0x83) Partial Image 2\r
+ * Display Position\r
+ */\r
+#define ILI9325_PARTIAL_IMG2_DISP_POS              (0x83u)\r
+#define ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1_POS     0\r
+#define ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1_MSK    (0x1ffu << \\r
+       ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1_POS)\r
+#define ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1(value) (( \\r
+               ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1_MSK & \\r
+               ((value) << ILI9325_PARTIAL_IMG2_DISP_POS_PTDP1_POS)))\r
+\r
+/**\r
+ * ILI9325_PARTIAL_IMG2_AREA_START_LINE : (Offset: 0x84) Partial Image\r
+ * 2 Area (Start Line)\r
+ */\r
+#define ILI9325_PARTIAL_IMG2_AREA_START_LINE              (0x84u)\r
+#define ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1_POS     0\r
+#define ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1_MSK    (0x1ffu << \\r
+       ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1_POS)\r
+#define ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1(value) (( \\r
+               ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1_MSK & \\r
+               ((value) << \\r
+               ILI9325_PARTIAL_IMG2_AREA_START_LINE_PTSA1_POS)))\r
+\r
+/**\r
+ * ILI9325_PARTIAL_IMG2_AREA_END_LINE : (Offset: 0x85) Partial Image 2\r
+ * Area (End Line)\r
+ */\r
+#define ILI9325_PARTIAL_IMG2_AREA_END_LINE              (0x85u)\r
+#define ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1_POS     0\r
+#define ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1_MSK    (0x1ffu << \\r
+       ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1_POS)\r
+#define ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1(value) (( \\r
+               ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1_MSK & \\r
+               ((value) << \\r
+               ILI9325_PARTIAL_IMG2_AREA_END_LINE_PTEA1_POS)))\r
+\r
+/**\r
+ * ILI9325_PANEL_INTERFACE_CTRL1 : (Offset: 0x90) Panel Interface\r
+ * Control 1\r
+ */\r
+#define ILI9325_PANEL_INTERFACE_CTRL1             (0x90u)\r
+#define ILI9325_PANEL_INTERFACE_CTRL1_RTNI_POS     0\r
+#define ILI9325_PANEL_INTERFACE_CTRL1_RTNI_MSK    (0x1fu << \\r
+       ILI9325_PANEL_INTERFACE_CTRL1_RTNI_POS)\r
+#define ILI9325_PANEL_INTERFACE_CTRL1_RTNI(value) (( \\r
+               ILI9325_PANEL_INTERFACE_CTRL1_RTNI_MSK & \\r
+               ((value) << ILI9325_PANEL_INTERFACE_CTRL1_RTNI_POS)))\r
+#define ILI9325_PANEL_INTERFACE_CTRL1_DIVI_POS     8\r
+#define ILI9325_PANEL_INTERFACE_CTRL1_DIVI_MSK    (0x3u << \\r
+       ILI9325_PANEL_INTERFACE_CTRL1_DIVI_POS)\r
+#define ILI9325_PANEL_INTERFACE_CTRL1_DIVI(value) (( \\r
+               ILI9325_PANEL_INTERFACE_CTRL1_DIVI_MSK & \\r
+               ((value) << ILI9325_PANEL_INTERFACE_CTRL1_DIVI_POS)))\r
+\r
+/**\r
+ * ILI9325_PANEL_INTERFACE_CTRL2 : (Offset: 0x92) Panel Interface\r
+ * Control 2\r
+ */\r
+#define ILI9325_PANEL_INTERFACE_CTRL2             (0x92u)\r
+#define ILI9325_PANEL_INTERFACE_CTRL2_NOWI_POS     8\r
+#define ILI9325_PANEL_INTERFACE_CTRL2_NOWI_MSK    (0x7u << \\r
+       ILI9325_PANEL_INTERFACE_CTRL2_NOWI_POS)\r
+#define ILI9325_PANEL_INTERFACE_CTRL2_NOWI(value) (( \\r
+               ILI9325_PANEL_INTERFACE_CTRL2_NOWI_MSK & \\r
+               ((value) << ILI9325_PANEL_INTERFACE_CTRL2_NOWI_POS)))\r
+\r
+/**\r
+ * ILI9325_PANEL_INTERFACE_CTRL4 : (Offset: 0x95) Panel Interface\r
+ * Control 4\r
+ */\r
+#define ILI9325_PANEL_INTERFACE_CTRL4             (0x95u)\r
+#define ILI9325_PANEL_INTERFACE_CTRL4_RTNE_POS     0\r
+#define ILI9325_PANEL_INTERFACE_CTRL4_RTNE_MSK    (0x3fu << \\r
+       ILI9325_PANEL_INTERFACE_CTRL4_RTNE_POS)\r
+#define ILI9325_PANEL_INTERFACE_CTRL4_RTNE(value) (( \\r
+               ILI9325_PANEL_INTERFACE_CTRL4_RTNE_MSK & \\r
+               ((value) << ILI9325_PANEL_INTERFACE_CTRL4_RTNE_POS)))\r
+#define ILI9325_PANEL_INTERFACE_CTRL4_DIVE_POS     8\r
+#define ILI9325_PANEL_INTERFACE_CTRL4_DIVE_MSK    (0x3u << \\r
+       ILI9325_PANEL_INTERFACE_CTRL4_DIVE_POS)\r
+#define ILI9325_PANEL_INTERFACE_CTRL4_DIVE(value) (( \\r
+               ILI9325_PANEL_INTERFACE_CTRL4_DIVE_MSK & \\r
+               ((value) << ILI9325_PANEL_INTERFACE_CTRL4_DIVE_POS)))\r
+\r
+/** ILI9325_OTP_VCM_PROG_CTRL : (Offset: 0xA1) OTP VCM Programming Control */\r
+#define ILI9325_OTP_VCM_PROG_CTRL                (0xA1u)\r
+#define ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP_POS     0\r
+#define ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP_MSK    (0x3fu << \\r
+       ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP_POS)\r
+#define ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP(value) (( \\r
+               ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP_MSK & \\r
+               ((value) << ILI9325_OTP_VCM_PROG_CTRL_VCM_OTP_POS)))\r
+#define ILI9325_OTP_VCM_PROG_CTRL_OTP_PGM_EN     (0x1u << 11)\r
+\r
+/** ILI9325_OTP_VCM_STATUS_AND_ENABLE : (Offset: 0xA2) OTP VCM Status\r
+ * and Enable   */\r
+#define ILI9325_OTP_VCM_STATUS_AND_ENABLE                (0xA2u)\r
+#define ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_EN         (0x1u << 0)\r
+#define ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D_POS       8\r
+#define ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D_MSK      (0x3fu << \\r
+       ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D_POS)\r
+#define ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D(value)   (( \\r
+               ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D_MSK & ((value) << \\r
+               ILI9325_OTP_VCM_STATUS_AND_ENABLE_VCM_D_POS)))\r
+#define ILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT_POS     14\r
+#define ILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT_MSK    (0x3u << \\r
+       ILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT_POS)\r
+#define ILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT(value) (( \\r
+               ILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT_MSK & \\r
+               ((value) << \\r
+               IILI9325_OTP_VCM_STATUS_AND_ENABLE_PGM_CNT_POS)))\r
+\r
+/** ILI9325_OTP_PROG_ID_KEY : (Offset: 0xA5) OTP Programming ID Key */\r
+#define ILI9325_OTP_PROG_ID_KEY            (0xA5u)\r
+#define ILI9325_OTP_PROG_ID_KEY_KEY_POS     0\r
+#define ILI9325_OTP_PROG_ID_KEY_KEY_MSK    (0xffffu << \\r
+       ILI9325_OTP_PROG_ID_KEY_KEY_POS)\r
+#define ILI9325_OTP_PROG_ID_KEY_KEY(value) ((ILI9325_OTP_PROG_ID_KEY_KEY_MSK & \\r
+       ((value) << ILI9325_OTP_PROG_ID_KEY_KEY_POS)))\r
+\r
+/** @cond 0 */\r
+/**INDENT-OFF**/\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+/**INDENT-ON**/\r
+/** @endcond */\r
+\r
+#endif /* ILI9325_REGS_H_INCLUDED */\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili9341_regs.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili9341_regs.h
new file mode 100644 (file)
index 0000000..ccbff80
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili9341_regs.h
@@ -0,0 +1,245 @@
+/**\r
+ * \file\r
+ *\r
+ * \brief registers definition for ili9341 TFT display component.\r
+ *\r
+ * Copyright (c) 2013 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ *    Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+\r
+#ifndef ILI9341_REGS_H_INCLUDED\r
+#define ILI9341_REGS_H_INCLUDED\r
+\r
+/** @cond 0 */\r
+/**INDENT-OFF**/\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+/**INDENT-ON**/\r
+/** @endcond */\r
+\r
+/** ili9341 LCD Registers */\r
+\r
+/** Level 1 Commands (from the display Datasheet) */\r
+/** Nop operation*/\r
+#define ILI9341_CMD_NOP                             0x00\r
+/** Software reset*/\r
+#define ILI9341_CMD_SOFTWARE_RESET                  0x01\r
+/** Read Display Identification information*/\r
+#define ILI9341_CMD_READ_DISP_ID                    0x04\r
+/** Read display status*/\r
+#define ILI9341_CMD_READ_DISP_STATUS                0x09\r
+/** Read display power mode*/\r
+#define ILI9341_CMD_READ_DISP_POWER_MODE            0x0A\r
+/** Read display MADCTL*/\r
+#define ILI9341_CMD_READ_DISP_MADCTRL               0x0B\r
+/** Read display pixel format*/\r
+#define ILI9341_CMD_READ_DISP_PIXEL_FORMAT          0x0C\r
+/** Read display image format*/\r
+#define ILI9341_CMD_READ_DISP_IMAGE_FORMAT          0x0D\r
+/** Read display signal mode*/\r
+#define ILI9341_CMD_READ_DISP_SIGNAL_MODE           0x0E\r
+/** read display self-diagnostic resutl*/\r
+#define ILI9341_CMD_READ_DISP_SELF_DIAGNOSTIC       0x0F\r
+/** Enter sleep mode*/\r
+#define ILI9341_CMD_ENTER_SLEEP_MODE                0x10\r
+/** Sleep out*/\r
+#define ILI9341_CMD_SLEEP_OUT                       0x11\r
+/** Partial mode on*/\r
+#define ILI9341_CMD_PARTIAL_MODE_ON                 0x12\r
+/** Normal display mode on*/\r
+#define ILI9341_CMD_NORMAL_DISP_MODE_ON             0x13\r
+/** Display inversion off*/\r
+#define ILI9341_CMD_DISP_INVERSION_OFF              0x20\r
+/** Display inversion on*/\r
+#define ILI9341_CMD_DISP_INVERSION_ON               0x21\r
+/** Gamma set*/\r
+#define ILI9341_CMD_GAMMA_SET                       0x26\r
+/** Display off*/\r
+#define ILI9341_CMD_DISPLAY_OFF                     0x28\r
+/** Display on*/\r
+#define ILI9341_CMD_DISPLAY_ON                      0x29\r
+/** Column address set*/\r
+#define ILI9341_CMD_COLUMN_ADDRESS_SET              0x2A\r
+/** Page address set*/\r
+#define ILI9341_CMD_PAGE_ADDRESS_SET                0x2B\r
+/** Memory write*/\r
+#define ILI9341_CMD_MEMORY_WRITE                    0x2C\r
+/** Color set*/\r
+#define ILI9341_CMD_COLOR_SET                       0x2D\r
+/** Memory read*/\r
+#define ILI9341_CMD_MEMORY_READ                     0x2E\r
+/** Partial area*/\r
+#define ILI9341_CMD_PARTIAL_AREA                    0x30\r
+/** Vertical scrolling definition*/\r
+#define ILI9341_CMD_VERT_SCROLL_DEFINITION          0x33\r
+/** Tearing effect line off*/\r
+#define ILI9341_CMD_TEARING_EFFECT_LINE_OFF         0x34\r
+/** Tearing effect line on*/\r
+#define ILI9341_CMD_TEARING_EFFECT_LINE_ON          0x35\r
+\r
+/** Memory Access control*/\r
+#define ILI9341_CMD_MEMORY_ACCESS_CONTROL           0x36\r
+#define ILI9341_CMD_MEMORY_ACCESS_CONTROL_MY        (0x1u << 7)\r
+#define ILI9341_CMD_MEMORY_ACCESS_CONTROL_MX        (0x1u << 6)\r
+#define ILI9341_CMD_MEMORY_ACCESS_CONTROL_MV        (0x1u << 5)\r
+#define ILI9341_CMD_MEMORY_ACCESS_CONTROL_ML        (0x1u << 4)\r
+#define ILI9341_CMD_MEMORY_ACCESS_CONTROL_BGR       (0x1u << 3)\r
+#define ILI9341_CMD_MEMORY_ACCESS_CONTROL_MH        (0x1u << 2)\r
+\r
+/** Vetical scrolling start address*/\r
+#define ILI9341_CMD_VERT_SCROLL_START_ADDRESS       0x37\r
+/** Idle mode off*/\r
+#define ILI9341_CMD_IDLE_MODE_OFF                   0x38\r
+/** Idle mode on*/\r
+#define ILI9341_CMD_IDLE_MODE_ON                    0x39\r
+/** Pixel Format set*/\r
+#define ILI9341_CMD_PIXEL_FORMAT_SET                0x3A\r
+/** write memory continue*/\r
+#define ILI9341_CMD_WRITE_MEMORY_CONTINUE           0x3C\r
+/** Read memory continue*/\r
+#define ILI9341_CMD_READ_MEMORY_CONTINUE            0x3E\r
+/** set tear scanline*/\r
+#define ILI9341_CMD_SET_TEAR_SCANLINE               0x44\r
+/** get scanline*/\r
+#define ILI9341_CMD_GET_SCANLINE                    0x45\r
+/** write display brightness*/\r
+#define ILI9341_CMD_WRITE_DISPLAY_BRIGHTNESS        0x51\r
+/** read display brightness*/\r
+#define ILI9341_CMD_READ_DISPLAY_BRIGHTNESS         0x52\r
+/** write control display*/\r
+#define ILI9341_CMD_WRITE_CTRL_DISPLAY              0x53\r
+/** read control display*/\r
+#define ILI9341_CMD_READ_CTRL_DISPLAY               0x54\r
+/** write content adaptive brightness control*/\r
+#define ILI9341_CMD_WRITE_CONTENT_ADAPT_BRIGHTNESS  0x55\r
+/** read content adaptive brightness control*/\r
+#define ILI9341_CMD_READ_CONTENT_ADAPT_BRIGHTNESS   0x56\r
+/** write CABC minimum brightness*/\r
+#define ILI9341_CMD_WRITE_MIN_CAB_LEVEL             0x5E\r
+/** read CABC minimum brightness*/\r
+#define ILI9341_CMD_READ_MIN_CAB_LEVEL              0x5F\r
+/** Read ID1*/\r
+#define ILI9341_CMD_READ_ID1                        0xDA\r
+/** Read ID2*/\r
+#define ILI9341_CMD_READ_ID2                        0xDB\r
+/** Read ID3*/\r
+#define ILI9341_CMD_READ_ID3                        0xDC\r
+\r
+/** Level 2 Commands (from the display Datasheet) */\r
+/** RGB interface signal control*/\r
+#define ILI9341_CMD_RGB_SIGNAL_CONTROL              0xB0\r
+/** frame control*/\r
+#define ILI9341_CMD_FRAME_RATE_CONTROL_NORMAL       0xB1\r
+/** frame control in idle mode*/\r
+#define ILI9341_CMD_FRAME_RATE_CONTROL_IDLE_8COLOR  0xB2\r
+/** frame control in partial mode*/\r
+#define ILI9341_CMD_FRAME_RATE_CONTROL_PARTIAL      0xB3\r
+/** display inversion control*/\r
+#define ILI9341_CMD_DISPLAY_INVERSION_CONTROL       0xB4\r
+/** blanking porch control*/\r
+#define ILI9341_CMD_BLANKING_PORCH_CONTROL          0xB5\r
+/** display function control*/\r
+#define ILI9341_CMD_DISPLAY_FUNCTION_CTL            0xB6\r
+#define ILI9341_DISP_FUNC_CTL_REV                   (0x1u << 7)\r
+#define ILI9341_DISP_FUNC_CTL_GS                    (0x1u << 6)\r
+#define ILI9341_DISP_FUNC_CTL_SS                    (0x1u << 5)\r
+#define ILI9341_DISP_FUNC_CTL_SM                    (0x1u << 4)\r
+#define ILI9341_DISP_FUNC_CTL_ISC_POS               0\r
+#define ILI9341_DISP_FUNC_CTL_ISC_MSK               (0x0F << 0)\r
+#define ILI9341_DISP_FUNC_CTL_ISC(value) \\r
+       (ILI9341_DISP_FUNC_CTL_ISC_MSK & \\r
+       (value << ILI9341_DISP_FUNC_CTL_ISC_POS))\r
+\r
+/** entry mode set*/\r
+#define ILI9341_CMD_ENTRY_MODE_SET                  0xB7\r
+/** backlight control1*/\r
+#define ILI9341_CMD_BACKLIGHT_CONTROL_1             0xB8\r
+/** backlight control2*/\r
+#define ILI9341_CMD_BACKLIGHT_CONTROL_2             0xB9\r
+/** backlight control3*/\r
+#define ILI9341_CMD_BACKLIGHT_CONTROL_3             0xBA\r
+/** backlight control 4*/\r
+#define ILI9341_CMD_BACKLIGHT_CONTROL_4             0xBB\r
+/** backlight control 5*/\r
+#define ILI9341_CMD_BACKLIGHT_CONTROL_5             0xBC\r
+/** backlight control 7*/\r
+#define ILI9341_CMD_BACKLIGHT_CONTROL_7             0xBE\r
+/** backlight control 8*/\r
+#define ILI9341_CMD_BACKLIGHT_CONTROL_8             0xBF\r
+/** power control 1*/\r
+#define ILI9341_CMD_POWER_CONTROL_1                 0xC0\r
+/** power control 2*/\r
+#define ILI9341_CMD_POWER_CONTROL_2                 0xC1\r
+/** VCOM control 1*/\r
+#define ILI9341_CMD_VCOM_CONTROL_1                  0xC5\r
+/** VCOM control 2*/\r
+#define ILI9341_CMD_VCOM_CONTROL_2                  0xC7\r
+/** Power control A*/\r
+#define ILI9341_CMD_POWER_CONTROL_A                 0xCB\r
+/** Power control B*/\r
+#define ILI9341_CMD_POWER_CONTROL_B                 0xCF\r
+/** NV memory write*/\r
+#define ILI9341_CMD_NVMEM_WRITE                     0xD0\r
+/** NV memory protection key*/\r
+#define ILI9341_CMD_NVMEM_PROTECTION_KEY            0xD1\r
+/** NV memory status read*/\r
+#define ILI9341_CMD_NVMEM_STATUS_READ               0xD2\r
+/** Read ID4*/\r
+#define ILI9341_CMD_READ_ID4                        0xD3\r
+/** positive gamma correction*/\r
+#define ILI9341_CMD_POSITIVE_GAMMA_CORRECTION       0xE0\r
+/** negative gamma correction*/\r
+#define ILI9341_CMD_NEGATIVE_GAMMA_CORRECTION       0xE1\r
+/** digital gamma control 1*/\r
+#define ILI9341_CMD_DIGITAL_GAMMA_CONTROL_1         0xE2\r
+/** digital gamma control 2*/\r
+#define ILI9341_CMD_DIGITAL_GAMMA_CONTROL_2         0xE3\r
+/** driver timing control A*/\r
+#define ILI9341_CMD_DRIVER_TIMING_CTL_A             0xE8\r
+/** driver timing control B*/\r
+#define ILI9341_CMD_DRIVER_TIMING_CTL_B             0xEA\r
+/** power-on sequence control*/\r
+#define ILI9341_CMD_POWER_ON_SEQUENCE_CONTROL       0xED\r
+/** enable 3g gamma control*/\r
+#define ILI9341_CMD_ENABLE_3_GAMMA_CONTROL          0xF2\r
+/** Interface control*/\r
+#define ILI9341_CMD_INTERFACE_CONTROL               0xF6\r
+/** pump ration control*/\r
+#define ILI9341_CMD_PUMP_RATIO_CONTROL              0xF7\r
+\r
+#endif /* ILI9341_REGS_H_INCLUDED */\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili93xx.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili93xx.c
new file mode 100644 (file)
index 0000000..fb52948
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili93xx.c
@@ -0,0 +1,1851 @@
+/**\r
+ * \file\r
+ *\r
+ * \brief API driver for ILI93XX TFT display component.\r
+ *\r
+ * Copyright (c) 2013 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ *    Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+\r
+/**\r
+ * \defgroup ili93xx_display_group Display - ILI93XX Controller\r
+ *\r
+ * Low-level driver for the ILI93XX LCD controller. This driver provides access\r
+ * to the main features of the ILI93XX controller.\r
+ * Now ILI9325 and ILI9341 are supported.\r
+ *\r
+ * \{\r
+ */\r
+\r
+#include <string.h>\r
+#include <stdio.h>\r
+#include <assert.h>\r
+#include <stdlib.h>\r
+#include "ili93xx.h"\r
+#include "ili9341_regs.h"\r
+#include "ili9325_regs.h"\r
+\r
+/** Device type*/\r
+static uint8_t g_uc_device_type = 0;\r
+\r
+/** Pixel cache used to speed up communication */\r
+#define LCD_DATA_CACHE_SIZE ILI93XX_LCD_WIDTH\r
+\r
+/** LCD X-axis and Y-axis length */\r
+static uint32_t g_ul_lcd_x_length = ILI93XX_LCD_WIDTH;\r
+static uint32_t g_ul_lcd_y_length = ILI93XX_LCD_HEIGHT;\r
+\r
+static ili93xx_color_t g_ul_pixel_cache[LCD_DATA_CACHE_SIZE];\r
+\r
+static volatile ili93xx_coord_t limit_start_x, limit_start_y;\r
+static volatile ili93xx_coord_t limit_end_x, limit_end_y;\r
+\r
+/** Global variable describing the font size used by the driver */\r
+const struct ili93xx_font gfont = {10, 14};\r
+\r
+/**\r
+ * Character set table for font 10x14\r
+ * Coding format:\r
+ * Char height is 14 bits, which is coded using 2 bytes per column\r
+ * (2 unused bits).\r
+ * Char width is 10 bits.\r
+ */\r
+const uint8_t p_uc_charset10x14[] = {\r
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xCC,\r
+       0xFF, 0xCC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+       0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00,\r
+       0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+       0x0C, 0xC0, 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0,\r
+       0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0,\r
+       0x0C, 0x60, 0x1E, 0x70, 0x3F, 0x30, 0x33, 0x30, 0xFF, 0xFC,\r
+       0xFF, 0xFC, 0x33, 0x30, 0x33, 0xF0, 0x39, 0xE0, 0x18, 0xC0,\r
+       0x60, 0x00, 0xF0, 0x0C, 0xF0, 0x3C, 0x60, 0xF0, 0x03, 0xC0,\r
+       0x0F, 0x00, 0x3C, 0x18, 0xF0, 0x3C, 0xC0, 0x3C, 0x00, 0x18,\r
+       0x3C, 0xF0, 0x7F, 0xF8, 0xC3, 0x1C, 0xC7, 0x8C, 0xCF, 0xCC,\r
+       0xDC, 0xEC, 0x78, 0x78, 0x30, 0x30, 0x00, 0xFC, 0x00, 0xCC,\r
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x00, 0xEC, 0x00,\r
+       0xF8, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+       0x00, 0x00, 0x00, 0x00, 0x0F, 0xC0, 0x3F, 0xF0, 0x78, 0x78,\r
+       0x60, 0x18, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,\r
+       0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0x60, 0x18,\r
+       0x78, 0x78, 0x3F, 0xF0, 0x0F, 0xC0, 0x00, 0x00, 0x00, 0x00,\r
+       0x0C, 0x60, 0x0E, 0xE0, 0x07, 0xC0, 0x03, 0x80, 0x3F, 0xF8,\r
+       0x3F, 0xF8, 0x03, 0x80, 0x07, 0xC0, 0x0E, 0xE0, 0x0C, 0x60,\r
+       0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x3F, 0xF0,\r
+       0x3F, 0xF0, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,\r
+       0x00, 0x44, 0x00, 0xEC, 0x00, 0xF8, 0x00, 0x70, 0x00, 0x00,\r
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+       0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,\r
+       0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,\r
+       0x00, 0x18, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x18, 0x00, 0x00,\r
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+       0x00, 0x00, 0x00, 0x0C, 0x00, 0x3C, 0x00, 0xF0, 0x03, 0xC0,\r
+       0x0F, 0x00, 0x3C, 0x00, 0xF0, 0x00, 0xC0, 0x00, 0x00, 0x00,\r
+       0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0xFC, 0xC1, 0xCC, 0xC3, 0x8C,\r
+       0xC7, 0x0C, 0xCE, 0x0C, 0xFC, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,\r
+       0x00, 0x00, 0x00, 0x00, 0x30, 0x0C, 0x70, 0x0C, 0xFF, 0xFC,\r
+       0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,\r
+       0x30, 0x0C, 0x70, 0x1C, 0xE0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC,\r
+       0xC1, 0xCC, 0xC3, 0x8C, 0xE7, 0x0C, 0x7E, 0x0C, 0x3C, 0x0C,\r
+       0x30, 0x30, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,\r
+       0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x7F, 0xF8, 0x3C, 0xF0,\r
+       0x03, 0xC0, 0x07, 0xC0, 0x0E, 0xC0, 0x1C, 0xC0, 0x38, 0xC0,\r
+       0x70, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xC0, 0x00, 0xC0,\r
+       0xFC, 0x30, 0xFC, 0x38, 0xCC, 0x1C, 0xCC, 0x0C, 0xCC, 0x0C,\r
+       0xCC, 0x0C, 0xCC, 0x0C, 0xCE, 0x1C, 0xC7, 0xF8, 0xC3, 0xF0,\r
+       0x3F, 0xF0, 0x7F, 0xF8, 0xE3, 0x1C, 0xC3, 0x0C, 0xC3, 0x0C,\r
+       0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x9C, 0x71, 0xF8, 0x30, 0xF0,\r
+       0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC3, 0xFC,\r
+       0xC7, 0xFC, 0xCE, 0x00, 0xDC, 0x00, 0xF8, 0x00, 0xF0, 0x00,\r
+       0x3C, 0xF0, 0x7F, 0xF8, 0xE7, 0x9C, 0xC3, 0x0C, 0xC3, 0x0C,\r
+       0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,\r
+       0x3C, 0x00, 0x7E, 0x00, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x1C,\r
+       0xC3, 0x38, 0xC3, 0x70, 0xE7, 0xE0, 0x7F, 0xC0, 0x3F, 0x80,\r
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x60, 0x3C, 0xF0,\r
+       0x3C, 0xF0, 0x18, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x44, 0x3C, 0xEC,\r
+       0x3C, 0xF8, 0x18, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+       0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0,\r
+       0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0x00, 0x00,\r
+       0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,\r
+       0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,\r
+       0x00, 0x00, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x38, 0x70,\r
+       0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,\r
+       0x30, 0x00, 0x70, 0x00, 0xE0, 0x00, 0xC0, 0x00, 0xC1, 0xEC,\r
+       0xC3, 0xEC, 0xC3, 0x00, 0xE6, 0x00, 0x7E, 0x00, 0x3C, 0x00,\r
+       0x30, 0xF0, 0x71, 0xF8, 0xE3, 0x9C, 0xC3, 0x0C, 0xC3, 0xFC,\r
+       0xC3, 0xFC, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,\r
+       0x3F, 0xFC, 0x7F, 0xFC, 0xE0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0,\r
+       0xC0, 0xC0, 0xC0, 0xC0, 0xE0, 0xC0, 0x7F, 0xFC, 0x3F, 0xFC,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,\r
+       0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,\r
+       0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,\r
+       0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x30, 0x30,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,\r
+       0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,\r
+       0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,\r
+       0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00, 0xC0, 0x00, 0xC0, 0x00,\r
+       0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,\r
+       0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x73, 0xF8, 0x33, 0xF0,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,\r
+       0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,\r
+       0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,\r
+       0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,\r
+       0x00, 0x30, 0x00, 0x38, 0xC0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,\r
+       0xC0, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0, 0xC0, 0x00, 0xC0, 0x00,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0x07, 0x80, 0x07, 0x80, 0x0F, 0xC0,\r
+       0x1C, 0xE0, 0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,\r
+       0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0x70, 0x00, 0x38, 0x00, 0x1F, 0x00,\r
+       0x1F, 0x00, 0x38, 0x00, 0x70, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0x1C, 0x00, 0x0E, 0x00, 0x07, 0x00,\r
+       0x03, 0x80, 0x01, 0xC0, 0x00, 0xE0, 0xFF, 0xFC, 0xFF, 0xFC,\r
+       0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,\r
+       0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,\r
+       0xC3, 0x00, 0xC3, 0x00, 0xE7, 0x00, 0x7E, 0x00, 0x3C, 0x00,\r
+       0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0xCC,\r
+       0xC0, 0xEC, 0xC0, 0x7C, 0xE0, 0x38, 0x7F, 0xFC, 0x3F, 0xEC,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x80, 0xC3, 0x80,\r
+       0xC3, 0xC0, 0xC3, 0xC0, 0xE7, 0x70, 0x7E, 0x3C, 0x3C, 0x1C,\r
+       0x3C, 0x18, 0x7E, 0x1C, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,\r
+       0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x9C, 0xE1, 0xF8, 0x60, 0xF0,\r
+       0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xFF, 0xFC,\r
+       0xFF, 0xFC, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,\r
+       0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,\r
+       0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,\r
+       0xFF, 0xC0, 0xFF, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,\r
+       0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0xFF, 0xE0, 0xFF, 0xC0,\r
+       0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x3C, 0x00, 0xF8,\r
+       0x00, 0xF8, 0x00, 0x3C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,\r
+       0xF0, 0x3C, 0xF8, 0x7C, 0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80,\r
+       0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0, 0xF8, 0x7C, 0xF0, 0x3C,\r
+       0xFC, 0x00, 0xFE, 0x00, 0x07, 0x00, 0x03, 0x80, 0x01, 0xFC,\r
+       0x01, 0xFC, 0x03, 0x80, 0x07, 0x00, 0xFE, 0x00, 0xFC, 0x00,\r
+       0xC0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC, 0xC1, 0xCC, 0xC3, 0x8C,\r
+       0xC7, 0x0C, 0xCE, 0x0C, 0xDC, 0x0C, 0xF8, 0x0C, 0xF0, 0x0C,\r
+       0x00, 0x00, 0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C,\r
+       0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+       0x30, 0x00, 0x30, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x03, 0x00,\r
+       0x03, 0x00, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0x30, 0x00, 0x30,\r
+       0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+       0x0C, 0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x00, 0xE0, 0x00,\r
+       0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C, 0x00,\r
+       0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,\r
+       0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,\r
+       0x00, 0x00, 0x00, 0x00, 0xC0, 0x00, 0xE0, 0x00, 0x70, 0x00,\r
+       0x38, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+       0x00, 0x30, 0x06, 0x78, 0x0E, 0xFC, 0x0C, 0xCC, 0x0C, 0xCC,\r
+       0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xCC, 0x07, 0xFC, 0x03, 0xF8,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C,\r
+       0x03, 0x0C, 0x03, 0x0C, 0x03, 0x9C, 0x01, 0xF8, 0x00, 0xF0,\r
+       0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,\r
+       0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0x30,\r
+       0x00, 0xF0, 0x01, 0xF8, 0x03, 0x9C, 0x03, 0x0C, 0x03, 0x0C,\r
+       0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C, 0xFF, 0xFC, 0xFF, 0xFC,\r
+       0x03, 0xF0, 0x07, 0xF8, 0x0E, 0xDC, 0x0C, 0xCC, 0x0C, 0xCC,\r
+       0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xDC, 0x07, 0xD8, 0x03, 0x90,\r
+       0x00, 0x00, 0x03, 0x00, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x00,\r
+       0xE3, 0x00, 0x70, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+       0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,\r
+       0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xDC, 0x0F, 0xF8, 0x07, 0xF0,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,\r
+       0x03, 0x00, 0x03, 0x80, 0x01, 0xFC, 0x00, 0xFC, 0x00, 0x00,\r
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1B, 0xFC,\r
+       0x1B, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+       0x00, 0x00, 0x00, 0x30, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C,\r
+       0x00, 0x0C, 0x00, 0x1C, 0xCF, 0xF8, 0xCF, 0xF0, 0x00, 0x00,\r
+       0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xE0, 0x01, 0xE0,\r
+       0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C, 0x00, 0x00,\r
+       0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,\r
+       0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,\r
+       0x0F, 0xFC, 0x0F, 0xFC, 0x0E, 0x00, 0x07, 0x00, 0x03, 0xC0,\r
+       0x03, 0xC0, 0x07, 0x00, 0x0E, 0x00, 0x0F, 0xFC, 0x0F, 0xFC,\r
+       0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x00, 0x07, 0x00, 0x0E, 0x00,\r
+       0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0xFC, 0x03, 0xFC,\r
+       0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,\r
+       0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0xF8, 0x03, 0xF0,\r
+       0x0F, 0xFC, 0x0F, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,\r
+       0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00,\r
+       0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,\r
+       0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xFC, 0x0F, 0xFC,\r
+       0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00,\r
+       0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0x00, 0x03, 0x00,\r
+       0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,\r
+       0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xFC, 0x0E, 0x78, 0x06, 0x30,\r
+       0x00, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0xFF, 0xF0, 0xFF, 0xF8,\r
+       0x0C, 0x1C, 0x0C, 0x1C, 0x0C, 0x38, 0x0C, 0x30, 0x00, 0x00,\r
+       0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,\r
+       0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,\r
+       0x0F, 0xC0, 0x0F, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,\r
+       0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x0F, 0xE0, 0x0F, 0xC0,\r
+       0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0xF8,\r
+       0x00, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,\r
+       0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0xF0, 0x01, 0xE0,\r
+       0x01, 0xE0, 0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C,\r
+       0x0C, 0x00, 0x0E, 0x00, 0x07, 0x0C, 0x03, 0x9C, 0x01, 0xF8,\r
+       0x01, 0xF0, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00, 0x0C, 0x00,\r
+       0x0C, 0x0C, 0x0C, 0x1C, 0x0C, 0x3C, 0x0C, 0x7C, 0x0C, 0xEC,\r
+       0x0D, 0xCC, 0x0F, 0x8C, 0x0F, 0x0C, 0x0E, 0x0C, 0x0C, 0x0C,\r
+       0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x3F, 0xF0, 0x7C, 0xF8,\r
+       0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00,\r
+       0x03, 0x0C, 0x03, 0x0C, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x0C,\r
+       0xC3, 0x0C, 0xC0, 0x0C, 0xE0, 0x0C, 0x70, 0x0C, 0x30, 0x0C,\r
+       0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C,\r
+       0x7C, 0xF8, 0x3F, 0xF0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,\r
+       0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,\r
+       0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC,\r
+       0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC\r
+};\r
+\r
+/**\r
+ * \brief Prepare to write GRAM data for ili93xx.\r
+ */\r
+static void ili93xx_write_ram_prepare(void)\r
+{\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               /** Write Data to GRAM (R22h) */\r
+               LCD_IR(0);\r
+               LCD_IR(ILI9325_GRAM_DATA_REG);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               /** memory write command (R2Ch)*/\r
+               LCD_IR(ILI9341_CMD_MEMORY_WRITE);\r
+               LCD_IR(0);\r
+               LCD_IR(ILI9341_CMD_WRITE_MEMORY_CONTINUE);\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Write data to LCD GRAM.\r
+ *\r
+ * \param ul_color 24-bits RGB color.\r
+ */\r
+static void ili93xx_write_ram(ili93xx_color_t ul_color)\r
+{\r
+       LCD_WD((ul_color >> 16) & 0xFF);\r
+       LCD_WD((ul_color >> 8) & 0xFF);\r
+       LCD_WD(ul_color & 0xFF);\r
+}\r
+\r
+/**\r
+ * \brief Write multiple data in buffer to LCD controller for ili93xx.\r
+ *\r
+ * \param p_ul_buf data buffer.\r
+ * \param ul_size size in pixels.\r
+ */\r
+static void ili93xx_write_ram_buffer(const ili93xx_color_t *p_ul_buf,\r
+               uint32_t ul_size)\r
+{\r
+       uint32_t ul_addr;\r
+       for (ul_addr = 0; ul_addr < (ul_size - ul_size % 8); ul_addr += 8) {\r
+               ili93xx_write_ram(p_ul_buf[ul_addr]);\r
+               ili93xx_write_ram(p_ul_buf[ul_addr + 1]);\r
+               ili93xx_write_ram(p_ul_buf[ul_addr + 2]);\r
+               ili93xx_write_ram(p_ul_buf[ul_addr + 3]);\r
+               ili93xx_write_ram(p_ul_buf[ul_addr + 4]);\r
+               ili93xx_write_ram(p_ul_buf[ul_addr + 5]);\r
+               ili93xx_write_ram(p_ul_buf[ul_addr + 6]);\r
+               ili93xx_write_ram(p_ul_buf[ul_addr + 7]);\r
+       }\r
+       for (; ul_addr < ul_size; ul_addr++) {\r
+               ili93xx_write_ram(p_ul_buf[ul_addr]);\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Write a word (16bits)to LCD Register.\r
+ *\r
+ * \param uc_reg register address.\r
+ * \param us_data data to be written.\r
+ */\r
+static void ili93xx_write_register_word(uint8_t uc_reg, uint16_t us_data)\r
+{\r
+       LCD_IR(0);\r
+       LCD_IR(uc_reg);\r
+       LCD_WD((us_data >> 8) & 0xFF);\r
+       LCD_WD(us_data & 0xFF);\r
+}\r
+\r
+/**\r
+ * \brief Write data to LCD Register for ili93xx.\r
+ *\r
+ * \param uc_reg register address.\r
+ * \param us_data data to be written.\r
+ */\r
+static void ili93xx_write_register(uint8_t uc_reg, uint8_t *p_data,\r
+               uint8_t uc_datacnt)\r
+{\r
+uint8_t i;\r
+\r
+       LCD_IR(0);\r
+       LCD_IR(uc_reg);\r
+       for (i = 0; i < uc_datacnt; i++) {\r
+               LCD_WD(p_data[i]);\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Prepare to read GRAM data for ili93xx.\r
+ */\r
+static void ili93xx_read_ram_prepare(void)\r
+{\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               LCD_IR(0);\r
+               /** Write Data to GRAM (R22h) */\r
+               LCD_IR(ILI9325_GRAM_DATA_REG);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               LCD_IR(0);\r
+               /** Write Data to GRAM (R2Eh) */\r
+               LCD_IR(ILI9341_CMD_MEMORY_READ);\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Read data to LCD GRAM for ili93xx.\r
+ *\r
+ * \note For ili9325, because pixel data LCD GRAM is 18-bits, so convertion\r
+ * to RGB 24-bits will cause low color bit lose.\r
+ *\r
+ * \return color 24-bits RGB color.\r
+ */\r
+static uint32_t ili93xx_read_ram(void)\r
+{\r
+       uint8_t value[3];\r
+       uint32_t color;\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               /** dummy read*/\r
+               value[0] = LCD_RD();\r
+               value[1] = LCD_RD();\r
+               /** data upper byte*/\r
+               value[0] = LCD_RD();\r
+               /** data lower byte */\r
+               value[1] = LCD_RD();\r
+\r
+               /** Convert RGB565 to RGB888 */\r
+               /** For BGR format */\r
+               color = ((value[0] & 0xF8)) | ((value[0] & 0x07) << 13) |\r
+                               ((value[1] & 0xE0) << 5) |\r
+                               ((value[1] & 0x1F) << 19);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               /** dummy read */\r
+               value[0] = LCD_RD();\r
+               /** the highest byte - R byte*/\r
+               value[0] = LCD_RD();\r
+               /** the middle byte - G byte*/\r
+               value[1] = LCD_RD();\r
+               /** the lowest byte - B byte*/\r
+               value[2] = LCD_RD();\r
+               /** combine R, G, B byte to a color value */\r
+               color = (value[0] << 16) | (value[1] << 8) | value[2];\r
+       }\r
+\r
+       return color;\r
+}\r
+\r
+/**\r
+ * \brief Read data from LCD Register.\r
+ *\r
+ * \param uc_reg register address.\r
+ * \param p_data the pointer to the read data.\r
+ * \param uc_datacnt the number of the read data\r
+ */\r
+static void ili93xx_read_register(uint8_t uc_reg, uint8_t *p_data,\r
+               uint8_t uc_datacnt)\r
+{\r
+uint8_t i;\r
+\r
+       LCD_IR(0);\r
+       LCD_IR(uc_reg);\r
+\r
+       for (i = 0; i < uc_datacnt; i++) {\r
+               p_data[i] = LCD_RD();\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Delay function.\r
+ */\r
+static void ili93xx_delay(uint32_t ul_ms)\r
+{\r
+       volatile uint32_t i;\r
+\r
+       for (i = 0; i < ul_ms; i++) {\r
+               for (i = 0; i < 100000; i++) {\r
+               }\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Check box coordinates.\r
+ *\r
+ * \param p_ul_x1 X coordinate of upper-left corner on LCD.\r
+ * \param p_ul_y1 Y coordinate of upper-left corner on LCD.\r
+ * \param p_ul_x2 X coordinate of lower-right corner on LCD.\r
+ * \param p_ul_y2 Y coordinate of lower-right corner on LCD.\r
+ */\r
+static void ili93xx_check_box_coordinates(uint32_t *p_ul_x1, uint32_t *p_ul_y1,\r
+               uint32_t *p_ul_x2, uint32_t *p_ul_y2)\r
+{\r
+       uint32_t dw;\r
+\r
+       if (*p_ul_x1 >= g_ul_lcd_x_length) {\r
+               *p_ul_x1 = g_ul_lcd_x_length - 1;\r
+       }\r
+\r
+       if (*p_ul_x2 >= g_ul_lcd_x_length) {\r
+               *p_ul_x2 = g_ul_lcd_x_length - 1;\r
+       }\r
+\r
+       if (*p_ul_y1 >= g_ul_lcd_y_length) {\r
+               *p_ul_y1 = g_ul_lcd_y_length - 1;\r
+       }\r
+\r
+       if (*p_ul_y2 >= g_ul_lcd_y_length) {\r
+               *p_ul_y2 = g_ul_lcd_y_length - 1;\r
+       }\r
+\r
+       if (*p_ul_x1 > *p_ul_x2) {\r
+               dw = *p_ul_x1;\r
+               *p_ul_x1 = *p_ul_x2;\r
+               *p_ul_x2 = dw;\r
+       }\r
+\r
+       if (*p_ul_y1 > *p_ul_y2) {\r
+               dw = *p_ul_y1;\r
+               *p_ul_y1 = *p_ul_y2;\r
+               *p_ul_y2 = dw;\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Read device ID to idenfity the device\r
+ *        ILI9325 device ID locates in Device Code Read (R00h) register.\r
+ *        ILI9341 device ID locates in Read ID4 (RD3h) register.\r
+ *\r
+ * \return 0 if secceed in identifying device; otherwise fails.\r
+ */\r
+uint8_t ili93xx_device_type_identify(void)\r
+{\r
+       uint8_t paratable[6];\r
+       uint16_t chipid;\r
+\r
+       /** Read ID4 (RD4h) register to get device code for ILI9341*/\r
+       ili93xx_read_register(ILI9341_CMD_READ_ID4, paratable, 4);\r
+       chipid = ((uint16_t)paratable[2] << 8) + paratable[3];\r
+\r
+       if (chipid == ILI9341_DEVICE_CODE) {\r
+               g_uc_device_type = DEVICE_TYPE_ILI9341;\r
+               return 0;\r
+       }\r
+\r
+       /** Driver Code Read (R00h) for ILI9325*/\r
+       ili93xx_read_register(ILI9325_DEVICE_CODE_REG, paratable, 2);\r
+       chipid = ((uint16_t)paratable[0] << 8) + paratable[1];\r
+       if (chipid == ILI9325_DEVICE_CODE) {\r
+               g_uc_device_type = DEVICE_TYPE_ILI9325;\r
+               return 0;\r
+       }\r
+\r
+       return 1;\r
+}\r
+\r
+/**\r
+ * \brief Initialize the ILI93XX lcd driver.\r
+ *\r
+ * \note Make sure below works have been done before calling ili93xx_init()\r
+ * 1. ILI93xx related Pins have been initialized correctly.\r
+ * 2. SMC has been configured correctly for access ILI93xx (8-bit system\r
+ *    interface for now).\r
+ *\r
+ * \param p_opt pointer to ILI93xx option structure.\r
+ *\r
+ * \return 0 if initialization succeeds, otherwise fails.\r
+ */\r
+uint32_t ili93xx_init(struct ili93xx_opt_t *p_opt)\r
+{\r
+       uint8_t paratable[15];\r
+\r
+       /** Identify the LCD driver device*/\r
+       if (ili93xx_device_type_identify() != 0) {\r
+               return 1;\r
+       }\r
+\r
+       g_ul_lcd_x_length = ILI93XX_LCD_WIDTH;\r
+       g_ul_lcd_y_length = ILI93XX_LCD_HEIGHT;\r
+\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               /** Turn off LCD */\r
+               ili93xx_write_register_word(ILI9325_DISP_CTRL1, ILI9325_DISP_CTRL1_GON |\r
+                               ILI9325_DISP_CTRL1_DTE | ILI9325_DISP_CTRL1_D(0x03));\r
+\r
+               /** Start initial sequence */\r
+               /** Disable sleep and standby mode*/\r
+               ili93xx_write_register_word(ILI9325_POWER_CTRL1, 0x0000);\r
+               /** Start internal OSC */\r
+               ili93xx_write_register_word(ILI9325_START_OSC_CTRL,\r
+                               ILI9325_START_OSC_CTRL_EN);\r
+               /** Set SS bit and direction output from S720 to S1 */\r
+               ili93xx_write_register_word(ILI9325_DRIVER_OUTPUT_CTRL1,\r
+                               ILI9325_DRIVER_OUTPUT_CTRL1_SS);\r
+               /** Set 1 line inversion */\r
+               ili93xx_write_register_word(ILI9325_LCD_DRIVING_CTRL,\r
+                               ILI9325_LCD_DRIVING_CTRL_BIT10 | ILI9325_LCD_DRIVING_CTRL_EOR\r
+                               | ILI9325_LCD_DRIVING_CTRL_BC0);\r
+               /** Disable resizing feature */\r
+               ili93xx_write_register_word(ILI9325_RESIZE_CTRL, 0x0000);\r
+               /** Set the back porch and front porch */\r
+               ili93xx_write_register_word(ILI9325_DISP_CTRL2,\r
+                               ILI9325_DISP_CTRL2_BP(\r
+                               0x07) | ILI9325_DISP_CTRL2_FP(0x02));\r
+               /** Set non-display area refresh cycle ISC[3:0] */\r
+               ili93xx_write_register_word(ILI9325_DISP_CTRL3, 0x0000);\r
+               /** Disable FMARK function */\r
+               ili93xx_write_register_word(ILI9325_DISP_CTRL4, 0x0000);\r
+               /** 18-bit RGB interface and writing display data by system\r
+                *interface */\r
+               ili93xx_write_register_word(ILI9325_RGB_DISP_INTERFACE_CTRL1,\r
+                               0x0000);\r
+               /** Set the output position of frame cycle */\r
+               ili93xx_write_register_word(ILI9325_FRAME_MAKER_POS, 0x0000);\r
+               /** RGB interface polarity */\r
+               ili93xx_write_register_word(ILI9325_RGB_DISP_INTERFACE_CTRL2,\r
+                               0x0000);\r
+\r
+               /** Power on sequence */\r
+               /** Disable sleep and standby mode */\r
+               ili93xx_write_register_word(ILI9325_POWER_CTRL1, 0x0000);\r
+\r
+               /**\r
+                * Selects the operating frequency of the step-up circuit 1,2\r
+                * and Sets the ratio factor of Vci.\r
+                */\r
+               ili93xx_write_register_word(ILI9325_POWER_CTRL2, 0x0000);\r
+               /** Set VREG1OUT voltage */\r
+               ili93xx_write_register_word(ILI9325_POWER_CTRL3, 0x0000);\r
+               /** Set VCOM amplitude */\r
+               ili93xx_write_register_word(ILI9325_POWER_CTRL4, 0x0000);\r
+               ili93xx_delay(200);\r
+\r
+               /** Enable power supply and source driver */\r
+\r
+               /**\r
+                * Adjusts the constant current and Sets the factor used\r
+                * in the step-up circuits.\r
+                */\r
+               ili93xx_write_register_word(ILI9325_POWER_CTRL1,\r
+                               ILI9325_POWER_CTRL1_SAP | ILI9325_POWER_CTRL1_BT(0x02) |\r
+                               ILI9325_POWER_CTRL1_APE |\r
+                               ILI9325_POWER_CTRL1_AP(0x01));\r
+\r
+               /**\r
+                * Select the operating frequency of the step-up circuit 1,2 and\r
+                * Sets the ratio factor of Vci\r
+                */\r
+               ili93xx_write_register_word(ILI9325_POWER_CTRL2,\r
+                               ILI9325_POWER_CTRL2_DC1(0x02) |\r
+                               ILI9325_POWER_CTRL2_DC0(0x02) | ILI9325_POWER_CTRL2_VC(0x07));\r
+               ili93xx_delay(50);\r
+               /** Internal reference voltage= Vci */\r
+               ili93xx_write_register_word(ILI9325_POWER_CTRL3,\r
+                               ILI9325_POWER_CTRL3_PON | ILI9325_POWER_CTRL3_VRH(0x0B));\r
+               ili93xx_delay(50);\r
+               /** Set VDV[4:0] for VCOM amplitude */\r
+               ili93xx_write_register_word(ILI9325_POWER_CTRL4,\r
+                               ILI9325_POWER_CTRL4_VDV(0x11));\r
+               /** Set VCM[5:0] for VCOMH */\r
+               ili93xx_write_register_word(ILI9325_POWER_CTRL7,\r
+                               ILI9325_POWER_CTRL7_VCM(0x19));\r
+               /** Set Frame Rate */\r
+               ili93xx_write_register_word(ILI9325_FRAME_RATE_AND_COLOR_CTRL,\r
+                               ILI9325_FRAME_RATE_AND_COLOR_CTRL_FRS(0x0D));\r
+               ili93xx_delay(50);\r
+\r
+               /** Adjust the Gamma Curve */\r
+               ili93xx_write_register_word(ILI9325_GAMMA_CTL1, 0x0000);\r
+               ili93xx_write_register_word(ILI9325_GAMMA_CTL2,\r
+                               ILI9325_GAMMA_CTL2_KP3(0x02) |\r
+                               ILI9325_GAMMA_CTL2_KP2(0x04));\r
+               ili93xx_write_register_word(ILI9325_GAMMA_CTL3,\r
+                               ILI9325_GAMMA_CTL3_KP5(0x02) |\r
+                               ILI9325_GAMMA_CTL3_KP4(0x00));\r
+               ili93xx_write_register_word(ILI9325_GAMMA_CTL4,\r
+                               ILI9325_GAMMA_CTL4_RP1(0x00) |\r
+                               ILI9325_GAMMA_CTL4_RP0(0x07));\r
+               ili93xx_write_register_word(ILI9325_GAMMA_CTL5,\r
+                               ILI9325_GAMMA_CTL5_VRP1(0x14) |\r
+                               ILI9325_GAMMA_CTL5_VRP0(0x04));\r
+               ili93xx_write_register_word(ILI9325_GAMMA_CTL6,\r
+                               ILI9325_GAMMA_CTL6_KN1(0x07) |\r
+                               ILI9325_GAMMA_CTL6_KN0(0x05));\r
+               ili93xx_write_register_word(ILI9325_GAMMA_CTL7,\r
+                               ILI9325_GAMMA_CTL7_KN3(0x03) |\r
+                               ILI9325_GAMMA_CTL7_KN2(0x05));\r
+               ili93xx_write_register_word(ILI9325_GAMMA_CTL8,\r
+                               ILI9325_GAMMA_CTL8_KN5(0x07) |\r
+                               ILI9325_GAMMA_CTL8_KN4(0x07));\r
+               ili93xx_write_register_word(ILI9325_GAMMA_CTL9,\r
+                               ILI9325_GAMMA_CTL9_RN1(0x07) |\r
+                               ILI9325_GAMMA_CTL9_RN0(0x01));\r
+               ili93xx_write_register_word(ILI9325_GAMMA_CTL10,\r
+                               ILI9325_GAMMA_CTL10_VRN1(0x00) |\r
+                               ILI9325_GAMMA_CTL10_VRN0(0x0E));\r
+               /**\r
+                * Use the high speed write mode (HWM=1)\r
+                * When TRI = 1, data are transferred to the internal RAM in\r
+                * 8-bit x 3 transfers mode via the 8-bit interface.\r
+                * DFM Set the mode of transferring data to the internal RAM\r
+                * when TRI = 1.\r
+                * I/D[1:0] = 11 Horizontal : increment Vertical : increment,\r
+                * AM=0:Horizontal\r
+                */\r
+               ili93xx_write_register_word(ILI9325_ENTRY_MODE,\r
+                               ILI9325_ENTRY_MODE_TRI | ILI9325_ENTRY_MODE_DFM |\r
+                               ILI9325_ENTRY_MODE_ID(0x01) | ILI9325_ENTRY_MODE_BGR);\r
+               /**\r
+                * Sets the number of lines to drive the LCD at an interval of 8\r
+                * lines. The scan direction is from G320 to G1\r
+                */\r
+               ili93xx_write_register_word(ILI9325_DRIVER_OUTPUT_CTRL2,\r
+                               ILI9325_DRIVER_OUTPUT_CTRL2_GS |\r
+                               ILI9325_DRIVER_OUTPUT_CTRL2_NL(0x27));\r
+\r
+               /** Vertical Scrolling */\r
+               /** Disable scrolling and enable the grayscale inversion */\r
+               ili93xx_write_register_word(ILI9325_BASE_IMG_DISP_CTRL,\r
+                               ILI9325_BASE_IMG_DISP_CTRL_REV);\r
+               ili93xx_write_register_word(ILI9325_VERTICAL_SCROLL_CTRL,\r
+                               0x0000);\r
+\r
+               /** Disable Partial Display */\r
+               ili93xx_write_register_word(ILI9325_PARTIAL_IMG1_DISP_POS,\r
+                               0x0000);\r
+               ili93xx_write_register_word(\r
+                               ILI9325_PARTIAL_IMG1_AREA_START_LINE,\r
+                               0x0000);\r
+               ili93xx_write_register_word(ILI9325_PARTIAL_IMG1_AREA_END_LINE,\r
+                               0x0000);\r
+               ili93xx_write_register_word(ILI9325_PARTIAL_IMG2_DISP_POS,\r
+                               0x0000);\r
+               ili93xx_write_register_word(\r
+                               ILI9325_PARTIAL_IMG2_AREA_START_LINE,\r
+                               0x0000);\r
+               ili93xx_write_register_word(ILI9325_PARTIAL_IMG2_AREA_END_LINE,\r
+                               0x0000);\r
+\r
+               /** Panel Control */\r
+               ili93xx_write_register_word(ILI9325_PANEL_INTERFACE_CTRL1,\r
+                               ILI9325_PANEL_INTERFACE_CTRL1_RTNI(0x10));\r
+               ili93xx_write_register_word(ILI9325_PANEL_INTERFACE_CTRL2,\r
+                               ILI9325_PANEL_INTERFACE_CTRL2_NOWI(0x06));\r
+               ili93xx_write_register_word(ILI9325_PANEL_INTERFACE_CTRL4,\r
+                               ILI9325_PANEL_INTERFACE_CTRL4_DIVE(0x01) |\r
+                               ILI9325_PANEL_INTERFACE_CTRL4_RTNE(0x10));\r
+\r
+               ili93xx_set_window(0, 0, p_opt->ul_width, p_opt->ul_height);\r
+               ili93xx_set_foreground_color(p_opt->foreground_color);\r
+               ili93xx_set_cursor_position(0, 0);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               /** init for ILI9341 **/\r
+               /** power control A configuration*/\r
+               paratable[0] = 0x39;\r
+               paratable[1] = 0x2C;\r
+               paratable[2] = 0x00;\r
+               paratable[3] = 0x34;\r
+               paratable[4] = 0x02;\r
+               ili93xx_write_register(ILI9341_CMD_POWER_CONTROL_A, paratable, 5);\r
+\r
+               /** power control B configuration */\r
+               paratable[0] = 0;\r
+               paratable[1] = 0xAA;\r
+               paratable[2] = 0xB0;\r
+               ili93xx_write_register(ILI9341_CMD_POWER_CONTROL_B, paratable, 3);\r
+\r
+               /** Pump Ratio Control configuration */\r
+               paratable[0] = 0x30;\r
+               ili93xx_write_register(ILI9341_CMD_PUMP_RATIO_CONTROL,\r
+                               paratable, 1);\r
+\r
+               /** Power Control 1 configuration*/\r
+               paratable[0] = 0x25;\r
+               ili93xx_write_register(ILI9341_CMD_POWER_CONTROL_1, paratable, 1);\r
+\r
+               /** Power Control 2 configuration*/\r
+               paratable[0] = 0x11;\r
+               ili93xx_write_register(ILI9341_CMD_POWER_CONTROL_2, paratable, 1);\r
+\r
+               /** VOM Control 1 configuration*/\r
+               paratable[0] = 0x5C;\r
+               paratable[1] = 0x4C;\r
+               ili93xx_write_register(ILI9341_CMD_VCOM_CONTROL_1, paratable, 2);\r
+\r
+               /** VOM control 2 configuration*/\r
+               paratable[0] = 0x94;\r
+               ili93xx_write_register(ILI9341_CMD_VCOM_CONTROL_2, paratable, 1);\r
+\r
+               /** Driver Timing Control A configuration*/\r
+               paratable[0] = 0x85;\r
+               paratable[1] = 0x01;\r
+               paratable[2] = 0x78;\r
+               ili93xx_write_register(ILI9341_CMD_DRIVER_TIMING_CTL_A, paratable, 3);\r
+\r
+               /** Driver Timing Control B configuration*/\r
+               paratable[0] = 0x00;\r
+               paratable[1] = 0x00;\r
+               ili93xx_write_register(ILI9341_CMD_DRIVER_TIMING_CTL_B, paratable, 2);\r
+\r
+               /** Memory Access Control configuration*/\r
+               paratable[0] = ILI9341_CMD_MEMORY_ACCESS_CONTROL_MX |\r
+                               ILI9341_CMD_MEMORY_ACCESS_CONTROL_BGR;\r
+               ili93xx_write_register(ILI9341_CMD_MEMORY_ACCESS_CONTROL,\r
+                               paratable, 1);\r
+\r
+               /** Colmod Pixel Format Set configuation*/\r
+               paratable[0] = 0x06;\r
+               ili93xx_write_register(ILI9341_CMD_PIXEL_FORMAT_SET, paratable, 1);\r
+\r
+               /** Display Function Control */\r
+               paratable[0] = 0x02;\r
+               paratable[1] = 0x82;\r
+               paratable[2] = 0x27;\r
+               paratable[3] = 0x00;\r
+               ili93xx_write_register(ILI9341_CMD_DISPLAY_FUNCTION_CTL,\r
+                                     paratable, 4);\r
+                               \r
+               paratable[0] = 0x00;\r
+               ili93xx_write_register(ILI9341_CMD_ENABLE_3_GAMMA_CONTROL,\r
+                                     paratable,1);\r
+               \r
+               paratable[0] = 0x01;\r
+               ili93xx_write_register(ILI9341_CMD_GAMMA_SET, paratable,1);\r
+               \r
+               /** set gamma curve parameters*/\r
+               paratable[0]=0x0F;\r
+               paratable[1]=0x31;\r
+               paratable[2]=0x2B;\r
+               paratable[3]=0x0C;\r
+               paratable[4]=0x0E;\r
+               paratable[5]=0x08;\r
+               paratable[6]=0x4E;\r
+               paratable[7]=0xF1;\r
+               paratable[8]=0x37;\r
+               paratable[9]=0x07;\r
+               paratable[10]=0x10;\r
+               paratable[11]=0x03;\r
+               paratable[12]=0x0E;\r
+               paratable[13]=0x09;\r
+               paratable[14]=0x00;\r
+               ili93xx_write_register(ILI9341_CMD_POSITIVE_GAMMA_CORRECTION,\r
+                                     paratable, 15);\r
+               paratable[0]=0x00;\r
+               paratable[1]=0x0E;\r
+               paratable[2]=0x14;\r
+               paratable[3]=0x03;\r
+               paratable[4]=0x11;\r
+               paratable[5]=0x07;\r
+               paratable[6]=0x31;\r
+               paratable[7]=0xC1;\r
+               paratable[8]=0x48;\r
+               paratable[9]=0x08;\r
+               paratable[10]=0x0F;\r
+               paratable[11]=0x0C;\r
+               paratable[12]=0x31;\r
+               paratable[13]=0x36;\r
+               paratable[14]=0x0F;\r
+               ili93xx_write_register(ILI9341_CMD_NEGATIVE_GAMMA_CORRECTION,\r
+                                     paratable, 15);\r
+               \r
+               /** set window area*/\r
+               ili93xx_set_window(0, 0, p_opt->ul_width, p_opt->ul_height);\r
+               ili93xx_set_foreground_color(p_opt->foreground_color);\r
+               /** Leave sleep mode*/\r
+               ili93xx_write_register(ILI9341_CMD_SLEEP_OUT, paratable, 0);\r
+               ili93xx_delay(10);\r
+               /** Display on*/\r
+               ili93xx_write_register(ILI9341_CMD_DISPLAY_ON, paratable, 0);\r
+       } else {\r
+               /** exit with return value 1 if device type is not supported.*/\r
+               return 1;\r
+       }\r
+\r
+       return 0;\r
+}\r
+\r
+/**\r
+ * \brief get the device type.\r
+ */\r
+uint8_t ili93xx_device_type(void)\r
+{\r
+       return g_uc_device_type;\r
+}\r
+\r
+/**\r
+ * \brief Turn on the LCD.\r
+ */\r
+void ili93xx_display_on(void)\r
+{\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               ili93xx_write_register_word(ILI9325_DISP_CTRL1,\r
+                               ILI9325_DISP_CTRL1_BASEE |\r
+                               ILI9325_DISP_CTRL1_GON |\r
+                               ILI9325_DISP_CTRL1_DTE |\r
+                               ILI9325_DISP_CTRL1_D(0x03));\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               ili93xx_write_register(ILI9341_CMD_DISPLAY_ON, NULL, 0);\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Turn off the LCD.\r
+ */\r
+void ili93xx_display_off(void)\r
+{\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               ili93xx_write_register_word(ILI9325_DISP_CTRL1, 0x00);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               ili93xx_write_register(ILI9341_CMD_DISPLAY_OFF, NULL, 0);\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Set foreground color.\r
+ *\r
+ * \param ul_color foreground color.\r
+ */\r
+void ili93xx_set_foreground_color(ili93xx_color_t ul_color)\r
+{\r
+       uint32_t i;\r
+\r
+       /** Fill the cache with selected color */\r
+       for (i = 0; i < LCD_DATA_CACHE_SIZE; ++i) {\r
+               g_ul_pixel_cache[i] = ul_color;\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Fill the LCD buffer with the specified color.\r
+ *\r
+ * \param ul_color fill color.\r
+ */\r
+void ili93xx_fill(ili93xx_color_t ul_color)\r
+{\r
+       uint32_t dw;\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               ili93xx_set_cursor_position(0, 0);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               ili93xx_set_window(0, 0, g_ul_lcd_x_length, g_ul_lcd_y_length);\r
+       }\r
+\r
+       ili93xx_write_ram_prepare();\r
+\r
+       for (dw = ILI93XX_LCD_WIDTH * ILI93XX_LCD_HEIGHT; dw > 0; dw--) {\r
+               ili93xx_write_ram(ul_color);\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Set display window.\r
+ *\r
+ * \param ul_x Horizontal address start position\r
+ * \param ul_y Vertical address start position\r
+ * \param ul_width The width of the window.\r
+ * \param ul_height The height of the window.\r
+ */\r
+void ili93xx_set_window(uint32_t ul_x, uint32_t ul_y, uint32_t ul_width,\r
+               uint32_t ul_height)\r
+{\r
+       Assert(ul_x <= (g_ul_lcd_x_length - 1));\r
+       Assert(ul_y <= (g_ul_lcd_y_length - 1));\r
+       Assert(ul_width <= (g_ul_lcd_x_length - ul_x));\r
+       Assert(ul_height <= (g_ul_lcd_y_length - ul_y));\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               /** Set Horizontal Address Start Position */\r
+               ili93xx_write_register_word(ILI9325_HORIZONTAL_ADDR_START,\r
+                               (uint16_t)ul_x);\r
+\r
+               /** Set Horizontal Address End Position */\r
+               ili93xx_write_register_word(ILI9325_HORIZONTAL_ADDR_END,\r
+                               (uint16_t)(ul_x + ul_width - 1));\r
+\r
+               /** Set Vertical Address Start Position */\r
+               ili93xx_write_register_word(ILI9325_VERTICAL_ADDR_START,\r
+                               (uint16_t)ul_y);\r
+\r
+               /** Set Vertical Address End Position */\r
+               ili93xx_write_register_word(ILI9325_VERTICAL_ADDR_END,\r
+                               (uint16_t)(ul_y + ul_height - 1));\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               uint8_t paratable[4];\r
+\r
+               /** Set Column Address Position */\r
+               paratable[0] = (ul_x >> 8) & 0xFF;\r
+               paratable[1] = ul_x & 0xFF;\r
+               paratable[2] = ((ul_x + ul_width - 1) >> 8) & 0xFF;\r
+               paratable[3] = (ul_x + ul_width - 1) & 0xFF;\r
+               ili93xx_write_register(ILI9341_CMD_COLUMN_ADDRESS_SET,\r
+                               paratable, 4);\r
+\r
+               /** Set Page Address Position */\r
+               paratable[0] = (ul_y >> 8) & 0xFF;\r
+               paratable[1] = ul_y & 0xFF;\r
+               paratable[2] = ((ul_y + ul_height - 1) >> 8) & 0xFF;\r
+               paratable[3] = (ul_y + ul_height - 1) & 0xFF;\r
+               ili93xx_write_register(ILI9341_CMD_PAGE_ADDRESS_SET,\r
+                                      paratable, 4);\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Set cursor of LCD screen.\r
+ *\r
+ * \param us_x X coordinate of upper-left corner on LCD.\r
+ * \param us_y Y coordinate of upper-left corner on LCD.\r
+ */\r
+void ili93xx_set_cursor_position(uint16_t us_x, uint16_t us_y)\r
+{\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               /** GRAM Horizontal/Vertical Address Set (R20h, R21h) */\r
+               ili93xx_write_register_word(ILI9325_HORIZONTAL_GRAM_ADDR_SET, us_x);\r
+               ili93xx_write_register_word(ILI9325_VERTICAL_GRAM_ADDR_SET, us_y);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               /** There is no corresponding operation for ILI9341. */\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Scroll up/down for the number of specified lines.\r
+ *\r
+ * \param ul_lines number of lines to scroll.\r
+ */\r
+void ili93xx_scroll(int32_t ul_lines)\r
+{\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               ili93xx_write_register_word(ILI9325_VERTICAL_SCROLL_CTRL, ul_lines);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               uint8_t paratable[2];\r
+\r
+               paratable[0] = (ul_lines >> 8) & 0xFF;\r
+               paratable[1] = ul_lines & 0xFF;\r
+               ili93xx_write_register(ILI9341_CMD_VERT_SCROLL_START_ADDRESS,\r
+                               paratable, 2);\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Vertical Scroll area definition for ili9341.\r
+ *\r
+ * \param us_tfa the top fixed area (the No. of lines)\r
+ * \param us_vsa the height of the vetical scrolling area\r
+ * \param us_bfa the bottom fixed area (the No. of lines)\r
+ */\r
+void ili93xx_vscroll_area_define(uint16_t us_tfa, uint16_t us_vsa,\r
+               uint16_t us_bfa)\r
+{\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               uint8_t paratable[6];\r
+\r
+               paratable[0] = (us_tfa >> 8) & 0xFF;\r
+               paratable[1] = us_tfa & 0xFF;\r
+               paratable[2] = (us_vsa >> 8) & 0xFF;\r
+               paratable[3] = us_vsa & 0xFF;\r
+               paratable[4] = (us_bfa >> 8) & 0xFF;\r
+               paratable[5] = us_bfa & 0xFF;\r
+               ili93xx_write_register(ILI9341_CMD_VERT_SCROLL_DEFINITION,\r
+                               paratable, 6);\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Enable the scrolling feature.\r
+ */\r
+void ili93xx_enable_scroll(void)\r
+{\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               ili93xx_write_register_word(ILI9325_BASE_IMG_DISP_CTRL,\r
+                               ILI9325_BASE_IMG_DISP_CTRL_REV |\r
+                               ILI9325_BASE_IMG_DISP_CTRL_VLE);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               /** no operation needed for ILI9341*/\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Disable the scrolling feature.\r
+ */\r
+void ili93xx_disable_scroll(void)\r
+{\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               ili93xx_write_register_word(ILI9325_BASE_IMG_DISP_CTRL,\r
+                               ILI9325_BASE_IMG_DISP_CTRL_REV);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               ili93xx_display_off();\r
+               ili93xx_write_register(ILI9341_CMD_NORMAL_DISP_MODE_ON, NULL, 0);\r
+               ili93xx_display_on();\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Set display direction.\r
+ *\r
+ * \param e_dd 0: horizontal direction, 1: vertical direction\r
+ * \param e_shd: horizontal increase(0) or decrease(1)\r
+ * \param e_scd: vertical increase(1) or decrease(0)\r
+ */\r
+void ili93xx_set_display_direction(enum ili93xx_display_direction e_dd,\r
+               enum ili93xx_shift_direction e_shd,\r
+               enum ili93xx_scan_direction e_scd)\r
+{\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               if (e_dd == LANDSCAPE) {\r
+                       ili93xx_write_register_word(ILI9325_ENTRY_MODE,\r
+                                       ILI9325_ENTRY_MODE_BGR | ILI9325_ENTRY_MODE_TRI |\r
+                                       ILI9325_ENTRY_MODE_DFM | ILI9325_ENTRY_MODE_ID(0x00)|\r
+                                       ILI9325_ENTRY_MODE_AM);\r
+                       g_ul_lcd_x_length = ILI93XX_LCD_HEIGHT;\r
+                       g_ul_lcd_y_length = ILI93XX_LCD_WIDTH;\r
+               } else {\r
+                       ili93xx_write_register_word(ILI9325_ENTRY_MODE,\r
+                                       ILI9325_ENTRY_MODE_BGR | ILI9325_ENTRY_MODE_TRI |\r
+                                       ILI9325_ENTRY_MODE_DFM | ILI9325_ENTRY_MODE_ID(0x01));\r
+                       g_ul_lcd_x_length = ILI93XX_LCD_WIDTH;\r
+                       g_ul_lcd_y_length = ILI93XX_LCD_HEIGHT;\r
+               }\r
+\r
+               if (e_shd == H_INCREASE) {\r
+                       ili93xx_write_register_word(ILI9325_DRIVER_OUTPUT_CTRL1, 0x0000);\r
+               } else {\r
+                       ili93xx_write_register_word(ILI9325_DRIVER_OUTPUT_CTRL1,\r
+                                       ILI9325_DRIVER_OUTPUT_CTRL1_SS);\r
+               }\r
+\r
+               if (e_scd == V_INCREASE) {\r
+                       ili93xx_write_register_word(ILI9325_DRIVER_OUTPUT_CTRL2,\r
+                                       ILI9325_DRIVER_OUTPUT_CTRL2_NL(0x27));\r
+               } else {\r
+                       ili93xx_write_register_word(ILI9325_DRIVER_OUTPUT_CTRL2,\r
+                                       ILI9325_DRIVER_OUTPUT_CTRL2_GS |\r
+                                       ILI9325_DRIVER_OUTPUT_CTRL2_NL(0x27));\r
+               }\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               if (e_dd == LANDSCAPE) {\r
+                       uint8_t paratable[1];\r
+                       paratable[0] = ILI9341_CMD_MEMORY_ACCESS_CONTROL_MV |\r
+                                       ILI9341_CMD_MEMORY_ACCESS_CONTROL_BGR;\r
+                       ili93xx_write_register(\r
+                                       ILI9341_CMD_MEMORY_ACCESS_CONTROL,\r
+                                       paratable, 1);\r
+                       g_ul_lcd_x_length = ILI93XX_LCD_HEIGHT;\r
+                       g_ul_lcd_y_length = ILI93XX_LCD_WIDTH;\r
+               } else {\r
+                       uint8_t paratable[1];\r
+                       paratable[0] = ILI9341_CMD_MEMORY_ACCESS_CONTROL_BGR |\r
+                                       ILI9341_CMD_MEMORY_ACCESS_CONTROL_MX;\r
+                       ili93xx_write_register(\r
+                                       ILI9341_CMD_MEMORY_ACCESS_CONTROL,\r
+                                       paratable, 1);\r
+                       g_ul_lcd_x_length = ILI93XX_LCD_WIDTH;\r
+                       g_ul_lcd_y_length = ILI93XX_LCD_HEIGHT;\r
+               }\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Draw a pixel on LCD.\r
+ *\r
+ * \param ul_x X coordinate of pixel.\r
+ * \param ul_y Y coordinate of pixel.\r
+ *\r
+ * \return 0 if succeeds, otherwise fails.\r
+ */\r
+uint32_t ili93xx_draw_pixel(uint32_t ul_x, uint32_t ul_y)\r
+{\r
+       if ((ul_x >= g_ul_lcd_x_length) || (ul_y >= g_ul_lcd_y_length)) {\r
+               return 1;\r
+       }\r
+\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               /** Set cursor */\r
+               ili93xx_set_cursor_position(ul_x, ul_y);\r
+               /** Prepare to write in GRAM */\r
+               ili93xx_write_ram_prepare();\r
+               ili93xx_write_ram(*g_ul_pixel_cache);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               ili93xx_set_window(ul_x, ul_y, 0, 0);\r
+               /** Prepare to write in GRAM */\r
+               ili93xx_write_ram_prepare();\r
+               ili93xx_write_ram(*g_ul_pixel_cache);\r
+       }\r
+\r
+       return 0;\r
+}\r
+\r
+/**\r
+ * \brief Get a pixel from LCD.\r
+ *\r
+ * \param ul_x X coordinate of pixel.\r
+ * \param ul_y Y coordinate of pixel.\r
+ *\r
+ * \return the pixel color.\r
+ */\r
+ili93xx_color_t ili93xx_get_pixel(uint32_t ul_x, uint32_t ul_y)\r
+{\r
+       Assert(ul_x <= g_ul_lcd_x_length);\r
+       Assert(ul_y <= g_ul_lcd_y_length);\r
+\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               /** Set cursor */\r
+               ili93xx_set_cursor_position(ul_x, ul_y);\r
+               /** Prepare to write in GRAM */\r
+               ili93xx_read_ram_prepare();\r
+               return ili93xx_read_ram();\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               ili93xx_set_window(ul_x, ul_y, 0, 0);\r
+               /** Prepare to write in GRAM */\r
+               ili93xx_read_ram_prepare();\r
+               return ili93xx_read_ram();\r
+       }\r
+\r
+       return 0;\r
+}\r
+\r
+/**\r
+ * \brief Draw a line on LCD, which is not horizontal or vertical.\r
+ *\r
+ * \param ul_x1 X coordinate of line start.\r
+ * \param ul_y1 Y coordinate of line start.\r
+ * \param ul_x2 X coordinate of line end.\r
+ * \param ul_y2 Y coordinate of line endl.\r
+ */\r
+static void ili93xx_draw_line_bresenham(uint32_t ul_x1, uint32_t ul_y1,\r
+               uint32_t ul_x2, uint32_t ul_y2)\r
+{\r
+       int dx, dy;\r
+       int i;\r
+       int xinc, yinc, cumul;\r
+       int x, y;\r
+\r
+       x = ul_x1;\r
+       y = ul_y1;\r
+       dx = ul_x2 - ul_x1;\r
+       dy = ul_y2 - ul_y1;\r
+       xinc = (dx > 0) ? 1 : -1;\r
+       yinc = (dy > 0) ? 1 : -1;\r
+       dx = abs(ul_x2 - ul_x1);\r
+       dy = abs(ul_y2 - ul_y1);\r
+\r
+       ili93xx_draw_pixel(x, y);\r
+\r
+       if (dx > dy) {\r
+               cumul = dx >> 1;\r
+\r
+               for (i = 1; i <= dx; i++) {\r
+                       x += xinc;\r
+                       cumul += dy;\r
+\r
+                       if (cumul >= dx) {\r
+                               cumul -= dx;\r
+                               y += yinc;\r
+                       }\r
+\r
+                       ili93xx_draw_pixel(x, y);\r
+               }\r
+       } else {\r
+               cumul = dy >> 1;\r
+\r
+               for (i = 1; i <= dy; i++) {\r
+                       y += yinc;\r
+                       cumul += dx;\r
+\r
+                       if (cumul >= dy) {\r
+                               cumul -= dy;\r
+                               x += xinc;\r
+                       }\r
+\r
+                       ili93xx_draw_pixel(x, y);\r
+               }\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Draw a line on LCD.\r
+ *\r
+ * \param ul_x1 X coordinate of line start.\r
+ * \param ul_y1 Y coordinate of line start.\r
+ * \param ul_x2 X coordinate of line end.\r
+ * \param ul_y2 Y coordinate of line end.\r
+ */\r
+void ili93xx_draw_line(uint32_t ul_x1, uint32_t ul_y1,\r
+               uint32_t ul_x2, uint32_t ul_y2)\r
+{\r
+       if ((ul_y1 == ul_y2) || (ul_x1 == ul_x2)) {\r
+               ili93xx_draw_filled_rectangle(ul_x1, ul_y1, ul_x2, ul_y2);\r
+       } else {\r
+               ili93xx_draw_line_bresenham(ul_x1, ul_y1, ul_x2, ul_y2);\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Draw a rectangle on LCD.\r
+ *\r
+ * \param ul_x1 X coordinate of upper-left corner on LCD.\r
+ * \param ul_y1 Y coordinate of upper-left corner on LCD.\r
+ * \param ul_x2 X coordinate of lower-right corner on LCD.\r
+ * \param ul_y2 Y coordinate of lower-right corner on LCD.\r
+ */\r
+void ili93xx_draw_rectangle(uint32_t ul_x1, uint32_t ul_y1,\r
+               uint32_t ul_x2, uint32_t ul_y2)\r
+{\r
+       ili93xx_check_box_coordinates(&ul_x1, &ul_y1, &ul_x2, &ul_y2);\r
+\r
+       ili93xx_draw_filled_rectangle(ul_x1, ul_y1, ul_x2, ul_y1);\r
+       ili93xx_draw_filled_rectangle(ul_x1, ul_y2, ul_x2, ul_y2);\r
+\r
+       ili93xx_draw_filled_rectangle(ul_x1, ul_y1, ul_x1, ul_y2);\r
+       ili93xx_draw_filled_rectangle(ul_x2, ul_y1, ul_x2, ul_y2);\r
+}\r
+\r
+/**\r
+ * \brief Draw a filled rectangle on LCD.\r
+ *\r
+ * \param ul_x1 X coordinate of upper-left corner on LCD.\r
+ * \param ul_y1 Y coordinate of upper-left corner on LCD.\r
+ * \param ul_x2 X coordinate of lower-right corner on LCD.\r
+ * \param ul_y2 Y coordinate of lower-right corner on LCD.\r
+ */\r
+void ili93xx_draw_filled_rectangle(uint32_t ul_x1, uint32_t ul_y1,\r
+               uint32_t ul_x2, uint32_t ul_y2)\r
+{\r
+       uint32_t size, blocks;\r
+\r
+       /** Swap coordinates if necessary */\r
+       ili93xx_check_box_coordinates(&ul_x1, &ul_y1, &ul_x2, &ul_y2);\r
+\r
+       /** Determine the refresh window area */\r
+       ili93xx_set_window(ul_x1, ul_y1, (ul_x2 - ul_x1) + 1,\r
+                       (ul_y2 - ul_y1) + 1);\r
+\r
+       /** Set cursor */\r
+       ili93xx_set_cursor_position(ul_x1, ul_y1);\r
+\r
+       /** Prepare to write in Graphic RAM */\r
+       ili93xx_write_ram_prepare();\r
+\r
+       size = (ul_x2 - ul_x1 + 1) * (ul_y2 - ul_y1 + 1);\r
+\r
+       /** Send pixels blocks => one SPI IT / block */\r
+       blocks = size / LCD_DATA_CACHE_SIZE;\r
+       while (blocks--) {\r
+               ili93xx_write_ram_buffer(g_ul_pixel_cache,\r
+                                                               LCD_DATA_CACHE_SIZE);\r
+       }\r
+\r
+       /** Send remaining pixels */\r
+       ili93xx_write_ram_buffer(g_ul_pixel_cache,\r
+                                       size % LCD_DATA_CACHE_SIZE);\r
+\r
+       /** Reset the refresh window area */\r
+       ili93xx_set_window(0, 0, g_ul_lcd_x_length, g_ul_lcd_y_length);\r
+}\r
+\r
+/**\r
+ * \brief Draw a circle on LCD.\r
+ *\r
+ * \param ul_x X coordinate of circle center.\r
+ * \param ul_y Y coordinate of circle center.\r
+ * \param ul_r circle radius.\r
+ *\r
+ * \return 0 if succeeds, otherwise fails.\r
+ */\r
+uint32_t ili93xx_draw_circle(uint32_t ul_x, uint32_t ul_y, uint32_t ul_r)\r
+{\r
+       int32_t d;\r
+       uint32_t curX;\r
+       uint32_t curY;\r
+\r
+       if (ul_r == 0) {\r
+               return 1;\r
+       }\r
+\r
+       d = 3 - (ul_r << 1);\r
+       curX = 0;\r
+       curY = ul_r;\r
+\r
+       while (curX <= curY) {\r
+               ili93xx_draw_pixel(ul_x + curX, ul_y + curY);\r
+               ili93xx_draw_pixel(ul_x + curX, ul_y - curY);\r
+               ili93xx_draw_pixel(ul_x - curX, ul_y + curY);\r
+               ili93xx_draw_pixel(ul_x - curX, ul_y - curY);\r
+               ili93xx_draw_pixel(ul_x + curY, ul_y + curX);\r
+               ili93xx_draw_pixel(ul_x + curY, ul_y - curX);\r
+               ili93xx_draw_pixel(ul_x - curY, ul_y + curX);\r
+               ili93xx_draw_pixel(ul_x - curY, ul_y - curX);\r
+\r
+               if (d < 0) {\r
+                       d += (curX << 2) + 6;\r
+               } else {\r
+                       d += ((curX - curY) << 2) + 10;\r
+                       curY--;\r
+               }\r
+\r
+               curX++;\r
+       }\r
+\r
+       return 0;\r
+}\r
+\r
+/**\r
+ * \brief Draw a filled circle on LCD.\r
+ *\r
+ * \param ul_x X coordinate of circle center.\r
+ * \param ul_y Y coordinate of circle center.\r
+ * \param ul_r circle radius.\r
+ *\r
+ * \return 0 if succeeds, otherwise fails.\r
+ */\r
+uint32_t ili93xx_draw_filled_circle(uint32_t ul_x, uint32_t ul_y, uint32_t ul_r)\r
+{\r
+       signed int d;       /* Decision Variable */\r
+       uint32_t dwCurX;    /* Current X Value */\r
+       uint32_t dwCurY;    /* Current Y Value */\r
+       uint32_t dwXmin, dwYmin;\r
+\r
+       if (ul_r == 0) {\r
+               return 1;\r
+       }\r
+\r
+       d = 3 - (ul_r << 1);\r
+       dwCurX = 0;\r
+       dwCurY = ul_r;\r
+\r
+       while (dwCurX <= dwCurY) {\r
+               dwXmin = (dwCurX > ul_x) ? 0 : ul_x - dwCurX;\r
+               dwYmin = (dwCurY > ul_y) ? 0 : ul_y - dwCurY;\r
+               ili93xx_draw_filled_rectangle(dwXmin, dwYmin, ul_x + dwCurX,\r
+                               dwYmin);\r
+               ili93xx_draw_filled_rectangle(dwXmin, ul_y + dwCurY,\r
+                               ul_x + dwCurX, ul_y + dwCurY);\r
+               dwXmin = (dwCurY > ul_x) ? 0 : ul_x - dwCurY;\r
+               dwYmin = (dwCurX > ul_y) ? 0 : ul_y - dwCurX;\r
+               ili93xx_draw_filled_rectangle(dwXmin, dwYmin, ul_x + dwCurY,\r
+                               dwYmin);\r
+               ili93xx_draw_filled_rectangle(dwXmin, ul_y + dwCurX,\r
+                               ul_x + dwCurY, ul_y + dwCurX);\r
+\r
+               if (d < 0) {\r
+                       d += (dwCurX << 2) + 6;\r
+               } else {\r
+                       d += ((dwCurX - dwCurY) << 2) + 10;\r
+                       dwCurY--;\r
+               }\r
+\r
+               dwCurX++;\r
+       }\r
+\r
+       return 0;\r
+}\r
+\r
+/**\r
+ * \brief Draw an ASCII character on LCD.\r
+ *\r
+ * \param ul_x X coordinate of character upper-left corner.\r
+ * \param ul_y Y coordinate of character upper-left corner.\r
+ * \param uc_c character to print.\r
+ */\r
+static void ili93xx_draw_char(uint32_t ul_x, uint32_t ul_y, uint8_t uc_c)\r
+{\r
+       uint32_t row, col;\r
+       uint32_t offset, offset0, offset1;\r
+\r
+       /**\r
+        * Compute offset according of the specified ASCII character\r
+        *  Note: the first 32 characters of the ASCII table are not handled\r
+        */\r
+       offset = ((uint32_t)uc_c - 0x20) * 20;\r
+\r
+       for (col = 0; col < 10; col++) {\r
+               /** Compute the first and second byte offset of a column */\r
+               offset0 = offset + col * 2;\r
+               offset1 = offset0 + 1;\r
+\r
+               /**\r
+                * Draw pixel on screen depending on the corresponding bit value\r
+                * from the charset\r
+                */\r
+               for (row = 0; row < 8; row++) {\r
+                       if ((p_uc_charset10x14[offset0] >> (7 - row)) & 0x1) {\r
+                               ili93xx_draw_pixel(ul_x + col, ul_y + row);\r
+                       }\r
+               }\r
+\r
+               for (row = 0; row < 6; row++) {\r
+                       if ((p_uc_charset10x14[offset1] >> (7 - row)) & 0x1) {\r
+                               ili93xx_draw_pixel(ul_x + col, ul_y + row + 8);\r
+                       }\r
+               }\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Draw a string on LCD.\r
+ *\r
+ * \param ul_x X coordinate of string top-left corner.\r
+ * \param ul_y Y coordinate of string top-left corner.\r
+ * \param p_str String to display.\r
+ */\r
+void ili93xx_draw_string(uint32_t ul_x, uint32_t ul_y, const uint8_t *p_str)\r
+{\r
+       uint32_t xorg = ul_x;\r
+\r
+       while (*p_str != 0) {\r
+               /** If newline, jump to the next line (font height + 2) */\r
+               if (*p_str == '\n') {\r
+                       ul_y += gfont.height + 2;\r
+                       ul_x = xorg;\r
+               } else {\r
+                       /**\r
+                        * Draw the character and place cursor right after (font\r
+                        * width + 2)\r
+                        */\r
+                       ili93xx_draw_char(ul_x, ul_y, *p_str);\r
+                       ul_x += gfont.width + 2;\r
+               }\r
+\r
+               p_str++;\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Draw a pixmap on LCD.\r
+ *\r
+ * \param ul_x X coordinate of upper-left corner on LCD.\r
+ * \param ul_y Y coordinate of upper-left corner on LCD.\r
+ * \param ul_width width of the picture.\r
+ * \param ul_height height of the picture.\r
+ * \param p_ul_pixmap pixmap of the image.\r
+ */\r
+void ili93xx_draw_pixmap(uint32_t ul_x, uint32_t ul_y, uint32_t ul_width,\r
+               uint32_t ul_height, const ili93xx_color_t *p_ul_pixmap)\r
+{\r
+       uint32_t size;\r
+       uint32_t dwX1, dwY1, dwX2, dwY2;\r
+       dwX1 = ul_x;\r
+       dwY1 = ul_y;\r
+       dwX2 = ul_x + ul_width;\r
+       dwY2 = ul_y + ul_height;\r
+\r
+       /** Swap coordinates if necessary */\r
+       ili93xx_check_box_coordinates(&dwX1, &dwY1, &dwX2, &dwY2);\r
+\r
+       /** Determine the refresh window area */\r
+       ili93xx_set_window(dwX1, dwY1, (dwX2 - dwX1 + 1), (dwY2 - dwY1 + 1));\r
+\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               /** Set cursor */\r
+               ili93xx_set_cursor_position(dwX1, dwY1);\r
+               /** Prepare to write in GRAM */\r
+               ili93xx_write_ram_prepare();\r
+\r
+               size = (dwX2 - dwX1) * (dwY2 - dwY1);\r
+\r
+               ili93xx_write_ram_buffer(p_ul_pixmap, size);\r
+\r
+               /** Reset the refresh window area */\r
+               ili93xx_set_window(0, 0, g_ul_lcd_x_length, g_ul_lcd_y_length);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               /** Prepare to write in GRAM */\r
+               ili93xx_write_ram_prepare();\r
+\r
+               size = (dwX2 - dwX1) * (dwY2 - dwY1);\r
+\r
+               ili93xx_write_ram_buffer(p_ul_pixmap, size);\r
+\r
+               /** Reset the refresh window area */\r
+               ili93xx_set_window(0, 0, g_ul_lcd_x_length, g_ul_lcd_y_length);\r
+       }\r
+}\r
+\r
+/**\r
+ * \internal\r
+ * \brief Helper function to send the drawing limits (boundaries) to the display\r
+ *\r
+ * This function is used to send the currently set upper-left and lower-right\r
+ * drawing limits to the display, as set through the various limit functions.\r
+ *\r
+ * \param send_end_limits  True to also send the lower-right drawing limits\r
+ */\r
+static inline void ili93xx_send_draw_limits(const bool send_end_limits)\r
+{\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               /** Set Horizontal Address Start Position */\r
+               ili93xx_write_register_word(ILI9325_HORIZONTAL_ADDR_START,\r
+                               (uint16_t)limit_start_x);\r
+\r
+               if (send_end_limits) {\r
+                       /** Set Horizontal Address End Position */\r
+                       ili93xx_write_register_word(ILI9325_HORIZONTAL_ADDR_END,\r
+                                       (uint16_t)(limit_end_x));\r
+               }\r
+\r
+               /** Set Vertical Address Start Position */\r
+               ili93xx_write_register_word(ILI9325_VERTICAL_ADDR_START,\r
+                               (uint16_t)limit_start_y);\r
+               if (send_end_limits) {\r
+                       /** Set Vertical Address End Position */\r
+                       ili93xx_write_register_word(ILI9325_VERTICAL_ADDR_END,\r
+                                       (uint16_t)(limit_end_y));\r
+               }\r
+\r
+               /** GRAM Horizontal/Vertical Address Set (R20h, R21h) */\r
+               ili93xx_write_register_word(ILI9325_HORIZONTAL_GRAM_ADDR_SET,\r
+                               limit_start_x);\r
+               ili93xx_write_register_word(ILI9325_VERTICAL_GRAM_ADDR_SET,\r
+                               limit_start_y);\r
+\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               /** Set Horizontal Address Start Position */\r
+               ili93xx_write_register_word(ILI9341_CMD_COLUMN_ADDRESS_SET,\r
+                               (uint16_t)limit_start_x);\r
+\r
+               if (send_end_limits) {\r
+                       /** Set Horizontal Address End Position */\r
+                       ili93xx_write_register_word(\r
+                                       ILI9341_CMD_COLUMN_ADDRESS_SET,\r
+                                       (uint16_t)(limit_end_x));\r
+               }\r
+\r
+               ili93xx_write_register(0, NULL, 0);\r
+\r
+               /** Set Vertical Address Start Position */\r
+               ili93xx_write_register_word(ILI9341_CMD_PAGE_ADDRESS_SET,\r
+                               (uint16_t)limit_start_y);\r
+               if (send_end_limits) {\r
+                       /** Set Vertical Address End Position */\r
+                       ili93xx_write_register_word(\r
+                                       ILI9341_CMD_PAGE_ADDRESS_SET,\r
+                                       (uint16_t)(limit_end_y));\r
+               }\r
+\r
+               ili93xx_write_register(0, NULL, 0);\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Set the display top left drawing limit\r
+ *\r
+ * Use this function to set the top left limit of the drawing limit box.\r
+ *\r
+ * \param x The x coordinate of the top left corner\r
+ * \param y The y coordinate of the top left corner\r
+ */\r
+void ili93xx_set_top_left_limit(ili93xx_coord_t x, ili93xx_coord_t y)\r
+{\r
+       limit_start_x = x;\r
+       limit_start_y = y;\r
+\r
+       ili93xx_send_draw_limits(false);\r
+}\r
+\r
+/**\r
+ * \brief Set the display bottom right drawing limit\r
+ *\r
+ * Use this function to set the bottom right corner of the drawing limit box.\r
+ *\r
+ * \param x The x coordinate of the bottom right corner\r
+ * \param y The y coordinate of the bottom right corner\r
+ */\r
+void ili93xx_set_bottom_right_limit(ili93xx_coord_t x, ili93xx_coord_t y)\r
+{\r
+       limit_end_x = x;\r
+       limit_end_y = y;\r
+\r
+       ili93xx_send_draw_limits(true);\r
+}\r
+\r
+/**\r
+ * \brief Set the full display drawing limits\r
+ *\r
+ * Use this function to set the full drawing limit box.\r
+ *\r
+ * \param start_x The x coordinate of the top left corner\r
+ * \param start_y The y coordinate of the top left corner\r
+ * \param end_x The x coordinate of the bottom right corner\r
+ * \param end_y The y coordinate of the bottom right corner\r
+ */\r
+void ili93xx_set_limits(ili93xx_coord_t start_x, ili93xx_coord_t start_y,\r
+               ili93xx_coord_t end_x, ili93xx_coord_t end_y)\r
+{\r
+       limit_start_x = start_x;\r
+       limit_start_y = start_y;\r
+       limit_end_x = end_x;\r
+       limit_end_y = end_y;\r
+\r
+       ili93xx_send_draw_limits(true);\r
+}\r
+\r
+/**\r
+ * \brief Read a single color from the graphical memory\r
+ *\r
+ * Use this function to read a color from the graphical memory of the\r
+ * controller.\r
+ *\r
+ * \retval ili93xx_color_t The read color pixel\r
+ */\r
+ili93xx_color_t ili93xx_read_gram(void)\r
+{\r
+       uint8_t value[3];\r
+       ili93xx_color_t color;\r
+\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               LCD_IR(0);\r
+               /** Write Data to GRAM (R22h) */\r
+               LCD_IR(ILI9325_GRAM_DATA_REG);\r
+               /** two dummy read */\r
+               value[0] = LCD_RD();\r
+               value[1] = LCD_RD();\r
+               /** data upper byte */\r
+               value[0] = LCD_RD();\r
+               /** data lower byte */\r
+               value[1] = LCD_RD();\r
+\r
+               /** Convert RGB565 to RGB888 */\r
+               /** For BGR format */\r
+               color = ((value[0] & 0xF8)) |\r
+                               ((value[0] & 0x07) << 13) | ((value[1] & 0xE0) << 5) |\r
+                               ((value[1] & 0x1F) << 19);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               LCD_IR(0);\r
+               /** Write Data to GRAM (R2Eh) */\r
+               LCD_IR(ILI9341_CMD_MEMORY_READ);\r
+               /** dummy read */\r
+               value[0] = LCD_RD();\r
+               /** the highest byte - R byte*/\r
+               value[0] = LCD_RD();\r
+               /** the middle byte - G byte*/\r
+               value[1] = LCD_RD();\r
+               /** the lowest byte - B byte*/\r
+               value[2] = LCD_RD();\r
+               /** combine R, G, B byte to a color value */\r
+               color = (value[0] << 16) | (value[1] << 8) | value[2];\r
+       }\r
+       return color;\r
+}\r
+\r
+/**\r
+ * \brief Write the graphical memory with a single color pixel\r
+ *\r
+ * Use this function to write a single color pixel to the controller memory.\r
+ *\r
+ * \param color The color pixel to write to the screen\r
+ */\r
+void ili93xx_write_gram(ili93xx_color_t color)\r
+{\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               LCD_IR(0);\r
+               /** Write Data to GRAM (R22h) */\r
+               LCD_IR(ILI9325_GRAM_DATA_REG);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               /** memory write command (R2Ch)*/\r
+               LCD_IR(ILI9341_CMD_MEMORY_WRITE);\r
+               LCD_IR(0);\r
+               LCD_IR(ILI9341_CMD_WRITE_MEMORY_CONTINUE);\r
+       }\r
+       LCD_WD((color >> 16) & 0xFF);\r
+       LCD_WD((color >> 8) & 0xFF);\r
+       LCD_WD(color & 0xFF);\r
+}\r
+\r
+/**\r
+ * \brief Copy pixels from SRAM to the screen\r
+ *\r
+ * Used to copy a large quantitative of data to the screen in one go.\r
+ *\r
+ * \param pixels Pointer to the pixel data\r
+ * \param count Number of pixels to copy to the screen\r
+ */\r
+void ili93xx_copy_pixels_to_screen(const ili93xx_color_t *pixels,\r
+               uint32_t count)\r
+{\r
+       /** Sanity check to make sure that the pixel count is not zero */\r
+       Assert(count > 0);\r
+\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               LCD_IR(0);\r
+               LCD_IR(ILI9325_GRAM_DATA_REG);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               LCD_IR(ILI9341_CMD_MEMORY_WRITE);\r
+               LCD_IR(0);\r
+               LCD_IR(ILI9341_CMD_WRITE_MEMORY_CONTINUE);\r
+       }\r
+\r
+       while (count--) {\r
+               LCD_WD((*pixels >> 16) & 0xFF);\r
+               LCD_WD((*pixels >> 8) & 0xFF);\r
+               LCD_WD(*pixels & 0xFF);\r
+               pixels++;\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Copy pixels from SRAM to the screen\r
+ *\r
+ * Used to copy a large quantitative of data to the screen in one go.\r
+ *\r
+ * \param pixels Pointer to the pixel data\r
+ * \param count Number of pixels to copy to the screen\r
+ */\r
+void ili93xx_copy_raw_pixel_24bits_to_screen(const uint8_t *raw_pixels,\r
+               uint32_t count)\r
+{\r
+       ili93xx_color_t pixels;\r
+\r
+       /** Sanity check to make sure that the pixel count is not zero */\r
+       Assert(count > 0);\r
+\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               LCD_IR(0);\r
+               LCD_IR(ILI9325_GRAM_DATA_REG);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               LCD_IR(ILI9341_CMD_MEMORY_WRITE);\r
+               LCD_IR(0);\r
+               LCD_IR(ILI9341_CMD_WRITE_MEMORY_CONTINUE);\r
+       }\r
+       while (count--) {\r
+               pixels = (*raw_pixels)  |\r
+                               (*(raw_pixels +1)) << 8 |\r
+                               (*(raw_pixels + 2)) << 16;\r
+               LCD_WD((pixels >> 16) & 0xFF);\r
+               LCD_WD((pixels >> 8) & 0xFF);\r
+               LCD_WD(pixels & 0xFF);\r
+               raw_pixels += 3;\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Set a given number of pixels to the same color\r
+ *\r
+ * Use this function to write a certain number of pixels to the same color\r
+ * within a set limit.\r
+ *\r
+ * \param color The color to write to the display\r
+ * \param count The number of pixels to write with this color\r
+ */\r
+void ili93xx_duplicate_pixel(const ili93xx_color_t color, uint32_t count)\r
+{\r
+       /** Sanity check to make sure that the pixel count is not zero */\r
+       Assert(count > 0);\r
+\r
+       if (g_uc_device_type == DEVICE_TYPE_ILI9325) {\r
+               /** Write Data to GRAM (R22h) */\r
+               LCD_IR(0);\r
+               LCD_IR(ILI9325_GRAM_DATA_REG);\r
+       } else if (g_uc_device_type == DEVICE_TYPE_ILI9341) {\r
+               LCD_IR(ILI9341_CMD_MEMORY_WRITE);\r
+               LCD_IR(0);\r
+               LCD_IR(ILI9341_CMD_WRITE_MEMORY_CONTINUE);\r
+       }\r
+\r
+       while (count--) {\r
+               LCD_WD((color >> 16) & 0xFF);\r
+               LCD_WD((color >> 8) & 0xFF);\r
+               LCD_WD(color & 0xFF);\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Copy pixels from the screen to a pixel buffer\r
+ *\r
+ * Use this function to copy pixels from the display to an internal SRAM buffer.\r
+ *\r
+ * \param pixels Pointer to the pixel buffer to read to\r
+ * \param count Number of pixels to read\r
+ */\r
+void ili93xx_copy_pixels_from_screen(ili93xx_color_t *pixels, uint32_t count)\r
+{\r
+       /** Remove warnings */\r
+       UNUSED(pixels);\r
+       UNUSED(count);\r
+}\r
+\r
+/**\r
+ * \}\r
+ */\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili93xx.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili93xx.h
new file mode 100644 (file)
index 0000000..61ba214
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/components/display/ili93xx/ili93xx.h
@@ -0,0 +1,349 @@
+/**\r
+ * \file\r
+ *\r
+ * \brief API driver for ili93xx TFT display component.\r
+ *\r
+ * Copyright (c) 2013 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ *    Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+\r
+#ifndef ILI93XX_H_INCLUDED\r
+#define ILI93XX_H_INCLUDED\r
+\r
+/**\r
+ * \defgroup ili93xx_display_group - LCD with ili93xx component driver\r
+ *\r
+ * This is a driver for LCD with ili93xx. Now this driver supports ili9325 and\r
+ * ili9341.This component is custom LCD used for SAM4E-EK.\r
+ * The driver provides functions for initializtion and control of the LCD.\r
+ *\r
+ * See \ref sam_component_ili93xx_quickstart.\r
+ *\r
+ * \{\r
+ */\r
+\r
+#include "compiler.h"\r
+#include "board.h"\r
+#include "conf_ili93xx.h"\r
+\r
+/** @cond 0 */\r
+/**INDENT-OFF**/\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+/**INDENT-ON**/\r
+/** @endcond */\r
+\r
+/** Type define for an integer type large enough to store a pixel color. */\r
+typedef uint32_t ili93xx_color_t;\r
+\r
+/** Type define for an integer type large enough to store a pixel coordinate.\r
+ */\r
+typedef int16_t ili93xx_coord_t;\r
+\r
+/** This macro generates a 16-bit native color for the display from a\r
+ *  24-bit RGB value.\r
+ */\r
+#define ili93xx_COLOR(r, g, b) ((r << 16) | (g << 8) | b)\r
+\r
+typedef ili93xx_color_t gfx_color_t;\r
+typedef int16_t gfx_coord_t;\r
+\r
+/** ili93xx screen size */\r
+#define ILI93XX_LCD_WIDTH  240\r
+#define ILI93XX_LCD_HEIGHT 320\r
+\r
+/** ili93xx ID code */\r
+#define ILI9325_DEVICE_CODE (0x9325u)\r
+#define ILI9341_DEVICE_CODE (0x9341u)\r
+#define DEVICE_TYPE_ILI9325  1\r
+#define DEVICE_TYPE_ILI9341  2\r
+/** Define EBI access for ILI93xx 8-bit System Interface.*/\r
+#if defined(BOARD_ILI93XX_ADDR) && defined (BOARD_ILI93XX_RS)\r
+static inline void LCD_IR(uint8_t lcd_index)\r
+{\r
+       /** ILI9325 index register address */\r
+       *((volatile uint8_t *)(BOARD_ILI93XX_ADDR)) = lcd_index;\r
+}\r
+\r
+static inline void LCD_WD(uint8_t lcd_data)\r
+{\r
+       *((volatile uint8_t *)((BOARD_ILI93XX_ADDR) | (BOARD_ILI93XX_RS))) =\r
+                                                                                                                               lcd_data;\r
+}\r
+\r
+static inline uint8_t LCD_RD(void)\r
+{\r
+       return *((volatile uint8_t *)((BOARD_ILI93XX_ADDR) |(BOARD_ILI93XX_RS)));\r
+}\r
+\r
+#else\r
+       #error "Missing module configuration for ILI93xx!"\r
+#endif\r
+\r
+/** RGB 24-bits color table definition (RGB888). */\r
+#define COLOR_BLACK          (0x000000u)\r
+#define COLOR_WHITE          (0xFFFFFFu)\r
+#define COLOR_BLUE           (0x0000FFu)\r
+#define COLOR_GREEN          (0x00FF00u)\r
+#define COLOR_RED            (0xFF0000u)\r
+#define COLOR_NAVY           (0x000080u)\r
+#define COLOR_DARKBLUE       (0x00008Bu)\r
+#define COLOR_DARKGREEN      (0x006400u)\r
+#define COLOR_DARKCYAN       (0x008B8Bu)\r
+#define COLOR_CYAN           (0x00FFFFu)\r
+#define COLOR_TURQUOISE      (0x40E0D0u)\r
+#define COLOR_INDIGO         (0x4B0082u)\r
+#define COLOR_DARKRED        (0x800000u)\r
+#define COLOR_OLIVE          (0x808000u)\r
+#define COLOR_GRAY           (0x808080u)\r
+#define COLOR_SKYBLUE        (0x87CEEBu)\r
+#define COLOR_BLUEVIOLET     (0x8A2BE2u)\r
+#define COLOR_LIGHTGREEN     (0x90EE90u)\r
+#define COLOR_DARKVIOLET     (0x9400D3u)\r
+#define COLOR_YELLOWGREEN    (0x9ACD32u)\r
+#define COLOR_BROWN          (0xA52A2Au)\r
+#define COLOR_DARKGRAY       (0xA9A9A9u)\r
+#define COLOR_SIENNA         (0xA0522Du)\r
+#define COLOR_LIGHTBLUE      (0xADD8E6u)\r
+#define COLOR_GREENYELLOW    (0xADFF2Fu)\r
+#define COLOR_SILVER         (0xC0C0C0u)\r
+#define COLOR_LIGHTGREY      (0xD3D3D3u)\r
+#define COLOR_LIGHTCYAN      (0xE0FFFFu)\r
+#define COLOR_VIOLET         (0xEE82EEu)\r
+#define COLOR_AZUR           (0xF0FFFFu)\r
+#define COLOR_BEIGE          (0xF5F5DCu)\r
+#define COLOR_MAGENTA        (0xFF00FFu)\r
+#define COLOR_TOMATO         (0xFF6347u)\r
+#define COLOR_GOLD           (0xFFD700u)\r
+#define COLOR_ORANGE         (0xFFA500u)\r
+#define COLOR_SNOW           (0xFFFAFAu)\r
+#define COLOR_YELLOW         (0xFFFF00u)\r
+\r
+/**\r
+ * Input parameters when initializing ili9325 driver.\r
+ */\r
+struct ili93xx_opt_t {\r
+       /** LCD width in pixel*/\r
+       uint32_t ul_width;\r
+       /** LCD height in pixel*/\r
+       uint32_t ul_height;\r
+       /** LCD foreground color*/\r
+       uint32_t foreground_color;\r
+       /** LCD background color*/\r
+       uint32_t background_color;\r
+};\r
+\r
+/**\r
+ * Font structure\r
+ */\r
+struct ili93xx_font {\r
+       /** Font width in pixels. */\r
+       uint8_t width;\r
+       /** Font height in pixels. */\r
+       uint8_t height;\r
+};\r
+\r
+/**\r
+ * Display direction option\r
+ */\r
+enum ili93xx_display_direction {\r
+       LANDSCAPE  = 0,\r
+       PORTRAIT   = 1\r
+};\r
+\r
+/**\r
+ * Shift direction option\r
+ */\r
+enum ili93xx_shift_direction {\r
+       H_INCREASE  = 0,\r
+       H_DECREASE  = 1\r
+};\r
+\r
+/**\r
+ * Scan direction option\r
+ */\r
+enum ili93xx_scan_direction {\r
+       V_INCREASE  = 0,\r
+       V_DEREASE   = 1\r
+};\r
+\r
+uint32_t ili93xx_init(struct ili93xx_opt_t *p_opt);\r
+void ili93xx_display_on(void);\r
+void ili93xx_display_off(void);\r
+void ili93xx_set_foreground_color(ili93xx_color_t ul_color);\r
+void ili93xx_fill(ili93xx_color_t ul_color);\r
+void ili93xx_set_window(uint32_t ul_x, uint32_t ul_y,\r
+               uint32_t ul_width, uint32_t ul_height);\r
+void ili93xx_set_cursor_position(uint16_t us_x, uint16_t us_y);\r
+void ili93xx_scroll(int32_t ul_lines);\r
+void ili93xx_enable_scroll(void);\r
+void ili93xx_disable_scroll(void);\r
+void ili93xx_set_display_direction(enum ili93xx_display_direction e_dd,\r
+               enum ili93xx_shift_direction e_shd,\r
+               enum ili93xx_scan_direction e_scd);\r
+uint32_t ili93xx_draw_pixel(uint32_t ul_x, uint32_t ul_y);\r
+ili93xx_color_t ili93xx_get_pixel(uint32_t ul_x, uint32_t ul_y);\r
+void ili93xx_draw_line(uint32_t ul_x1, uint32_t ul_y1,\r
+               uint32_t ul_x2, uint32_t ul_y2);\r
+void ili93xx_draw_rectangle(uint32_t ul_x1, uint32_t ul_y1,\r
+               uint32_t ul_x2, uint32_t ul_y2);\r
+void ili93xx_draw_filled_rectangle(uint32_t ul_x1, uint32_t ul_y1,\r
+               uint32_t ul_x2, uint32_t ul_y2);\r
+uint32_t ili93xx_draw_circle(uint32_t ul_x, uint32_t ul_y, uint32_t ul_r);\r
+uint32_t ili93xx_draw_filled_circle(uint32_t ul_x, uint32_t ul_y,\r
+               uint32_t ul_r);\r
+void ili93xx_draw_string(uint32_t ul_x, uint32_t ul_y, const uint8_t *p_str);\r
+void ili93xx_draw_pixmap(uint32_t ul_x, uint32_t ul_y, uint32_t ul_width,\r
+               uint32_t ul_height, const ili93xx_color_t *p_ul_pixmap);\r
+void ili93xx_set_top_left_limit(ili93xx_coord_t x, ili93xx_coord_t y);\r
+void ili93xx_set_bottom_right_limit(ili93xx_coord_t x, ili93xx_coord_t y);\r
+void ili93xx_set_limits(ili93xx_coord_t start_x, ili93xx_coord_t start_y,\r
+               ili93xx_coord_t end_x, ili93xx_coord_t end_y);\r
+ili93xx_color_t ili93xx_read_gram(void);\r
+void ili93xx_write_gram(ili93xx_color_t color);\r
+void ili93xx_copy_pixels_to_screen(const ili93xx_color_t *pixels,\r
+               uint32_t count);\r
+void ili93xx_copy_raw_pixel_24bits_to_screen(const uint8_t *raw_pixels,\r
+               uint32_t count);\r
+void ili93xx_duplicate_pixel(const ili93xx_color_t color, uint32_t count);\r
+void ili93xx_copy_pixels_from_screen(ili93xx_color_t *pixels, uint32_t count);\r
+uint8_t ili93xx_device_type(void);\r
+void ili93xx_vscroll_area_define(uint16_t us_tfa, uint16_t us_vsa,\r
+               uint16_t us_bfa);\r
+uint8_t ili93xx_device_type_identify(void);\r
+\r
+/** @cond 0 */\r
+/**INDENT-OFF**/\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+/**INDENT-ON**/\r
+/** @endcond */\r
+\r
+/**\r
+ * \}\r
+ */\r
+\r
+/**\r
+ * \page sam_component_ili93xx_quickstart Quick Start Guide for the ILI93XX\r
+ * LCD Glass component.\r
+ *\r
+ * This is the quick start guide for the \ref ili93xx_display_group, with\r
+ * step-by-step instructions on how to configure and use the driver for\r
+ * a specific use case.The code examples can be copied into e.g the main\r
+ * application loop or any other function that will need to control the\r
+ * ili93xx LCD Glass component module. Now ili9325 and ili9341 are supported.\r
+ *\r
+ * \section ili93xx_qs_use_cases Use cases\r
+ * - \ref ili93xx_basic\r
+ *\r
+ * \section ili93xx_basic ili93xx LCD Glass basic usage\r
+ *\r
+ * This use case will demonstrate how to initialize the ili93xx LCD Glass\r
+ * module.\r
+ *\r
+ *\r
+ * \section ili93xx_basic_setup Setup steps\r
+ *\r
+ * \subsection ili93xx_basic_prereq Prerequisites\r
+ *\r
+ * This module requires the following driver\r
+ * - \ref smc_group\r
+ *\r
+ * \subsection ili93xx_basic_setup_code\r
+ *\r
+ * Add this to the main loop or a setup function:\r
+ * \code\r
+ * struct ili93xx_opt_t g_ili93xx_display_opt;\r
+ * g_ili93xx_display_opt.ul_width = ILI93XX_LCD_WIDTH;\r
+ * g_ili93xx_display_opt.ul_height = ILI93XX_LCD_HEIGHT;\r
+ * g_ili93xx_display_opt.foreground_color = COLOR_BLACK;\r
+ * g_ili93xx_display_opt.background_color = COLOR_WHITE;\r
+ * ili93xx_init(&g_ili93xx_display_opt);\r
+ * \endcode\r
+ *\r
+ * \subsection ili93xx_basic_setup_workflow\r
+ * -\ref ili93xx_basic_setup_code\r
+ *\r
+ * \section ili93xx_basic_usage Usage steps\r
+ *\r
+ * \subsection ili93xx_basic_usage_code\r
+ *\r
+ * -# Set display on\r
+ * \code\r
+ * ili93xx_display_on();\r
+ * \endcode\r
+ *\r
+ * -# Turn display off\r
+ * \code\r
+ * ili93xx_display_off();\r
+ * \endcode\r
+ *\r
+ * -# Draw a pixel\r
+ * \code\r
+ * ili93xx_set_foreground_color(COLOR_RED);\r
+ * ili93xx_draw_pixel(60, 60);\r
+ * \endcode\r
+ *\r
+ * -# Draw a line and circle\r
+ * \code\r
+ * ili93xx_set_foreground_color(COLOR_BLUE);\r
+ * ili93xx_draw_circle(180, 160, 40);\r
+ * ili93xx_set_foreground_color(COLOR_VIOLET);\r
+ * ili93xx_draw_line(0, 0, 240, 320);\r
+ * \endcode\r
+ *\r
+ * -# Draw a string of text\r
+ * \code\r
+ * ili93xx_set_foreground_color(COLOR_BLACK);\r
+ * ili93xx_draw_string(10, 20, (uint8_t *)"ili93xx_lcd example");\r
+ * \endcode\r
+ *\r
+ * -# Fill a rectangle with one certain color\r
+ * \code\r
+ * ili93xx_set_foreground_color(COLOR_BLUE);\r
+ * ili93xx_draw_filled_rectangle(0, 0, ILI93XX_LCD_WIDTH, ILI93XX_LCD_HEIGHT);\r
+ * \endcode\r
+ *\r
+ * -# Get device type\r
+ * \code\r
+ * ili93xx_device_type();\r
+ * \endcode\r
+ */\r
+\r
+#endif /* ILI93XX_H_INCLUDED */\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/drivers/ebi/smc/smc.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/drivers/ebi/smc/smc.c
new file mode 100644 (file)
index 0000000..4e18e6f
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/drivers/ebi/smc/smc.c
@@ -0,0 +1,429 @@
+/**\r
+ * \file\r
+ *\r
+ * \brief Static Memory Controller (SMC) driver for SAM.\r
+ *\r
+ * Copyright (c) 2011-2013 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ *    Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+\r
+#include "smc.h"\r
+#include "board.h"\r
+\r
+/// @cond 0\r
+/**INDENT-OFF**/\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+/**INDENT-ON**/\r
+/// @endcond\r
+\r
+/**\r
+ * \defgroup sam_drivers_smc_group Static Memory Controller (SMC)\r
+ *\r
+ * Driver for the Static Memory Controller. It provides functions for configuring\r
+ * and using the on-chip SMC.\r
+ *\r
+ * @{\r
+ */\r
+\r
+#if ((SAM3S) || (SAM3U) || (SAM3XA) || (SAM4S) || (SAM4E))\r
+#define SMC_WPKEY_VALUE (0x534D43)\r
+/**\r
+ * \brief Configure the SMC Setup timing for the specified Chip Select.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param ul_cs Chip Select number to be set.\r
+ * \param ul_setup_timing Setup timing for NWE, NCS, NRD.\r
+ */\r
+void smc_set_setup_timing(Smc *p_smc, uint32_t ul_cs,\r
+               uint32_t ul_setup_timing)\r
+{\r
+       p_smc->SMC_CS_NUMBER[ul_cs].SMC_SETUP = ul_setup_timing;\r
+}\r
+\r
+/**\r
+ * \brief Configure the SMC pulse timing for the specified Chip Select.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param ul_cs Chip Select number to be set.\r
+ * \param ul_pulse_timing Pulse timing for NWE,NCS,NRD.\r
+ */\r
+void smc_set_pulse_timing(Smc *p_smc, uint32_t ul_cs,\r
+               uint32_t ul_pulse_timing)\r
+{\r
+       p_smc->SMC_CS_NUMBER[ul_cs].SMC_PULSE = ul_pulse_timing;\r
+}\r
+\r
+/**\r
+ * \brief Configure the SMC cycle timing for the specified Chip Select.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param ul_cs Chip Select number to be set.\r
+ * \param ul_cycle_timing Cycle timing for NWE and NRD.\r
+ */\r
+void smc_set_cycle_timing(Smc *p_smc, uint32_t ul_cs,\r
+               uint32_t ul_cycle_timing)\r
+{\r
+       p_smc->SMC_CS_NUMBER[ul_cs].SMC_CYCLE = ul_cycle_timing;\r
+}\r
+\r
+/**\r
+ * \brief Configure the SMC mode for the specified Chip Select.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param ul_cs Chip select number to be set.\r
+ * \param ul_mode SMC mode.\r
+ */\r
+void smc_set_mode(Smc *p_smc, uint32_t ul_cs, uint32_t ul_mode)\r
+{\r
+       p_smc->SMC_CS_NUMBER[ul_cs].SMC_MODE = ul_mode;\r
+}\r
+\r
+/**\r
+ * \brief Get the SMC mode of the specified Chip Select.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param ul_cs Chip select number to be set.\r
+ *\r
+ * \return SMC mode.\r
+ */\r
+uint32_t smc_get_mode(Smc *p_smc, uint32_t ul_cs)\r
+{\r
+       return p_smc->SMC_CS_NUMBER[ul_cs].SMC_MODE;\r
+}\r
+\r
+/**\r
+ * \brief Set write protection of SMC registers.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param ul_enable 1 to enable, 0 to disable.\r
+ */\r
+void smc_enable_writeprotect(Smc *p_smc, uint32_t ul_enable)\r
+{\r
+#if (SAM3S || SAM4S || SAM4E)\r
+       if (ul_enable)\r
+               p_smc->SMC_WPMR =\r
+                               SMC_WPMR_WPKEY(SMC_WPKEY_VALUE) | SMC_WPMR_WPEN;\r
+       else\r
+               p_smc->SMC_WPMR = SMC_WPMR_WPKEY(SMC_WPKEY_VALUE);\r
+#else\r
+       if (ul_enable)\r
+               p_smc->SMC_WPCR =\r
+                               SMC_WPCR_WP_KEY(SMC_WPKEY_VALUE) |\r
+                               SMC_WPCR_WP_EN;\r
+       else\r
+               p_smc->SMC_WPCR = SMC_WPCR_WP_KEY(SMC_WPKEY_VALUE);\r
+#endif\r
+}\r
+\r
+/**\r
+ * \brief Get the status of SMC write protection register.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ *\r
+ * \return Write protect status.\r
+ */\r
+uint32_t smc_get_writeprotect_status(Smc *p_smc)\r
+{\r
+       return p_smc->SMC_WPSR;\r
+}\r
+#endif /* ((SAM3S) || (SAM3U) || (SAM3XA)) */\r
+\r
+#if ((SAM3U) || (SAM3XA))\r
+/**\r
+ * \brief Configure the SMC nand timing for the specified Chip Select.\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param ul_cs Chip Select number to be set.\r
+ * \param ul_nand_timing nand timing for related signal.\r
+ */\r
+void smc_set_nand_timing(Smc *p_smc, uint32_t ul_cs,\r
+               uint32_t ul_nand_timing)\r
+{\r
+       p_smc->SMC_CS_NUMBER[ul_cs].SMC_TIMINGS= ul_nand_timing;\r
+}\r
+\r
+/**\r
+ * \brief Initialize NFC configuration.\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param ul_config SMC NFC Configuration.\r
+ */\r
+void smc_nfc_init(Smc *p_smc, uint32_t ul_config)\r
+{\r
+       p_smc->SMC_CFG = ul_config;\r
+}\r
+\r
+/**\r
+ * \brief Set NFC page size.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param ul_page_size Use pattern defined in the device header file.\r
+ */\r
+void smc_nfc_set_page_size(Smc *p_smc, uint32_t ul_page_size)\r
+{\r
+       p_smc->SMC_CFG &= (~SMC_CFG_PAGESIZE_Msk);\r
+       p_smc->SMC_CFG |= ul_page_size;\r
+}\r
+\r
+/**\r
+ * \brief Enable NFC controller to read both main and spare area in read mode.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ */\r
+void smc_nfc_enable_spare_read(Smc *p_smc)\r
+{\r
+       p_smc->SMC_CFG |= SMC_CFG_RSPARE;\r
+}\r
+\r
+/**\r
+ * \brief Prevent NFC controller from reading the spare area in read mode.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ */\r
+void smc_nfc_disable_spare_read(Smc *p_smc)\r
+{\r
+       p_smc->SMC_CFG &= (~SMC_CFG_RSPARE);\r
+}\r
+\r
+/**\r
+ * \brief Enable NFC controller to write both main and spare area in write mode.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ */\r
+void smc_nfc_enable_spare_write(Smc *p_smc)\r
+{\r
+       p_smc->SMC_CFG |= SMC_CFG_WSPARE;\r
+}\r
+\r
+/**\r
+ * \brief Prevent NFC controller from writing the spare area in read mode.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ */\r
+void smc_nfc_disable_spare_write(Smc *p_smc)\r
+{\r
+       p_smc->SMC_CFG &= (~SMC_CFG_WSPARE);\r
+}\r
+\r
+/**\r
+ * \brief Enable NFC controller.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ */\r
+void smc_nfc_enable(Smc *p_smc)\r
+{\r
+       p_smc->SMC_CTRL = SMC_CTRL_NFCEN;\r
+}\r
+\r
+/**\r
+ * \brief Disable NFC controller.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ */\r
+void smc_nfc_disable(Smc *p_smc)\r
+{\r
+       p_smc->SMC_CTRL = SMC_CTRL_NFCDIS;\r
+}\r
+\r
+/**\r
+ * \brief Get the NFC Status.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ *\r
+ * \return Returns the current status register of SMC NFC Status Register.\r
+ * This resets the internal value of the status register, so further\r
+ * read may yield different values.\r
+ */\r
+uint32_t smc_nfc_get_status(Smc *p_smc)\r
+{\r
+       return p_smc->SMC_SR;\r
+}\r
+\r
+/**\r
+ * \brief Enable SMC interrupts.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param ul_sources Interrupt source bitmap.\r
+ */\r
+void smc_nfc_enable_interrupt(Smc *p_smc, uint32_t ul_sources)\r
+{\r
+       p_smc->SMC_IER = ul_sources;\r
+}\r
+\r
+/**\r
+ * \brief Disable SMC interrupts.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param ul_sources Interrupt source bitmap.\r
+ */\r
+void smc_nfc_disable_interrupt(Smc *p_smc, uint32_t ul_sources)\r
+{\r
+       p_smc->SMC_IDR = ul_sources;\r
+}\r
+\r
+/**\r
+ * \brief Get the interrupt mask.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ *\r
+ * \return Interrupt mask bitmap.\r
+ */\r
+uint32_t smc_nfc_get_interrupt_mask(Smc *p_smc)\r
+{\r
+       return p_smc->SMC_IMR;\r
+}\r
+\r
+/**\r
+ * \brief Set flash cycle 0 address.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param uc_address0 Address cycle 0 in 5 address cycles.\r
+ */\r
+void smc_nfc_set_address0(Smc *p_smc, uint8_t uc_address0)\r
+{\r
+       p_smc->SMC_ADDR = uc_address0;\r
+}\r
+\r
+/**\r
+ * \brief Set NFC sram bank.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param ul_bank NFC sram bank.\r
+ */\r
+void smc_nfc_set_bank(Smc *p_smc, uint32_t ul_bank)\r
+{\r
+       p_smc->SMC_BANK = SMC_BANK_BANK(ul_bank);\r
+}\r
+\r
+/**\r
+ * \brief Use the HOST nandflash controller to send a command.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param ul_cmd Command to send.\r
+ * \param ul_address_cycle Address cycle when command access is decoded.\r
+ * \param ul_cycle0 Address at first cycle.\r
+ */\r
+void smc_nfc_send_command(Smc *p_smc, uint32_t ul_cmd,\r
+               uint32_t ul_address_cycle, uint32_t ul_cycle0)\r
+{\r
+       volatile uint32_t *p_command_address;\r
+\r
+       /* Wait until host controller is not busy. */\r
+       while (((*((volatile uint32_t *)(BOARD_NF_DATA_ADDR + NFCADDR_CMD_NFCCMD)))\r
+                       & NFC_BUSY_FLAG) == NFC_BUSY_FLAG) {\r
+       }\r
+       /* Send the command plus the ADDR_CYCLE. */\r
+       p_command_address = (volatile uint32_t *)(ul_cmd + BOARD_NF_DATA_ADDR);\r
+       p_smc->SMC_ADDR = ul_cycle0;\r
+       *p_command_address = ul_address_cycle;\r
+       while (!((p_smc->SMC_SR & SMC_SR_CMDDONE) == SMC_SR_CMDDONE)) {\r
+       }\r
+}\r
+\r
+/**\r
+ * \brief Initialize ECC mode.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param ul_type Type of correction, use pattern defined in the device header file.\r
+ * \param ul_pagesize Page size of NAND Flash device, use pattern defined in\r
+ * the device header file.\r
+ */\r
+void smc_ecc_init(Smc *p_smc, uint32_t ul_type, uint32_t ul_pagesize)\r
+{\r
+       /* Software Reset ECC. */\r
+       p_smc->SMC_ECC_CTRL = SMC_ECC_CTRL_SWRST;\r
+       p_smc->SMC_ECC_MD = ul_type | ul_pagesize;\r
+}\r
+\r
+/**\r
+ * \brief Get ECC status by giving ecc number.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param ul_parity_number ECC parity number from 0 to 15.\r
+ *\r
+ * \return ECC status by giving ECC number.\r
+ */\r
+uint32_t smc_ecc_get_status(Smc *p_smc, uint32_t ul_parity_number)\r
+{\r
+       uint32_t status;\r
+\r
+       if (ul_parity_number < 8) {\r
+               status = p_smc->SMC_ECC_SR1;\r
+       } else {\r
+               status = p_smc->SMC_ECC_SR2;\r
+               ul_parity_number -= 8;\r
+       }\r
+\r
+       return ((status >> (ul_parity_number * 4)) & ECC_STATUS_MASK);\r
+}\r
+\r
+/**\r
+ * \brief Get all ECC parity registers value.\r
+ *\r
+ * \param p_smc Pointer to an SMC instance.\r
+ * \param p_ecc Pointer to a parity buffer.\r
+ */\r
+void smc_ecc_get_value(Smc *p_smc, uint32_t *p_ecc)\r
+{\r
+       p_ecc[0] = p_smc->SMC_ECC_PR0;\r
+       p_ecc[1] = p_smc->SMC_ECC_PR1;\r
+       p_ecc[2] = p_smc->SMC_ECC_PR2;\r
+       p_ecc[3] = p_smc->SMC_ECC_PR3;\r
+       p_ecc[4] = p_smc->SMC_ECC_PR4;\r
+       p_ecc[5] = p_smc->SMC_ECC_PR5;\r
+       p_ecc[6] = p_smc->SMC_ECC_PR6;\r
+       p_ecc[7] = p_smc->SMC_ECC_PR7;\r
+       p_ecc[8] = p_smc->SMC_ECC_PR8;\r
+       p_ecc[9] = p_smc->SMC_ECC_PR9;\r
+       p_ecc[10] = p_smc->SMC_ECC_PR10;\r
+       p_ecc[11] = p_smc->SMC_ECC_PR11;\r
+       p_ecc[12] = p_smc->SMC_ECC_PR12;\r
+       p_ecc[13] = p_smc->SMC_ECC_PR13;\r
+       p_ecc[14] = p_smc->SMC_ECC_PR14;\r
+       p_ecc[15] = p_smc->SMC_ECC_PR15;\r
+}\r
+#endif /* ((SAM3U) || (SAM3XA)) */\r
+\r
+//@}\r
+\r
+/// @cond 0\r
+/**INDENT-OFF**/\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+/**INDENT-ON**/\r
+/// @endcond\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/drivers/ebi/smc/smc.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/drivers/ebi/smc/smc.h
new file mode 100644 (file)
index 0000000..5ba786b
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/ASF/sam/drivers/ebi/smc/smc.h
@@ -0,0 +1,120 @@
+/**\r
+ * \file\r
+ *\r
+ * \brief Static Memory Controller (SMC) driver for SAM.\r
+ *\r
+ * Copyright (c) 2011-2013 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ *    Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+\r
+#ifndef SMC_H_INCLUDED\r
+#define SMC_H_INCLUDED\r
+\r
+#include "compiler.h"\r
+\r
+/// @cond 0\r
+/**INDENT-OFF**/\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+/**INDENT-ON**/\r
+/// @endcond\r
+\r
+#if ((SAM3S) || (SAM3U) || (SAM3XA) || (SAM4S) || (SAM4E))\r
+void smc_set_setup_timing(Smc *p_smc, uint32_t ul_cs, uint32_t ul_setup_timing);\r
+void smc_set_pulse_timing(Smc *p_smc, uint32_t ul_cs, uint32_t ul_pulse_timing);\r
+void smc_set_cycle_timing(Smc *p_smc, uint32_t ul_cs, uint32_t ul_cycle_timing);\r
+void smc_set_mode(Smc *p_smc, uint32_t ul_cs, uint32_t ul_mode);\r
+uint32_t smc_get_mode(Smc *p_smc, uint32_t ul_cs);\r
+void smc_enable_writeprotect(Smc *p_smc, uint32_t ul_enable);\r
+uint32_t smc_get_writeprotect_status(Smc *p_smc);\r
+#endif /* ((SAM3S) || (SAM3U) || (SAM3XA)) */\r
+\r
+#if ((SAM3U) || (SAM3XA))\r
+/* NFCADDR_CMD : NFC Address Command */\r
+#define NFCADDR_CMD_CMD1      (0xFFu <<  2) /* Command Register Value for Cycle 1 */\r
+#define NFCADDR_CMD_CMD2      (0xFFu << 10) /* Command Register Value for Cycle 2 */\r
+#define NFCADDR_CMD_VCMD2     (0x1u << 18)  /* Valid Cycle 2 Command */\r
+#define NFCADDR_CMD_ACYCLE    (0x7u << 19)  /* Number of Address required for the current command */\r
+#define   NFCADDR_CMD_ACYCLE_NONE    (0x0u << 19) /* No address cycle */\r
+#define   NFCADDR_CMD_ACYCLE_ONE     (0x1u << 19) /* One address cycle */\r
+#define   NFCADDR_CMD_ACYCLE_TWO     (0x2u << 19) /* Two address cycles */\r
+#define   NFCADDR_CMD_ACYCLE_THREE   (0x3u << 19) /* Three address cycles */\r
+#define   NFCADDR_CMD_ACYCLE_FOUR    (0x4u << 19) /* Four address cycles */\r
+#define   NFCADDR_CMD_ACYCLE_FIVE    (0x5u << 19) /* Five address cycles */\r
+#define NFCADDR_CMD_CSID_Pos 22\r
+#define NFCADDR_CMD_CSID_Msk (0x7u << NFCADDR_CMD_CSID_Pos) /* Chip Select Identifier */\r
+#define NFCADDR_CMD_CSID(value) ((NFCADDR_CMD_CSID_Msk & ((value) << NFCADDR_CMD_CSID_Pos)))\r
+#define NFCADDR_CMD_NFCEN     (0x1u << 25)  /* NFC Enable */\r
+#define NFCADDR_CMD_NFC_READ     (0x0u << 26)  /* NFC Write Enable */\r
+#define NFCADDR_CMD_NFC_WIRTE    (0x1u << 26)  /* NFC Write Enable */\r
+#define NFCADDR_CMD_NFCCMD    (0x1u << 27)  /* NFC Command Enable */\r
+\r
+#define NFC_BUSY_FLAG    0x8000000\r
+#define ECC_STATUS_MASK   0x07\r
+\r
+void smc_set_nand_timing(Smc * p_smc, uint32_t ul_cs,\r
+               uint32_t ul_nand_timing);\r
+void smc_nfc_init(Smc *p_smc, uint32_t ul_config);\r
+void smc_nfc_set_page_size(Smc *p_smc, uint32_t ul_page_size);\r
+void smc_nfc_enable_spare_read(Smc *p_smc);\r
+void smc_nfc_disable_spare_read(Smc *p_smc);\r
+void smc_nfc_enable_spare_write(Smc *p_smc);\r
+void smc_nfc_disable_spare_write(Smc *p_smc);\r
+void smc_nfc_enable(Smc *p_smc);\r
+void smc_nfc_disable(Smc *p_smc);\r
+uint32_t smc_nfc_get_status(Smc * p_smc);\r
+void smc_nfc_enable_interrupt(Smc *p_smc, uint32_t ul_sources);\r
+void smc_nfc_disable_interrupt(Smc *p_smc, uint32_t ul_sources);\r
+uint32_t smc_nfc_get_interrupt_mask(Smc *p_smc);\r
+void smc_nfc_set_address0(Smc *p_smc, uint8_t uc_address0);\r
+void smc_nfc_set_bank(Smc *p_smc, uint32_t ul_bank);\r
+void smc_nfc_send_command(Smc *p_smc, uint32_t ul_cmd, uint32_t ul_address_cycle, uint32_t ul_cycle0);\r
+void smc_ecc_init(Smc *p_smc, uint32_t ul_type, uint32_t ul_pagesize);\r
+uint32_t smc_ecc_get_status(Smc *p_smc, uint32_t ul_parity_number);\r
+void smc_ecc_get_value(Smc *p_smc, uint32_t *p_ecc);\r
+#endif  /* ((SAM3U) || (SAM3XA)) */\r
+\r
+/// @cond 0\r
+/**INDENT-OFF**/\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+/**INDENT-ON**/\r
+/// @endcond\r
+\r
+#endif /* SMC_H_INCLUDED */\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/LCDUtils.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/LCDUtils.c
new file mode 100644 (file)
index 0000000..27abd48
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/LCDUtils.c
@@ -0,0 +1,174 @@
+/**\r
+ * gfx_draw_bmpfile() is provided by and copyright to Atmel Corporation with the\r
+ * following usage restrictions:\r
+ *\r
+ * Copyright (c) 2013 Atmel Corporation. All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ *    Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdint.h>\r
+\r
+/* Library includes. */\r
+#include <asf.h>\r
+\r
+/* Bitmap. */\r
+#include "logo_atmel.h"\r
+\r
+/* Chip select number to be set for LCD. */\r
+#define ILI93XX_LCD_CS  1\r
+\r
+/*\r
+ * Initialise the LCD and output a bitmap.\r
+ */\r
+void vInitialiseLCD( void );\r
+\r
+/*\r
+ * Output a bitmap to the LCD.\r
+ */\r
+static void gfx_draw_bmpfile( const uint8_t *bmpImage );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+COMPILER_PACK_SET( 1 )\r
+struct bmpfile_header {\r
+       /** signature, must be 4D42 hex */\r
+       uint16_t type;\r
+       /** size of BMP file in bytes (unreliable) */\r
+       uint32_t file_size;\r
+       /** reserved, must be zero */\r
+       uint16_t reserved1;\r
+       /** reserved, must be zero */\r
+       uint16_t reserved2;\r
+       /** offset to start of image data in bytes */\r
+       uint32_t offset;\r
+       /** size of BITMAPINFOHEADER structure, must be 40 */\r
+       uint32_t header_size;\r
+       /** image width in pixels */\r
+       uint32_t width;\r
+       /** image height in pixels */\r
+       uint32_t height;\r
+       /** number of planes in the image, must be 1 */\r
+       uint16_t planes;\r
+       /** number of bits per pixel (1, 4, 8, 16, 24, 32) */\r
+       uint16_t bits;\r
+       /** compression type (0=none, 1=RLE-8, 2=RLE-4) */\r
+       uint32_t compression;\r
+       /** size of image data in bytes (including padding) */\r
+       uint32_t inage_size;\r
+       /** horizontal resolution in pixels per meter */\r
+       uint32_t h_resolution;\r
+       /** vertical resolution in pixels per meter */\r
+       uint32_t v_resolution;\r
+       /** number of colors in image, or zero */\r
+       uint32_t colours;\r
+       /** number of important colors, or zero */\r
+       uint32_t important_colors;\r
+};\r
+COMPILER_PACK_RESET()\r
+\r
+void vInitialiseLCD( void )\r
+{\r
+struct ili93xx_opt_t g_ili93xx_display_opt;\r
+\r
+       /* Configure SMC interface for Lcd */\r
+       smc_set_setup_timing( SMC, ILI93XX_LCD_CS, SMC_SETUP_NWE_SETUP( 2 ) | SMC_SETUP_NCS_WR_SETUP( 2 ) | SMC_SETUP_NRD_SETUP( 2 ) | SMC_SETUP_NCS_RD_SETUP( 2 ) );\r
+       smc_set_pulse_timing( SMC, ILI93XX_LCD_CS, SMC_PULSE_NWE_PULSE( 4 )     | SMC_PULSE_NCS_WR_PULSE( 4 ) | SMC_PULSE_NRD_PULSE( 10 )| SMC_PULSE_NCS_RD_PULSE( 10 ) );\r
+       smc_set_cycle_timing( SMC, ILI93XX_LCD_CS, SMC_CYCLE_NWE_CYCLE( 10 )| SMC_CYCLE_NRD_CYCLE( 22 ) );\r
+       smc_set_mode( SMC, ILI93XX_LCD_CS, SMC_MODE_READ_MODE | SMC_MODE_WRITE_MODE );\r
+       \r
+       /* Initialise the LCD. */\r
+       g_ili93xx_display_opt.ul_width = ILI93XX_LCD_WIDTH;\r
+       g_ili93xx_display_opt.ul_height = ILI93XX_LCD_HEIGHT;\r
+       g_ili93xx_display_opt.foreground_color = COLOR_BLACK;\r
+       g_ili93xx_display_opt.background_color = COLOR_WHITE;\r
+       ili93xx_init( &g_ili93xx_display_opt );\r
+\r
+       /* Set backlight level */\r
+       aat31xx_set_backlight(AAT31XX_AVG_BACKLIGHT_LEVEL);\r
+\r
+       /* Turn on LCD */\r
+       ili93xx_display_on();\r
+       \r
+       /* Clear. */\r
+       ili93xx_set_foreground_color( COLOR_WHITE );\r
+       ili93xx_draw_filled_rectangle( 0, 0, ILI93XX_LCD_WIDTH, ILI93XX_LCD_HEIGHT );\r
+       \r
+       /* Draw logos. */\r
+       ili93xx_set_cursor_position( 0,0 );\r
+       gfx_draw_bmpfile( logo_atmel_bmp );\r
+       \r
+       /* Set foreground colour ready to write text. */\r
+       ili93xx_set_foreground_color( COLOR_BLACK );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void gfx_draw_bmpfile( const uint8_t *bmpImage )\r
+{\r
+       struct bmpfile_header *bmp_header;\r
+       uint32_t length;\r
+       uint32_t i = 0;\r
+       uint32_t offset;\r
+       uint16_t j;\r
+\r
+       bmp_header = (struct bmpfile_header*) bmpImage;\r
+       length = bmp_header->height * bmp_header->width * 3;\r
+       offset = sizeof(struct bmpfile_header);\r
+\r
+       if (ili93xx_device_type() == DEVICE_TYPE_ILI9325) {\r
+\r
+               ili93xx_set_cursor_position(0, 0);\r
+\r
+               /** Prepare to write in GRAM */\r
+               LCD_IR(0);\r
+               LCD_IR(ILI9325_GRAM_DATA_REG);\r
+               for (i = offset; i < length; i += 3) {\r
+                       /** Invert red and blue. */\r
+                       LCD_WD(bmpImage[i + 2]);\r
+                       LCD_WD(bmpImage[i + 1]);\r
+                       LCD_WD(bmpImage[i]);\r
+               }\r
+               } else if (ili93xx_device_type() == DEVICE_TYPE_ILI9341) {\r
+               ili93xx_set_window(0, 0, bmp_header->width - 15, bmp_header->height);\r
+               /** memory write command (R2Ch)*/\r
+               LCD_IR(ILI9341_CMD_MEMORY_WRITE);\r
+               LCD_IR(ILI9341_CMD_WRITE_MEMORY_CONTINUE);\r
+\r
+               /** the original image is mirrored */\r
+               for (i= bmp_header->height - 1; i * bmp_header->width * 3 > offset;\r
+               i -=1) {\r
+                       for (j = 45; j < bmp_header->width * 3; j += 3) {\r
+                               LCD_WD(bmpImage[i * bmp_header->width * 3 + j + 2]);\r
+                               LCD_WD(bmpImage[i * bmp_header->width * 3 + j + 1]);\r
+                               LCD_WD(bmpImage[i * bmp_header->width * 3 + j]);\r
+                       }\r
+               }\r
+       }\r
+}\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/asf.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/asf.h
index 03d53df4b55632c0398b4447cf0f0b380824f77d..cbb258fa468aeac77cccb7194d55ab9da19b240c 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/asf.h
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/asf.h
@@ -56,6 +56,14 @@
 #include <compiler.h>\r
 #include <status_codes.h>\r
 \r
+// From module: Display - AAT31XX Backlight Controller\r
+#include <aat31xx.h>\r
+\r
+// From module: Display - ILI93xx LCD Controller\r
+#include <ili9325_regs.h>\r
+#include <ili9341_regs.h>\r
+#include <ili93xx.h>\r
+\r
 // From module: Ethernet MAC (GMAC)\r
 #include <gmac.h>\r
 \r
@@ -87,6 +95,9 @@
 // From module: SAM4E startup code\r
 #include <exceptions.h>\r
 \r
+// From module: SMC - Static Memory Controller\r
+#include <smc.h>\r
+\r
 // From module: System Clock Control - SAM4E implementation\r
 #include <sysclk.h>\r
 \r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSConfig.h
index 8369b918b9a05df8b21b0987792bc077db1841cc..2c5311b56034776a3f5ac0ec3b5c6d37b7486492 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSConfig.h
@@ -91,7 +91,7 @@
 #define configTICK_RATE_HZ                                             ( 1000 )\r
 #define configMAX_PRIORITIES                                   ( 5 )\r
 #define configMINIMAL_STACK_SIZE                               ( ( unsigned short ) 130 )\r
-#define configTOTAL_HEAP_SIZE                                  ( ( size_t ) ( 34 * 1024 ) )\r
+#define configTOTAL_HEAP_SIZE                                  ( ( size_t ) ( 46 * 1024 ) )\r
 #define configMAX_TASK_NAME_LEN                                        ( 10 )\r
 #define configUSE_TRACE_FACILITY                               1\r
 #define configUSE_16_BIT_TICKS                                 0\r
@@ -212,6 +212,16 @@ ipconfigUSE_DNS is set to 1 but a DNS server cannot be contacted. */
 #define configNET_MASK2                255\r
 #define configNET_MASK3                0\r
 \r
+/* The address of the echo server.  Used when the demo is build to include the\r
+UDP echo tasks (when mainINCLUDE_ECHO_CLIENT_TASKS is set to 1 in \r
+FreeRTOSConfig.h.\r
+http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/Embedded_Ethernet_Examples/Common_Echo_Clients.shtml */\r
+#define configECHO_SERVER_ADDR0        192\r
+#define configECHO_SERVER_ADDR1 168\r
+#define configECHO_SERVER_ADDR2 0\r
+#define configECHO_SERVER_ADDR3 2\r
+\r
+\r
 /* The priority used by the Ethernet MAC driver interrupt. */\r
 #define configMAC_INTERRUPT_PRIORITY   ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY )\r
 \r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSIPConfig.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSIPConfig.h
index ffaf4ecf1a48f69ee22434ad1225acca087f569b..05ef011803cda59bee915876c6937c0c3d600308 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSIPConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/FreeRTOSIPConfig.h
@@ -111,7 +111,7 @@ stack will revert to using the static IP address even when ipconfigUSE_DHCP is
 set to 1 if a valid configuration cannot be obtained from a DHCP server for any\r
 reason.  The static configuration used is that passed into the stack by the\r
 FreeRTOS_IPInit() function call. */\r
-#define ipconfigUSE_DHCP       0\r
+#define ipconfigUSE_DHCP       1\r
 \r
 /* When ipconfigUSE_DHCP is set to 1, DHCP requests will be sent out at\r
 increasing time intervals until either a reply is received from a DHCP server\r
@@ -205,7 +205,7 @@ contain.  For normal Ethernet V2 frames the maximum MTU is 1500.  Setting a
 lower value can save RAM, depending on the buffer management scheme used.  If\r
 ipconfigCAN_FRAGMENT_OUTGOING_PACKETS is 1 then (ipconfigNETWORK_MTU - 28) must\r
 be divisible by 8. */\r
-#define ipconfigNETWORK_MTU 1200\r
+#define ipconfigNETWORK_MTU 1000\r
 \r
 /* Set ipconfigUSE_DNS to 1 to include a basic DNS client/resolver.  DNS is used\r
 through the FreeRTOS_gethostbyname() API function. */\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_aat31xx.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_aat31xx.h
new file mode 100644 (file)
index 0000000..0d757c5
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_aat31xx.h
@@ -0,0 +1,59 @@
+/**\r
+ * \file\r
+ *\r
+ * \brief AAT31XX configuration.\r
+ *\r
+ * Copyright (c) 2011-2012 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ *    Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+\r
+//! Configuration of the AAT31XX Backlight driver\r
+\r
+#ifndef CONF_AAT31XX_H_INCLUDED\r
+#define CONF_AAT31XX_H_INCLUDED\r
+\r
+#include "board.h"\r
+\r
+#if !defined(BOARD_AAT31XX_SET_GPIO)\r
+\r
+       #warning The AAT31XX PIN configuration does not exist in the board definition file. Using default settings.\r
+\r
+       #define BOARD_AAT31XX_SET_GPIO     PIO_PC13_IDX /* Should use the PIN index of which pin is connected with EN/SET of AAT31XX device */\r
+\r
+#endif\r
+\r
+#endif /* CONF_AAT31XX_H_INCLUDED */\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_board.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_board.h
index 4a914ee214530a141804aab903744d860afb1cb6..e616581ec592677c96cec966e92f4a4d078f5b42 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_board.h
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_board.h
@@ -49,6 +49,13 @@
 \r
 /* Enable ETH PHY: KSZ8051MNL feature */\r
 #define CONF_BOARD_KSZ8051MNL\r
+\r
+/** Configure LCD EBI pins */\r
+#define CONF_BOARD_ILI93XX\r
+\r
+/** Configure Backlight control pin */\r
+#define CONF_BOARD_AAT3155\r
+\r
 /*\r
  * LED pins are not configured for PWM function here.\r
  * Because those LED pins are enabled for PIO function by default.\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_ili93xx.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_ili93xx.h
new file mode 100644 (file)
index 0000000..53ee3cb
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/config/conf_ili93xx.h
@@ -0,0 +1,62 @@
+/**\r
+ * \file\r
+ *\r
+ * \brief ILI93XX configuration.\r
+ *\r
+ * Copyright (c) 2011-2013 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ *    Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+\r
+//! Configuration of the ILI93XX (ILI9325 or ILI9341) LCD display driver\r
+\r
+#ifndef CONF_ILI93XX_H_INCLUDED\r
+#define CONF_ILI93XX_H_INCLUDED\r
+\r
+#include "board.h"\r
+\r
+#if !defined(BOARD_ILI93XX_ADDR) || !defined(BOARD_ILI93XX_RS)\r
+\r
+       #warning The ILI93XX EBI configuration does not exist in the board definition file. Using default settings.\r
+\r
+        /** The base address, depends on which SMC chip select is used by ILI9325. */\r
+       #define BOARD_ILI93XX_ADDR     0x61000000\r
+       /** Register select (1 << 1) */\r
+       #define BOARD_ILI93XX_RS       1 << 1\r
+\r
+#endif\r
+\r
+#endif /* CONF_ILI93XX_H_INCLUDED */\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/logo_atmel.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/logo_atmel.h
new file mode 100644 (file)
index 0000000..c2ce4b9
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/logo_atmel.h
@@ -0,0 +1,15412 @@
+/**\r
+ * \file\r
+ *\r
+ * \brief Atmel logo for the FreeRTOS Web/DSP Demo.\r
+ *\r
+ * Copyright (c) 2013 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ *    Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+#ifndef __ATMEL_LOGO_H__\r
+#define __ATMEL_LOGO_H__\r
+const uint8_t logo_atmel_bmp[230454]=\r
+{\r
+0x42,0x4d,0x36,0x84,0x03,0x00,0x00,0x00,0x00,0x00,0x36,0x00,0x00,0x00,0x28,\r
+0x00,0x00,0x00,0xf0,0x00,0x00,0x00,0x40,0x01,0x00,0x00,0x01,0x00,0x18,0x00,\r
+0x00,0x00,0x00,0x00,0x00,0x84,0x03,0x00,0x13,0x0b,0x00,0x00,0x13,0x0b,0x00,\r
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
+0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,\r
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+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,\r
+0xfc,0xfe,0xfc,0xfc,0xfe,0xfc,0xfc,0xfe,0xfc\r
+};\r
+#endif /* __ATMEL_LOGO_H__ */\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main.c
index 81582ce0f87a80465e6d34d24924c1f9f280a807..66b806014b10b829a63ab13e7d8aa7f9ac896d54 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main.c
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main.c
@@ -131,6 +131,7 @@ static void prvSetupHardware( void )
        board_init();\r
        sysclk_init();\r
        pmc_enable_periph_clk( ID_GMAC );\r
+       pmc_enable_periph_clk( ID_SMC );\r
        vParTestInitialise();\r
 }\r
 /*-----------------------------------------------------------*/\r
@@ -233,14 +234,22 @@ void _exit_( int status )
        vAssertCalled( __LINE__, __FILE__ );\r
        for( ;; );\r
 }\r
+/*-----------------------------------------------------------*/\r
 \r
+/* Provided to keep the linker happy. */\r
 int _read( void )\r
 {\r
        return 0;\r
 }\r
+/*-----------------------------------------------------------*/\r
 \r
+/* Provided to keep the linker happy. */\r
 int _write( int x )\r
 {\r
        ( void ) x;\r
        return 0;\r
-}
\ No newline at end of file
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
+\r

diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main_full.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main_full.c
index 22376afca1d8e4a6bffa905aa4155d80a0ff823d..e6a5ff01b82669bc8e07f8193c28337f9b0fb490 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4E_Atmel_Studio/src/main_full.c
@@ -70,9 +70,13 @@
 \r
 /* FreeRTOS+UDP includes. */\r
 #include "FreeRTOS_UDP_IP.h"\r
+#include "FreeRTOS_Sockets.h"\r
 \r
-/* Demo application includes. */\r
+/* UDP demo includes. */\r
 #include "UDPCommandInterpreter.h"\r
+#include "TwoEchoClients.h"\r
+\r
+/* Standard demo includes. */\r
 #include "partest.h"\r
 #include "blocktim.h"\r
 #include "flash_timer.h"\r
@@ -128,9 +132,12 @@ passed into the network event hook is eNetworkUp). */
 #define mainDISCONNECTED_IP_TASK_PRIORITY      ( tskIDLE_PRIORITY )\r
 \r
 /* UDP command server task parameters. */\r
-#define mainUDP_CLI_TASK_PRIORITY                                      ( tskIDLE_PRIORITY )\r
-#define mainUDP_CLI_PORT_NUMBER                                                ( 5001UL )\r
-#define mainUDP_CLI_TASK_STACK_SIZE                                    ( configMINIMAL_STACK_SIZE * 2U )\r
+#define mainUDP_CLI_TASK_PRIORITY                      ( tskIDLE_PRIORITY )\r
+#define mainUDP_CLI_PORT_NUMBER                                ( 5001UL )\r
+#define mainUDP_CLI_TASK_STACK_SIZE                    ( configMINIMAL_STACK_SIZE * 2U )\r
+\r
+/* Set to 1 to include the UDP echo client tasks. */\r
+#define mainINCLUDE_ECHO_CLIENT_TASKS          1\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
@@ -159,6 +166,11 @@ extern void vRegisterFileSystemCLICommands( void );
  */\r
 extern void vRegisterUDPCLICommands( void );\r
 \r
+/*\r
+ * Initialise the LCD and output a bitmap.\r
+ */\r
+extern void vInitialiseLCD( void );\r
+\r
 /*-----------------------------------------------------------*/\r
 \r
 /* The default IP and MAC address used by the demo.  The address configuration\r
@@ -180,6 +192,9 @@ int main_full( void )
 {\r
 xTimerHandle xTimer = NULL;\r
 \r
+       /* Initialise the LCD and output the bitmap. */\r
+       vInitialiseLCD();\r
+\r
        /* If the file system is only going to be accessed from one task then\r
        F_FS_THREAD_AWARE can be set to 0 and the set of example files are created\r
        before the RTOS scheduler is started.  If the file system is going to be\r
@@ -319,6 +334,9 @@ unsigned long ulErrorOccurred = pdFALSE;
 void vApplicationIPNetworkEventHook( eIPCallbackEvent_t eNetworkEvent )\r
 {\r
 static long lTasksAlreadyCreated = pdFALSE;\r
+const unsigned long ulXCoord = 3, ulYCoord = 3, ulIPAddressOffset = 45;\r
+unsigned long ulIPAddress;\r
+char cIPAddress[ 20 ];\r
 \r
        /* Note:  If the application is started without the network cable plugged in\r
        then ipconfigUDP_TASK_PRIORITY should be set to 0 in FreeRTOSIPConfig.h to\r
@@ -330,14 +348,27 @@ static long lTasksAlreadyCreated = pdFALSE;
        passed into the network event hook is eNetworkUp). */\r
        if( eNetworkEvent == eNetworkUp )\r
        {\r
-               vTaskPrioritySet( NULL, mainCONNECTED_IP_TASK_PRIORITY );\r
-\r
                if( lTasksAlreadyCreated == pdFALSE )\r
                {               \r
                        /* Create the task that handles the CLI on a UDP port.  The port number\r
                        is set using the configUDP_CLI_PORT_NUMBER setting in FreeRTOSConfig.h. */\r
                        vStartUDPCommandInterpreterTask( mainUDP_CLI_TASK_STACK_SIZE, mainUDP_CLI_PORT_NUMBER, mainUDP_CLI_TASK_PRIORITY );\r
+                       \r
+                       #if( mainINCLUDE_ECHO_CLIENT_TASKS == 1 )\r
+                       {\r
+                               vStartEchoClientTasks( configMINIMAL_STACK_SIZE, tskIDLE_PRIORITY );\r
+                       }\r
+                       #endif\r
                }\r
+               \r
+               /* Obtain the IP address, convert it to a string, then display. */\r
+               FreeRTOS_GetAddressConfiguration( &ulIPAddress, NULL, NULL, NULL );\r
+               FreeRTOS_inet_ntoa( ulIPAddress, cIPAddress );\r
+               ili93xx_draw_string( ulXCoord, ulYCoord, ( uint8_t * ) "IP: " );\r
+               ili93xx_draw_string( ulXCoord + ulIPAddressOffset, ulYCoord, ( uint8_t * ) cIPAddress );\r
+               \r
+               /* Set the IP task up to the desired priority now it has connected. */\r
+               vTaskPrioritySet( NULL, mainCONNECTED_IP_TASK_PRIORITY );\r
        }\r
 \r
        if( eNetworkEvent == eNetworkDown )\r
@@ -387,25 +418,7 @@ void vApplicationPingReplyHook( ePingReplyStatus_t eStatus, uint16_t usIdentifie
 {\r
        /* This demo has nowhere to output any information so does nothing. */\r
        ( void ) usIdentifier;\r
-       \r
-       switch( eStatus )\r
-       {\r
-               case eSuccess   :\r
-                       break;\r
-\r
-               case eInvalidChecksum :\r
-                       break;\r
-\r
-               case eInvalidData :\r
-                       break;\r
-\r
-               default :\r
-                       /* It is not possible to get here as all enums have their own\r
-                       case. */\r
-                       break;\r
-       }\r
+       ( void ) eStatus;\r
 }\r
-\r
-\r
-\r
+/*-----------------------------------------------------------*/\r
 \r