Remove misleading typedef and redundant suffix from struct armv4_5_algorithm.
working_area_t *source;
uint32_t address = bank->base + offset;
struct reg_param reg_params[6];
- armv4_5_algorithm_t armv4_5_info;
+ struct armv4_5_algorithm armv4_5_info;
int retval = ERROR_OK;
if (((count%2)!=0)||((offset%2)!=0))
int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
{
target_t *target = nand->target;
- armv4_5_algorithm_t algo;
+ struct armv4_5_algorithm algo;
armv4_5_common_t *armv4_5 = target->arch_info;
struct reg_param reg_params[3];
uint32_t target_buf;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
target_t *target = bank->target;
struct reg_param reg_params[7];
- armv4_5_algorithm_t armv4_5_info;
+ struct armv4_5_algorithm armv4_5_info;
working_area_t *source;
uint32_t buffer_size = 32768;
uint32_t write_command_val, busy_pattern_val, error_pattern_val;
struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
target_t *target = bank->target;
struct reg_param reg_params[10];
- armv4_5_algorithm_t armv4_5_info;
+ struct armv4_5_algorithm armv4_5_info;
working_area_t *source;
uint32_t buffer_size = 32768;
uint32_t status;
target_t *target = info->target;
struct reg_param reg_params[3];
- armv4_5_algorithm_t armv4_5_info;
+ struct armv4_5_algorithm armv4_5_info;
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
armv4_5_info.core_state = ARMV4_5_STATE_ARM;
target_t *target = bank->target;
struct mem_param mem_params[2];
struct reg_param reg_params[5];
- armv4_5_algorithm_t armv4_5_info; /* for LPC2000 */
+ struct armv4_5_algorithm armv4_5_info; /* for LPC2000 */
armv7m_algorithm_t armv7m_info; /* for LPC1700 */
uint32_t status_code;
uint32_t iap_entry_point = 0; /* to make compiler happier */
if( warea )
{
struct reg_param reg_params[5];
- armv4_5_algorithm_t armv4_5_info;
+ struct armv4_5_algorithm armv4_5_info;
/* We can use target mode. Download the algorithm. */
retval = target_write_buffer( target,
working_area_t *source;
uint32_t address = bank->base + offset;
struct reg_param reg_params[6];
- armv4_5_algorithm_t armv4_5_info;
+ struct armv4_5_algorithm armv4_5_info;
int retval = ERROR_OK;
uint32_t str7x_flash_write_code[] = {
working_area_t *source;
uint32_t address = bank->base + offset;
struct reg_param reg_params[4];
- armv4_5_algorithm_t armv4_5_info;
+ struct armv4_5_algorithm armv4_5_info;
int retval = ERROR_OK;
uint32_t str9x_flash_write_code[] = {
}
}
- armv4_5_algorithm_t armv4_5_info;
+ struct armv4_5_algorithm armv4_5_info;
struct reg_param reg_params[1];
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* checksum)
{
working_area_t *crc_algorithm;
- armv4_5_algorithm_t armv4_5_info;
+ struct armv4_5_algorithm armv4_5_info;
struct reg_param reg_params[2];
int retval;
{
working_area_t *erase_check_algorithm;
struct reg_param reg_params[3];
- armv4_5_algorithm_t armv4_5_info;
+ struct armv4_5_algorithm armv4_5_info;
int retval;
uint32_t i;
int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info))
{
struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
- armv4_5_algorithm_t *armv4_5_algorithm_info = arch_info;
+ struct armv4_5_algorithm *armv4_5_algorithm_info = arch_info;
enum armv4_5_state core_state = armv4_5->core_state;
enum armv4_5_mode core_mode = armv4_5->core_mode;
uint32_t context[17];
return arm && arm->common_magic == ARMV4_5_COMMON_MAGIC;
}
-typedef struct armv4_5_algorithm_s
+struct armv4_5_algorithm
{
int common_magic;
enum armv4_5_mode core_mode;
enum armv4_5_state core_state;
-} armv4_5_algorithm_t;
+};
typedef struct armv4_5_core_reg_s
{