It is not possible to invalidate I-Cache on memory writes while the target is running

git-svn-id: svn://svn.berlios.de/openocd/trunk@2795 b42882b7-edfa-0310-969c-e2dbd0fdcd60

diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c
index 7e9a0a9b572ce69ac49c1994b2c4a08626581c71..846d90c343360367317ed2267c8e1ec42bd4c3f3 100644 (file)
--- a/src/target/cortex_a8.c
+++ b/src/target/cortex_a8.c
@@ -1332,6 +1332,8 @@ int cortex_a8_write_memory(struct target_s *target, uint32_t address,
                        exit(-1);
        }
 
+       if (target->state == TARGET_HALTED)
+       {
                /* The Cache handling will NOT work with MMU active, the wrong addresses will be invalidated */
                /* invalidate I-Cache */
                if (armv7a->armv4_5_mmu.armv4_5_cache.i_cache_enabled)
@@ -1349,6 +1351,7 @@ int cortex_a8_write_memory(struct target_s *target, uint32_t address,
                        for (uint32_t cacheline=address; cacheline<address+size*count; cacheline+=64)
                                armv7a->write_cp15(target, 0, 1, 7, 6, cacheline); /* U/D cache to PoC */
                }
+       }
 
        return retval;
 }