]> git.sur5r.net Git - openocd/commitdiff
nds32: Use DMA to access memory as no DCache
authorHsiangkai Wang <hsiangkai@gmail.com>
Thu, 11 Jul 2013 02:08:15 +0000 (10:08 +0800)
committerSpencer Oliver <spen@spen-soft.co.uk>
Fri, 13 Sep 2013 19:37:54 +0000 (19:37 +0000)
As GDB uses file-I/O protocol to access memory, use DMA to access
if no DCache.  This commit improves the performance of Andes
Virtual Hosting.

Change-Id: I36bb2154b9f497fc4237625836cf8c7115330a60
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1580
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
src/target/nds32_v3_common.c

index e88430f2b93e69413ff969af0fbd170379c8933b..e01025f2669ad61e842c4904353840707eaf39c5 100644 (file)
@@ -555,19 +555,25 @@ int nds32_v3_write_buffer(struct target *target, uint32_t address,
                return ERROR_FAIL;
 
        if (nds32->hit_syscall) {
-               /* Use bus mode to access memory during virtual hosting */
                struct aice_port_s *aice = target_to_aice(target);
                enum nds_memory_access origin_access_channel;
-               int result;
-
                origin_access_channel = memory->access_channel;
-               memory->access_channel = NDS_MEMORY_ACC_BUS;
-               aice_memory_access(aice, NDS_MEMORY_ACC_BUS);
 
+               /* If target has no cache, use BUS mode to access memory. */
+               if ((memory->dcache.line_size == 0)
+                       || (memory->dcache.enable == false)) {
+                       /* There is no Dcache or Dcache is disabled. */
+                       memory->access_channel = NDS_MEMORY_ACC_BUS;
+                       aice_memory_access(aice, NDS_MEMORY_ACC_BUS);
+               }
+
+               int result;
                result = nds32_gdb_fileio_write_memory(nds32, address, size, buffer);
 
-               memory->access_channel = origin_access_channel;
-               aice_memory_access(aice, origin_access_channel);
+               if (NDS_MEMORY_ACC_CPU == origin_access_channel) {
+                       memory->access_channel = NDS_MEMORY_ACC_CPU;
+                       aice_memory_access(aice, NDS_MEMORY_ACC_CPU);
+               }
 
                return result;
        }