.export _exit
.import initlib, donelib, callmain
- .import push0, _main, zerobss
+ .import push0, _main, zerobss, copydata
.import ppubuf_flush
; Linker generated symbols
.import __STARTUP_LOAD__,__STARTUP_RUN__, __STARTUP_SIZE__
.import __CODE_LOAD__,__CODE_RUN__, __CODE_SIZE__
.import __RODATA_LOAD__,__RODATA_RUN__, __RODATA_SIZE__
- .import __DATA_LOAD__,__DATA_RUN__, __DATA_SIZE__
.include "zeropage.inc"
.include "nes.inc"
; | ..-EOF | | CHR-ROM pages (in ascending order). |
; +--------+------+------------------------------------------+
- .byte $4e,$45,$53,$1a ; "nes\n"
+ .byte $4e,$45,$53,$1a ; "NES"^Z
.byte 2 ; ines prg - Specifies the number of 16k prg banks.
.byte 1 ; ines chr - Specifies the number of 8k chr banks.
.byte %00000011 ; ines mir - Specifies VRAM mirroring of the banks.
jsr zerobss
-; Copy the .data segment to RAM
-
- lda #<(__DATA_LOAD__)
- sta ptr1
- lda #>(__DATA_LOAD__)
- sta ptr1+1
- lda #<(__DATA_RUN__)
- sta ptr2
- lda #>(__DATA_RUN__)
- sta ptr2+1
-
- ldx #>(__DATA_SIZE__)
-
-@l2: beq @s1 ; no more full pages
-
- ; copy one page
- ldy #0
-@l1: lda (ptr1),y
- sta (ptr2),y
- iny
- bne @l1
-
- inc ptr1+1
- inc ptr2+1
- dex
- bne @l2
-
- ; copy remaining bytes
-@s1:
-
- ; copy one page
- ldy #0
-@l3: lda (ptr1),y
- sta (ptr2),y
- iny
- cpy #<(__DATA_SIZE__)
- bne @l3
+; initialize data
+ jsr copydata
; setup the stack