Continue to work on Fujitsu 32bit port.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@161 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/Demo/MB91460_Softune/91460_template_91467d.dat b/Demo/MB91460_Softune/91460_template_91467d.dat
index 4a4439de01024bc20f3b562e75ceabc887a0482e..ffa3fe96c5adaa39361074e563de0b23c1b7cf1b 100644 (file)
--- a/Demo/MB91460_Softune/91460_template_91467d.dat
+++ b/Demo/MB91460_Softune/91460_template_91467d.dat
@@ -10,84 +10,23 @@ $0
 -I "..\..\Source\include"\r
 -I "..\..\Source\portable\Softune\MB91460"\r
 -I ".\SRC\utility"\r
--O 3\r
--K SIZE\r
--K SHORTADDRESS\r
--B\r
--K SCHEDULE\r
--K A1\r
--K SARG\r
--Xdof\r
--INF STACK\r
--x vTaskIncrementTick,vTaskSwitchContext\r
--K EOPT\r
--K NOLIB\r
--K NOUNROLL\r
-$other\r
--Xalign\r
--D__91467D\r
-$time\r
-1202672931\r
-$end\r
-$..\..\Source\queue.c,0\r
--g\r
--w 1\r
--INF LIST\r
--I ".\SRC"\r
--I ".\SRC\watchdog"\r
--I "..\Common\include"\r
--I "..\..\Source\include"\r
--I "..\..\Source\portable\Softune\MB91460"\r
--I ".\SRC\utility"\r
--O 3\r
--K SIZE\r
--K SHORTADDRESS\r
--B\r
--K SCHEDULE\r
--K A1\r
--K SARG\r
--Xdof\r
--INF STACK\r
--x vTaskIncrementTick,vTaskSwitchContext\r
--K EOPT\r
--K NOLIB\r
--K NOUNROLL\r
-$other\r
--Xalign\r
--D__91467D\r
--w 0\r
-$time\r
-1202672960\r
-$end\r
-$..\..\Source\tasks.c,0\r
--g\r
--w 1\r
--INF LIST\r
--I ".\SRC"\r
--I ".\SRC\watchdog"\r
--I "..\Common\include"\r
--I "..\..\Source\include"\r
--I "..\..\Source\portable\Softune\MB91460"\r
--I ".\SRC\utility"\r
--O 3\r
--K SIZE\r
+-O 0\r
 -K SHORTADDRESS\r
 -B\r
--K SCHEDULE\r
+-K NOSCHEDULE\r
 -K A1\r
 -K SARG\r
 -Xdof\r
 -INF STACK\r
 -x vTaskIncrementTick,vTaskSwitchContext\r
--K EOPT\r
+-K NOEOPT\r
 -K NOLIB\r
 -K NOUNROLL\r
 $other\r
 -Xalign\r
 -D__91467D\r
--w 0\r
 $time\r
-1202672960\r
+1202736093\r
 $end\r
 $1\r
 -g\r
@@ -133,7 +72,7 @@ $2
 -Xdof\r
 $other\r
 $time\r
-1202669532\r
+1202753534\r
 $end\r
 $3\r
 -dt s,d,r,a\r
@@ -143,7 +82,7 @@ $3
 -Xdof\r
 $other\r
 $time\r
-1202669532\r
+1202753534\r
 $end\r
 $4\r
 -Xdof\r
@@ -217,7 +156,7 @@ $2
 -Xdof\r
 $other\r
 $time\r
-1202669532\r
+1202753534\r
 $end\r
 $3\r
 -dt s,d,r,a\r
@@ -227,7 +166,7 @@ $3
 -Xdof\r
 $other\r
 $time\r
-1202669532\r
+1202753534\r
 $end\r
 $4\r
 -Xdof\r

diff --git a/Demo/MB91460_Softune/91467d_FreeRTOS.wsp b/Demo/MB91460_Softune/91467d_FreeRTOS.wsp
index 5d78230f7323e41da85ee25ef0808501c68a79a1..a9e6f67722c7b91cf73fe8c27b456422930d6826 100644 (file)
--- a/Demo/MB91460_Softune/91467d_FreeRTOS.wsp
+++ b/Demo/MB91460_Softune/91467d_FreeRTOS.wsp
@@ -18,6 +18,6 @@ AutoLoad=1
 WSP=C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\MB91460_Softune\\r
 \r
 [EditState]\r
-STATE-1=..\..\Source\portable\Softune\MB91460\port.c:233\r
+STATE-1=SRC\main.c:1\r
 Count=1\r
 \r

diff --git a/Demo/MB91460_Softune/SRC/main.c b/Demo/MB91460_Softune/SRC/main.c
index 4fc2662d3efe428bb6f88424a52d0a541f34d522..0128f0b4ea9c3e0387982ea1ed69b4009c82ead4 100644 (file)
--- a/Demo/MB91460_Softune/SRC/main.c
+++ b/Demo/MB91460_Softune/SRC/main.c
@@ -107,6 +107,24 @@ static portSHORT prvCheckOtherTasksAreStillRunning( void );
  */\r
 static void prvSetupHardware( void );\r
 \r
+/*\r
+ * Tasks that test the context switch mechanism by filling the CPU registers\r
+ * with known values then checking that each register contains the value\r
+ * expected.  Each of the two tasks use different values, and as low priority\r
+ * tasks, get swapped in and out regularly.\r
+ */\r
+static void vFirstRegisterTestTask( void *pvParameters );\r
+static void vSecondRegisterTestTask( void *pvParameters );\r
+\r
+/*---------------------------------------------------------------------------*/\r
+\r
+/* The variable that is set to true should an error be found in one of the \r
+register test tasks. */\r
+unsigned portLONG ulRegTestError = pdFALSE;\r
+\r
+/* Variables used to ensure the register check tasks are still executing. */\r
+static volatile unsigned portLONG ulRegTest1Counter = 0UL, ulRegTest2Counter = 0UL;\r
+\r
 /*---------------------------------------------------------------------------*/\r
 \r
 /* Start all the demo application tasks, then start the scheduler. */\r
@@ -131,6 +149,9 @@ void main(void)
        /* Start the 'Check' task which is defined in this file. */\r
        xTaskCreate( vErrorChecks, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );      \r
 \r
+       xTaskCreate( vFirstRegisterTestTask, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+       xTaskCreate( vSecondRegisterTestTask, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+\r
        /* Start the task that write trace information to the UART. */  \r
        vUtilityStartTraceTask( mainUTILITY_TASK_PRIORITY );\r
 \r
@@ -159,7 +180,6 @@ static void vErrorChecks( void *pvParameters )
 {\r
 portTickType xDelayPeriod = mainNO_ERROR_CHECK_DELAY, xLastExecutionTime;\r
 \r
-\r
        /* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()\r
        works correctly. */\r
        xLastExecutionTime = xTaskGetTickCount();\r
@@ -192,6 +212,7 @@ portTickType xDelayPeriod = mainNO_ERROR_CHECK_DELAY, xLastExecutionTime;
 static portSHORT prvCheckOtherTasksAreStillRunning( void )\r
 {\r
 portBASE_TYPE lReturn = pdPASS;\r
+static unsigned portLONG ulLastRegTest1Counter = 0UL, ulLastRegTest2Counter = 0UL;\r
 \r
        /* The demo tasks maintain a count that increments every cycle of the task\r
        provided that the task has never encountered an error.  This function \r
@@ -253,7 +274,27 @@ portBASE_TYPE lReturn = pdPASS;
        {\r
                lReturn = pdFAIL;\r
        }\r
+\r
+       /* Have the register test tasks found any errors? */\r
+       if( ulRegTestError != pdFALSE )\r
+       {\r
+               lReturn = pdFAIL;\r
+       }\r
+\r
+       /* Are the register test tasks still running? */\r
+       if( ulLastRegTest1Counter == ulRegTest1Counter )\r
+       {\r
+               lReturn = pdFAIL;\r
+       }\r
        \r
+       if( ulLastRegTest2Counter == ulRegTest2Counter )\r
+       {\r
+               lReturn = pdFAIL;\r
+       }\r
+\r
+       ulLastRegTest1Counter = ulRegTest1Counter;\r
+       ulLastRegTest2Counter = ulRegTest2Counter;\r
+\r
        return lReturn;\r
 }\r
 /*-----------------------------------------------------------*/\r
@@ -279,7 +320,7 @@ static void prvSetupHardware( void )
 /* The below callback function is called from Delayed ISR if configUSE_IDLE_HOOK \r
 is configured as 1. */  \r
 #if configUSE_IDLE_HOOK == 1\r
-       void vApplicationIdleHook ( void )\r
+       void vApplicationIdleHook( void )\r
        {\r
                /* Are we using the idle task to kick the watchdog? */\r
                #if WATCHDOG == WTC_IN_IDLE\r
@@ -291,18 +332,265 @@ is configured as 1. */
                #endif\r
        }\r
 #endif\r
+/*-----------------------------------------------------------*/\r
 \r
 /*\r
 The below callback function is called from Tick ISR if configUSE_TICK_HOOK \r
 is configured as 1. */  \r
 #if configUSE_TICK_HOOK == 1\r
-       void vApplicationTickHook ( void )\r
+       void vApplicationTickHook( void )\r
        {\r
                #if WATCHDOG == WTC_IN_TICK\r
                        Kick_Watchdog();\r
                #endif\r
        }\r
 #endif\r
+/*-----------------------------------------------------------*/\r
 \r
+static void vFirstRegisterTestTask( void *pvParameters )\r
+{\r
+extern volatile unsigned portLONG ulCriticalNesting;\r
+\r
+       /* Fills the registers with known values (different to the values\r
+       used in vSecondRegisterTestTask()), then checks that the registers still\r
+       all contain the expected value.  This is done to test the context save\r
+       and restore mechanism as this task is swapped onto and off of the CPU.\r
+\r
+       The critical nesting depth is also saved as part of the context so also\r
+       check this maintains an expected value. */\r
+       ulCriticalNesting = 0x12345678;\r
+\r
+       for( ;; )\r
+       {\r
+               #pragma asm\r
+                       ;Load known values into each register.\r
+                       LDI     #0x11111111, R0\r
+                       LDI     #0x22222222, R1\r
+                       LDI     #0x33333333, R2\r
+                       LDI #0x44444444, R3\r
+                       LDI     #0x55555555, R4\r
+                       LDI     #0x66666666, R5\r
+                       LDI     #0x77777777, R6\r
+                       LDI     #0x88888888, R7\r
+                       LDI     #0x99999999, R8\r
+                       LDI     #0xaaaaaaaa, R9\r
+                       LDI     #0xbbbbbbbb, R10\r
+                       LDI     #0xcccccccc, R11\r
+                       LDI     #0xdddddddd, R12\r
+                       \r
+                       ;Check each register still contains the expected value.\r
+                       LDI #0x11111111, R13\r
+                       CMP R13, R0\r
+                       BNE First_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x22222222, R13\r
+                       CMP R13, R1\r
+                       BNE First_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x33333333, R13\r
+                       CMP R13, R2\r
+                       BNE First_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x44444444, R13\r
+                       CMP R13, R3\r
+                       BNE First_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x55555555, R13\r
+                       CMP R13, R4\r
+                       BNE First_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x66666666, R13\r
+                       CMP R13, R5\r
+                       BNE First_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x77777777, R13\r
+                       CMP R13, R6\r
+                       BNE First_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x88888888, R13\r
+                       CMP R13, R7\r
+                       BNE First_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x99999999, R13\r
+                       CMP R13, R8\r
+                       BNE First_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0xaaaaaaaa, R13\r
+                       CMP R13, R9\r
+                       BNE First_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0xbbbbbbbb, R13\r
+                       CMP R13, R10\r
+                       BNE First_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0xcccccccc, R13\r
+                       CMP R13, R11\r
+                       BNE First_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0xdddddddd, R13\r
+                       CMP R13, R12\r
+                       BNE First_Set_Error\r
+                       NOP\r
+\r
+                       BRA First_Start_Next_Loop\r
+                       NOP\r
+\r
+               First_Set_Error:\r
+\r
+                       ; Latch that an error has occurred.\r
+                       LDI #_ulRegTestError, R0                        \r
+                       LDI #0x00000001, R1\r
+                       ST R1, @R0\r
+\r
+\r
+               First_Start_Next_Loop:\r
+\r
+\r
+               #pragma endasm\r
+\r
+               ulRegTest1Counter++;\r
+\r
+               if( ulCriticalNesting != 0x12345678 )\r
+               {\r
+                       ulRegTestError = pdTRUE;\r
+               }\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void vSecondRegisterTestTask( void *pvParameters )\r
+{\r
+extern volatile unsigned portLONG ulCriticalNesting;\r
+\r
+       /* Fills the registers with known values (different to the values\r
+       used in vFirstRegisterTestTask()), then checks that the registers still\r
+       all contain the expected value.  This is done to test the context save\r
+       and restore mechanism as this task is swapped onto and off of the CPU.\r
+\r
+       The critical nesting depth is also saved as part of the context so also\r
+       check this maintains an expected value. */\r
+       ulCriticalNesting = 0x87654321;\r
+\r
+       for( ;; )\r
+       {\r
+               #pragma asm\r
+                       ;Load known values into each register.\r
+                       LDI     #0x11111111, R1\r
+                       LDI     #0x22222222, R2\r
+                       LDI     #0x33333333, R3\r
+                       LDI #0x44444444, R4\r
+                       LDI     #0x55555555, R5\r
+                       LDI     #0x66666666, R6\r
+                       LDI     #0x77777777, R7\r
+                       LDI     #0x88888888, R8\r
+                       LDI     #0x99999999, R9\r
+                       LDI     #0xaaaaaaaa, R10\r
+                       LDI     #0xbbbbbbbb, R11\r
+                       LDI     #0xcccccccc, R12\r
+                       LDI     #0xdddddddd, R0\r
+                       \r
+                       ;Check each register still contains the expected value.\r
+                       LDI #0x11111111, R13\r
+                       CMP R13, R1\r
+                       BNE Second_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x22222222, R13\r
+                       CMP R13, R2\r
+                       BNE Second_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x33333333, R13\r
+                       CMP R13, R3\r
+                       BNE Second_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x44444444, R13\r
+                       CMP R13, R4\r
+                       BNE Second_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x55555555, R13\r
+                       CMP R13, R5\r
+                       BNE Second_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x66666666, R13\r
+                       CMP R13, R6\r
+                       BNE Second_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x77777777, R13\r
+                       CMP R13, R7\r
+                       BNE Second_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x88888888, R13\r
+                       CMP R13, R8\r
+                       BNE Second_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0x99999999, R13\r
+                       CMP R13, R9\r
+                       BNE Second_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0xaaaaaaaa, R13\r
+                       CMP R13, R10\r
+                       BNE Second_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0xbbbbbbbb, R13\r
+                       CMP R13, R11\r
+                       BNE Second_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0xcccccccc, R13\r
+                       CMP R13, R12\r
+                       BNE Second_Set_Error\r
+                       NOP\r
+\r
+                       LDI #0xdddddddd, R13\r
+                       CMP R13, R0\r
+                       BNE Second_Set_Error\r
+                       NOP\r
+\r
+                       BRA Second_Start_Next_Loop\r
+                       NOP\r
+\r
+               Second_Set_Error:\r
+\r
+                       ; Latch that an error has occurred.\r
+                       LDI #_ulRegTestError, R0                        \r
+                       LDI #0x00000001, R1\r
+                       ST R1, @R0\r
+\r
+\r
+               Second_Start_Next_Loop:\r
+\r
+\r
+               #pragma endasm\r
+\r
+               ulRegTest2Counter++;\r
+\r
+               if( ulCriticalNesting != 0x87654321 )\r
+               {\r
+                       ulRegTestError = pdTRUE;\r
+               }\r
+       }\r
+}\r
+/*-----------------------------------------------------------*/\r
 \r
 \r

diff --git a/Demo/MB91460_Softune/STANDALONE/Mondeb_57K6_com1.sup b/Demo/MB91460_Softune/STANDALONE/Mondeb_57K6_com1.sup
index 903e0fbcb35583ac2b537b1f48192b9421e95fec..79c4e50c7122226b788a76d034ebfbfbc5bd9512 100644 (file)
--- a/Demo/MB91460_Softune/STANDALONE/Mondeb_57K6_com1.sup
+++ b/Demo/MB91460_Softune/STANDALONE/Mondeb_57K6_com1.sup
@@ -25,12 +25,12 @@ Ondemand Load Condition=Disable
 Batch File=\r
 [Window]\r
 Flag=Enable\r
-AssemblySize=3 2 829 426\r
+AssemblySize=325 90 1151 598\r
 AssemblyState=0\r
 AssemblyFGColor=0 0 255\r
 CommandSize=132 138 958 562\r
 CommandState=0\r
-Assembly Address=H'00044700\r
+Assembly Address=H'00044F1C\r
 Memory Address=H'0002F038\r
 Memory Mode=H'00000003\r
 Memory Ascii=H'00000001\r
@@ -98,16 +98,16 @@ MemorySize=66 69 892 493
 MemoryState=0\r
 Layer0=1005,\r
 Layer1=1004,\r
-Layer2=1003,\r
-Source0Name=SRC\Start91460.asm\r
-Source0Size=110 115 936 539\r
+Layer2=2000,..\..\Source\tasks.c\r
+Source0Name=..\..\Source\tasks.c\r
+Source0Size=204 103 1030 527\r
 Source0State=0\r
-Source0Line=914\r
+Source0Line=46C\r
 Source0Mode=2\r
-Source1Name=..\..\Source\tasks.c\r
-Source1Size=204 103 1030 527\r
+Source1Name=..\..\Source\portable\Softune\MB91460\port.c\r
+Source1Size=310 3 1136 427\r
 Source1State=0\r
-Source1Line=6AE\r
+Source1Line=DB\r
 Source1Mode=2\r
 SymbolSize=0 0 0 0\r
 SymbolState=0\r
@@ -120,38 +120,34 @@ Memory Mark Color3=0 255 0
 Memory Mark Color4=0 255 255\r
 Memory Mark Color5=0 128 192\r
 Memory Mark Color6=255 128 64\r
-Layer3=2000,SRC\watchdog\watchdog.c\r
-Layer4=2000,..\..\Source\portable\Softune\MB91460\port.c\r
-Layer5=1002,\r
-Layer6=2000,..\..\Source\tasks.c\r
-Layer7=2000,SRC\Start91460.asm\r
+Layer3=1006,\r
+Layer4=1003,\r
+Layer5=2000,..\..\Source\portable\Softune\MB91460\port.c\r
+Layer6=2000,SRC\watchdog\watchdog.c\r
+Layer7=1002,\r
 LocalSize=44 46 870 470\r
 LocalState=0\r
 WatchSize=0 0 826 424\r
 WatchState=0\r
-Source2Name=..\..\Source\portable\Softune\MB91460\port.c\r
-Source2Size=0 0 826 424\r
+Source2Name=SRC\main.c\r
+Source2Size=66 69 1074 448\r
 Source2State=0\r
-Source2Line=2D\r
+Source2Line=7C\r
 Source2Mode=2\r
 Source3Name=SRC\watchdog\watchdog.c\r
-Source3Size=0 0 938 522\r
+Source3Size=44 46 998 421\r
 Source3State=0\r
-Source3Line=24\r
+Source3Line=1C\r
 Source3Mode=2\r
-Source4Name=SRC\main.c\r
-Source4Size=66 69 1074 448\r
+Layer8=2000,SRC\Start91460.asm\r
+Watch Variable0=[ulCriticalNesting],82030000,1,-1 -1\r
+Layer9=1007,\r
+Layer10=2000,SRC\main.c\r
+Source4Name=SRC\Start91460.asm\r
+Source4Size=198 207 1086 679\r
 Source4State=0\r
-Source4Line=6A\r
+Source4Line=913\r
 Source4Mode=2\r
-Layer8=2000,SRC\main.c\r
-Layer9=1007,\r
-Layer10=2000,..\Common\Minimal\semtest.c\r
-Source5Name=..\Common\Minimal\semtest.c\r
-Source5Size=22 23 976 398\r
-Source5State=0\r
-Source5Line=C8\r
-Source5Mode=2\r
 [Path Environment]\r
 Flag=Enable\r
 Source=\r