only relevant on boards which have more than one target.
@end deffn
-@section Target CPU Types and Variants
+@section Target CPU Types
@cindex target type
@cindex CPU type
-@cindex CPU variant
Each target has a @dfn{CPU type}, as shown in the output of
the @command{targets} command. You need to specify that type
(@pxref{Architecture and Core Commands}),
and more.
-For some CPU types, OpenOCD also defines @dfn{variants} which
-indicate differences that affect their handling.
-For example, a particular implementation bug might need to be
-worked around in some chip versions.
-
It's easy to see what target types are supported,
since there's a command to list them.
-However, there is currently no way to list what target variants
-are supported (other than by reading the OpenOCD source code).
@anchor{targettypes}
@deffn Command {target types}
Lists all supported target types.
-At this writing, the supported CPU types and variants are:
+At this writing, the supported CPU types are:
@itemize @bullet
@item @code{arm11} -- this is a generation of ARMv6 cores
(Support for this is still incomplete.)
@item @code{fa526} -- resembles arm920 (w/o Thumb)
@item @code{feroceon} -- resembles arm926
-@item @code{mips_m4k} -- a MIPS core. This supports one variant:
+@item @code{mips_m4k} -- a MIPS core
@item @code{xscale} -- this is actually an architecture,
not a CPU type. It is based on the ARMv5 architecture.
-There are several variants defined:
-@itemize @minus
-@item @code{ixp42x}, @code{ixp45x}, @code{ixp46x},
-@code{pxa27x} ... instruction register length is 7 bits
-@item @code{pxa250}, @code{pxa255},
-@code{pxa26x} ... instruction register length is 5 bits
-@item @code{pxa3xx} ... instruction register length is 11 bits
-@end itemize
@item @code{openrisc} -- this is an OpenRISC 1000 core.
The current implementation supports three JTAG TAP cores:
@itemize @minus
@item @var{configparams} ... all parameters accepted by
@command{$target_name configure} are permitted.
If the target is big-endian, set it here with @code{-endian big}.
-If the variant matters, set it here with @code{-variant}.
You @emph{must} set the @code{-chain-position @var{dotted.name}} here.
@end itemize
@emph{Warning:} changing some of these after setup is dangerous.
For example, moving a target from one TAP to another;
-and changing its endianness or variant.
+and changing its endianness.
@itemize @bullet
two different handlers, but calling it twice with the
same event name assigns only one handler.
-@item @code{-variant} @var{name} -- specifies a variant of the target,
-which OpenOCD needs to know about.
-
@item @code{-work-area-backup} (@option{0}|@option{1}) -- says
whether the work area gets backed up; by default,
@emph{it is not backed up.}
TCFG_WORK_AREA_SIZE,
TCFG_WORK_AREA_BACKUP,
TCFG_ENDIAN,
- TCFG_VARIANT,
TCFG_COREID,
TCFG_CHAIN_POSITION,
TCFG_DBGBASE,
{ .name = "-work-area-size", .value = TCFG_WORK_AREA_SIZE },
{ .name = "-work-area-backup", .value = TCFG_WORK_AREA_BACKUP },
{ .name = "-endian" , .value = TCFG_ENDIAN },
- { .name = "-variant", .value = TCFG_VARIANT },
{ .name = "-coreid", .value = TCFG_COREID },
{ .name = "-chain-position", .value = TCFG_CHAIN_POSITION },
{ .name = "-dbgbase", .value = TCFG_DBGBASE },
Jim_Nvp *n;
Jim_Obj *o;
jim_wide w;
- char *cp;
int e;
/* parse config or cget options ... */
/* loop for more */
break;
- case TCFG_VARIANT:
- if (goi->isconfigure) {
- if (goi->argc < 1) {
- Jim_SetResultFormatted(goi->interp,
- "%s ?STRING?",
- n->name);
- return JIM_ERR;
- }
- e = Jim_GetOpt_String(goi, &cp, NULL);
- if (e != JIM_OK)
- return e;
- free(target->variant);
- target->variant = strdup(cp);
- } else {
- if (goi->argc != 0)
- goto no_params;
- }
- Jim_SetResultString(goi->interp, target->variant, -1);
- /* loop for more */
- break;
-
case TCFG_COREID:
if (goi->isconfigure) {
e = Jim_GetOpt_Wide(goi, &w);
target->endianness = TARGET_LITTLE_ENDIAN;
}
- /* incase variant is not set */
- if (!target->variant)
- target->variant = strdup("");
-
cp = Jim_GetString(new_cmd, NULL);
target->cmd_name = strdup(cp);
int target_number; /* DO NOT USE! field to be removed in 2010 */
struct jtag_tap *tap; /* where on the jtag chain is this */
int32_t coreid; /* which device on the TAP? */
- char *variant; /* what variant of this chip is it? */
/**
* Indicates whether this target has been examined.
}
static int xscale_init_arch_info(struct target *target,
- struct xscale_common *xscale, struct jtag_tap *tap, const char *variant)
+ struct xscale_common *xscale, struct jtag_tap *tap)
{
struct arm *arm;
uint32_t high_reset_branch, low_reset_branch;
/* store architecture specfic data */
xscale->common_magic = XSCALE_COMMON_MAGIC;
- /* we don't really *need* a variant param ... */
- if (variant) {
- int ir_length = 0;
-
- if (strcmp(variant, "pxa250") == 0
- || strcmp(variant, "pxa255") == 0
- || strcmp(variant, "pxa26x") == 0)
- ir_length = 5;
- else if (strcmp(variant, "pxa27x") == 0
- || strcmp(variant, "ixp42x") == 0
- || strcmp(variant, "ixp45x") == 0
- || strcmp(variant, "ixp46x") == 0)
- ir_length = 7;
- else if (strcmp(variant, "pxa3xx") == 0)
- ir_length = 11;
- else
- LOG_WARNING("%s: unrecognized variant %s",
- tap->dotted_name, variant);
-
- if (ir_length && ir_length != tap->ir_length) {
- LOG_WARNING("%s: IR length for %s is %d; fixing",
- tap->dotted_name, variant, ir_length);
- tap->ir_length = ir_length;
- }
- }
-
- /* PXA3xx shifts the JTAG instructions */
+ /* PXA3xx with 11 bit IR shifts the JTAG instructions */
if (tap->ir_length == 11)
xscale->xscale_variant = XSCALE_PXA3XX;
else
if (!xscale)
return ERROR_FAIL;
- return xscale_init_arch_info(target, xscale, target->tap,
- target->variant);
+ return xscale_init_arch_info(target, xscale, target->tap);
}
COMMAND_HANDLER(xscale_handle_debug_handler_command)
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -event reset-start {
# start off real slow when we're running off internal RC oscillator
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x20000 -work-area-size 0x20000 -work-area-backup 0
# The target
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -event reset-init {
soft_reset_halt
# RSTC_CR : Reset peripherals
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -event reset-init {
# disable watchdog
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -event reset-init {
# disable watchdog
######################
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
# Create the GDB Target.
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME -variant fa526
+target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME
# There is 16K of SRAM on this chip
# FIXME: flash programming is not working by using this work area. So comment this out for now.
#target configuration
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
#dummy flash driver
set _FLASHNAME $_CHIPNAME.flash
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
# Use internal SRAM as a work area
$_TARGETNAME configure -work-area-phys 0xf8000000 -work-area-size 0x8000 -work-area-backup 0
# Create the GDB Target.
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
arm7_9 dcc_downloads enable
# Create the GDB Target.
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
# REVISIT what operating environment sets up this virtual address mapping?
$_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 \
-work-area-size 0x8000 -work-area-backup 1
# Create the GDB Target.
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
arm7_9 dcc_downloads enable
#arm946e-s and
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
+target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -event reset-start { adapter_khz 16 }
$_TARGETNAME configure -event reset-init {
jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID -expected-id $_CPUTAPID2 -expected-id $_CPUTAPID3 -expected-id $_CPUTAPID4 -expected-id $_CPUTAPID5 -expected-id $_CPUTAPID6
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ixp42x
+target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME
# register constants for IXP42x SDRAM controller
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t
+target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x20000 -work-area-size 0x20000 -work-area-backup 0
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
# Create the ".cpu" target
- target create $_TARGETNAME arm966e -endian little -chain-position $_TARGETNAME -variant arm966e
+ target create $_TARGETNAME arm966e -endian little -chain-position $_TARGETNAME
# Configure ETM and ETB
etm config $_TARGETNAME 8 normal full etb
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
# Create the ".cpu" target
- target create $_TARGETNAME arm966e -endian little -chain-position $_TARGETNAME -variant arm966e
+ target create $_TARGETNAME arm966e -endian little -chain-position $_TARGETNAME
}
arm7_9 dbgrq enable
set _TARGETNAME $_CHIPNAME.cpu
jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID -expected-id $_CPUTAPID2 -expected-id $_CPUTAPID3
-target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant pxa27x
+target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME
# maps to PXA internal RAM. If you are using a PXA255
# you must initialize SDRAM or leave this option off
$_TARGETNAME configure -work-area-phys 0x5c000000 -work-area-size 0x10000 -work-area-backup 0
-expected-id $_CPUTAPID_PXA32X_C0
target create $_TARGETNAME xscale -endian $_ENDIAN \
- -chain-position $_TARGETNAME -variant pxa3xx
+ -chain-position $_TARGETNAME
# work area in internal RAM.
$_TARGETNAME configure -work-area-phys 0x5c030000 -work-area-size 0x10000
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t
+target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x30800000 -work-area-size 0x20000 -work-area-backup 0
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t
+target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x200000 -work-area-size 0x4000 -work-area-backup 1
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xE -irmask 0x0f -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
# FIX!!!!! should this really use srst_pulls_trst?
# With srst_pulls_trst "reset halt" will not reset into the
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm1176
+target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
adapter_nsrst_delay 500
jtag_ntrst_delay 500
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME mips_m4k -endian $_ENDIAN -variant
+target create $_TARGETNAME mips_m4k -endian $_ENDIAN
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -event reset-start { adapter_khz 10 }
$_TARGETNAME configure -event reset-init {
jtag_ntrst_delay 500
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian little -chain-position 0
$_TARGETNAME configure -event reset-start { adapter_khz 10 }
$_TARGETNAME configure -event reset-init {
jtag_ntrst_delay 500
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian little -chain-position 0
$_TARGETNAME configure -event reset-start { adapter_khz 10 }
$_TARGETNAME configure -event reset-init {
jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID -ignore-version
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
+target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -event reset-start { adapter_khz 16 }
#target configuration
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -event reset-init {
# target
set _TARGETNAME $_CHIPNAME.arm
-target create $_TARGETNAME arm7tdmi -endian little -chain-position $_TARGETNAME -variant calypso
+target create $_TARGETNAME arm7tdmi -endian little -chain-position $_TARGETNAME
# workarea
jtag newtap at91 cpu -irlen 4 -irmask 0xf
#target configuration
-target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+target create target0 arm7tdmi -endian little -chain-position 0
[new_target_name] configure -work-area-virt 0 -work-area-phys 0x3C000 -work-area-size 0x4000 -work-area-backup false
target_script 0 reset .\prj\at91r40008_reset.script
jtag newtap lpc cpu -irlen 4 -irmask 0xf
#target configuration
-target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi-s_r4
+target create target0 arm7tdmi -endian little -chain-position 0
[new_target_name] configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup false
#flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
jtag newtap lpc cpu -irlen 4 -irmask 0xf
#target configuration
-target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi-s_r4
+target create target0 arm7tdmi -endian little -chain-position 0
[new_target_name] configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup false
#flash configuration
jtag newtap sam7 cpu -irlen 4 -irmask 0xf
#target configuration
-target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+target create target0 arm7tdmi -endian little -chain-position 0
[new_target_name] configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup false
target_script 0 reset .\prj\sam7s256_reset.script
jtag newtap sam7 cpu -irlen 4 -irmask 0xf
#target configuration
-target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+target create target0 arm7tdmi -endian little -chain-position 0
[new_target_name] configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup false
target_script 0 reset .\prj\sam7x256_reset.script
jtag newtap str7 cpu -irlen 4 -irmask 0xf
#target configuration
-target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+target create target0 arm7tdmi -endian little -chain-position 0
[new_target_name] configure -work-area-virt 0 -work-area-phys 0x2000C000 -work-area-size 0x4000 -work-area-backup false
#flash bank str7x <base> <size> 0 0 <target#> <variant>
jtag newtap str7 cpu -irlen 4 -irmask 0xf
#target configuration
-target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+target create target0 arm7tdmi -endian little -chain-position 0
[new_target_name] configure -work-area-virt 0 -work-area-phys 0x2000C000 -work-area-size 0x4000 -work-area-backup false
target_script 0 gdb_program_config .\prj\str710_program.script
jtag newtap str9 bs -irlen 5
#target configuration
-target create target0 arm966e -endian little -chain-position 1 -variant arm966e
+target create target0 arm966e -endian little -chain-position 1
[new_target_name] configure -work-area-virt 0 -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup false
target_script 0 gdb_program_config .\prj\str912_program.script