]> git.sur5r.net Git - freertos/commitdiff
Update resource files for latest IAR releases.
authorrichardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Sat, 9 Jan 2010 14:03:33 +0000 (14:03 +0000)
committerrichardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Sat, 9 Jan 2010 14:03:33 +0000 (14:03 +0000)
git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@951 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

Demo/ARM7_AT91SAM7S64_IAR/resource/at91sam7s-ek-flash.mac [new file with mode: 0644]
Demo/ARM7_AT91SAM7S64_IAR/resource/at91sam7s64-flash.board [new file with mode: 0644]

diff --git a/Demo/ARM7_AT91SAM7S64_IAR/resource/at91sam7s-ek-flash.mac b/Demo/ARM7_AT91SAM7S64_IAR/resource/at91sam7s-ek-flash.mac
new file mode 100644 (file)
index 0000000..5d0997b
--- /dev/null
@@ -0,0 +1,73 @@
+//  ----------------------------------------------------------------------------\r
+//          ATMEL Microcontroller Software Support  -  ROUSSET  -\r
+//  ----------------------------------------------------------------------------\r
+//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+//  ----------------------------------------------------------------------------\r
+//  File Name           : SAM7_FLASH.mac\r
+//  Object              : Generic Macro File for IAR\r
+//  1.0 17/Aug/05 FBr   : Creation\r
+//  ----------------------------------------------------------------------------\r
+\r
+/*********************************************************************\r
+*\r
+*       _InitRSTC()\r
+*\r
+* Function description\r
+*   Initializes the RSTC (Reset controller).\r
+*   This makes sense since the default is to not allow user resets, which makes it impossible to\r
+*   apply a second RESET via J-Link\r
+*/\r
+_InitRSTC() {\r
+    __writeMemory32(0xA5000001, 0xFFFFFD08,"Memory");    // Allow user reset\r
+}\r
+\r
+/*********************************************************************\r
+*\r
+*       _InitPLL()\r
+* Function description\r
+*   Initializes the PMC.\r
+*   1. Enable the Main Oscillator\r
+*   2. Configure PLL to 96MHz\r
+*   3. Switch Master Clock (MCK) on PLL/2 = 48MHz\r
+*/\r
+_InitPLL() {\r
+\r
+    __message "Enable Main Oscillator";\r
+    __writeMemory32(0x00000601,0xFFFFFc20,"Memory");    // MOSC\r
+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x1)  );\r
+\r
+    __message "Set PLL to 96MHz";\r
+    __writeMemory32(0x10191c05,0xFFFFFc2c,"Memory");    // LOCK\r
+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x4)  );\r
+\r
+    __message "Set Master Clock to 48MHz";\r
+    __writeMemory32(0x00000004,0xFFFFFc30,"Memory");    // MCKRDY\r
+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8)  );\r
+    __writeMemory32(0x00000007,0xFFFFFc30,"Memory");    // MCKRDY\r
+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8)  );\r
+\r
+    // Set 1 WS for Flash accesses on each EFC \r
+    __writeMemory32(0x00480100,0xFFFFFF60,"Memory");\r
+    __writeMemory32(0x00480100,0xFFFFFF70,"Memory");\r
+}\r
+\r
+/*********************************************************************\r
+*\r
+*       execUserReset() : JTAG set initially to Full Speed\r
+*/\r
+execUserReset() {\r
+    __message "execUserReset()";\r
+    __hwReset(0);                       // Hardware Reset: CPU is automatically halted after the reset (JTAG is already configured to 32kHz)\r
+    _InitPLL();                         // Allow to debug at JTAG Full Speed\r
+    _InitRSTC();                        // Enable User Reset to allow execUserReset() execution\r
+}\r
+\r
diff --git a/Demo/ARM7_AT91SAM7S64_IAR/resource/at91sam7s64-flash.board b/Demo/ARM7_AT91SAM7S64_IAR/resource/at91sam7s64-flash.board
new file mode 100644 (file)
index 0000000..e2a0466
--- /dev/null
@@ -0,0 +1,12 @@
+<?xml version="1.0" encoding="iso-8859-1"?>\r
+\r
+<flash_board>\r
+  <pass>\r
+    <loader>$TOOLKIT_DIR$\config\flashloader\Atmel\AT91SAM7S64-EK\flash-at91sam7s64.flash</loader>\r
+    <range>CODE 0x100000 0x110000</range>\r
+    <rel_offset>0</rel_offset>\r
+    <args>--flash\r
+--boot\r
+</args>\r
+  </pass>\r
+</flash_board>\r