]> git.sur5r.net Git - freertos/commitdiff
Change "SWI" to "SWI 0".
authorrichardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Fri, 8 Jan 2010 14:25:12 +0000 (14:25 +0000)
committerrichardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Fri, 8 Jan 2010 14:25:12 +0000 (14:25 +0000)
git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@949 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

Source/portable/GCC/ARM7_AT91FR40008/portmacro.h
Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h
Source/portable/GCC/ARM7_LPC2000/portmacro.h
Source/portable/GCC/ARM7_LPC23xx/portmacro.h

index 0d523721c1903371c27016f8b6317fa79441db95..a4ae53465e16598decd0677bad05b1f2728aaf80 100644 (file)
@@ -113,7 +113,7 @@ extern "C" {
 #define portSTACK_GROWTH                       ( -1 )\r
 #define portTICK_RATE_MS                       ( ( portTickType ) 1000 / configTICK_RATE_HZ )          \r
 #define portBYTE_ALIGNMENT                     8\r
-#define portYIELD()                                    asm volatile ( "SWI" )\r
+#define portYIELD()                                    asm volatile ( "SWI 0" )\r
 #define portNOP()                                      asm volatile ( "NOP" )\r
 \r
 /*\r
index 6a8a3a7b516297b795a175e3ead828d9dc163fb5..4393dc1475391ff0d94ac47ae56a4b7832e964d0 100644 (file)
@@ -211,7 +211,7 @@ extern volatile unsigned portLONG ulCriticalNesting;                                        \
 \r
 \r
 #define portYIELD_FROM_ISR()           vTaskSwitchContext()\r
-#define portYIELD()                                    asm volatile ( "SWI" )\r
+#define portYIELD()                                    asm volatile ( "SWI 0" )\r
 /*-----------------------------------------------------------*/\r
 \r
 \r
index 62596db50ae7dcecaeefd37e592e433cb32e6c23..9b6889b9352aab4a12b6fd5fc6e4c0af1ddf7b78 100644 (file)
@@ -188,7 +188,7 @@ extern volatile unsigned portLONG ulCriticalNesting;                                        \
 \r
 extern void vTaskSwitchContext( void );\r
 #define portYIELD_FROM_ISR()           vTaskSwitchContext()\r
-#define portYIELD()                                    __asm volatile ( "SWI" )\r
+#define portYIELD()                                    __asm volatile ( "SWI 0" )\r
 /*-----------------------------------------------------------*/\r
 \r
 \r
index 9f049de11e8ae61adbed7481d80cdcfc5313e7cf..bc591c3ed92108982fa9381cbc382df726878cc2 100644 (file)
@@ -211,7 +211,7 @@ extern volatile unsigned portLONG ulCriticalNesting;                                        \
 \r
 \r
 #define portYIELD_FROM_ISR()           vTaskSwitchContext()\r
-#define portYIELD()                                    __asm volatile ( "SWI" )\r
+#define portYIELD()                                    __asm volatile ( "SWI 0" )\r
 /*-----------------------------------------------------------*/\r
 \r
 \r