]> git.sur5r.net Git - openocd/commitdiff
stlink: fix arm semihosting support
authorSpencer Oliver <spen@spen-soft.co.uk>
Tue, 3 Jul 2012 14:50:24 +0000 (15:50 +0100)
committerFreddie Chopin <freddie.chopin@gmail.com>
Wed, 11 Jul 2012 10:34:59 +0000 (10:34 +0000)
Add missing arm cmd handlers that enable semi hosting support to work as
expected.

Change-Id: I063d82c48b82b4f6aed4efc4b08ea752d78e9047
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/734
Tested-by: jenkins
Reviewed-by: Alan Bowman <alan.michael.bowman@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
src/target/stm32_stlink.c

index b6d4ffa24e6a7826d68f4334b9b5e111cec4b0f6..e1324fd46c6a7b57074948b22423fc8eaf2af849 100644 (file)
@@ -586,6 +586,7 @@ static int stm32_stlink_resume(struct target *target, int current,
                return res;
 
        target->state = TARGET_RUNNING;
+       target->debug_reason = DBG_REASON_NOTHALTED;
 
        target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
 
@@ -754,12 +755,20 @@ static int stm32_stlink_bulk_write_memory(struct target *target,
        return stm32_stlink_write_memory(target, address, 4, count, buffer);
 }
 
+static const struct command_registration stm32_stlink_command_handlers[] = {
+       {
+               .chain = arm_command_handlers,
+       },
+       COMMAND_REGISTRATION_DONE
+};
+
 struct target_type stm32_stlink_target = {
        .name = "stm32_stlink",
 
        .init_target = stm32_stlink_init_target,
        .target_create = stm32_stlink_target_create,
        .examine = cortex_m3_examine,
+       .commands = stm32_stlink_command_handlers,
 
        .poll = stm32_stlink_poll,
        .arch_state = armv7m_arch_state,