flash/nor/at91sam4: remove FWS=6, rename at91samg to atsamg

FWS=6 workaround removed, as this appears to be a copy-paste error
from the SAM3X family. Originally addressed in http://openocd.zylin.com/3837
but not all occurences were removed.

Atmel changed chip naming and removed 91 prefix for atsamg, samd...

Change-Id: Ia2b43da82b2ff9b1c85fdb456a0a198ab095243d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3926
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c
index ff75b4188325dc06160a9e976a04ee13bc73114f..d101c9b4cb7e702acd0e607a8780199e085ec8d1 100644 (file)
--- a/src/flash/nor/at91sam4.c
+++ b/src/flash/nor/at91sam4.c
@@ -464,7 +464,7 @@ static const struct sam4_chip_details all_sam4_details[] = {
                        .bank_number = 0,
                        .base_address = FLASH_BANK_BASE_S,
                        .controller_address = 0x400e0a00,
-                       .flash_wait_states = 6, /* workaround silicon bug */
+                       .flash_wait_states = 5,
                        .present = 1,
                        .size_bytes =  1024 * 1024,
                        .nsectors   =  128,
@@ -499,7 +499,7 @@ static const struct sam4_chip_details all_sam4_details[] = {
                        .bank_number = 0,
                        .base_address = FLASH_BANK_BASE_S,
                        .controller_address = 0x400e0a00,
-                       .flash_wait_states = 6, /* workaround silicon bug */
+                       .flash_wait_states = 5,
                        .present = 1,
                        .size_bytes =  512 * 1024,
                        .nsectors   =  64,
@@ -532,7 +532,7 @@ static const struct sam4_chip_details all_sam4_details[] = {
                        .bank_number = 0,
                        .base_address = FLASH_BANK_BASE_S,
                        .controller_address = 0x400e0a00,
-                       .flash_wait_states = 6, /* workaround silicon bug */
+                       .flash_wait_states = 5,
                        .present = 1,
                        .size_bytes =  512 * 1024,
                        .nsectors   =  64,
@@ -565,7 +565,7 @@ static const struct sam4_chip_details all_sam4_details[] = {
                        .bank_number = 0,
                        .base_address = FLASH_BANK_BASE_S,
                        .controller_address = 0x400e0a00,
-                       .flash_wait_states = 6, /* workaround silicon bug */
+                       .flash_wait_states = 5,
                        .present = 1,
                        .size_bytes =  512 * 1024,
                        .nsectors   =  64,
@@ -598,7 +598,7 @@ static const struct sam4_chip_details all_sam4_details[] = {
                        .bank_number = 0,
                        .base_address = FLASH_BANK_BASE_S,
                        .controller_address = 0x400e0a00,
-                       .flash_wait_states = 6, /* workaround silicon bug */
+                       .flash_wait_states = 5,
                        .present = 1,
                        .size_bytes =  1024 * 1024,
                        .nsectors   =  128,
@@ -631,7 +631,7 @@ static const struct sam4_chip_details all_sam4_details[] = {
                        .bank_number = 0,
                        .base_address = FLASH_BANK_BASE_S,
                        .controller_address = 0x400e0a00,
-                       .flash_wait_states = 6, /* workaround silicon bug */
+                       .flash_wait_states = 5,
                        .present = 1,
                        .size_bytes =  1024 * 1024,
                        .nsectors   =  128,
@@ -1279,7 +1279,7 @@ static const struct sam4_chip_details all_sam4_details[] = {
                                .bank_number = 0,
                                .base_address = FLASH_BANK0_BASE_SD,
                                .controller_address = 0x400e0a00,
-                               .flash_wait_states = 6, /* workaround silicon bug */
+                               .flash_wait_states = 5,
                                .present = 1,
                                .size_bytes =  512 * 1024,
                                .nsectors   =  64,
@@ -1295,7 +1295,7 @@ static const struct sam4_chip_details all_sam4_details[] = {
                                .bank_number = 1,
                                .base_address = FLASH_BANK1_BASE_1024K_SD,
                                .controller_address = 0x400e0c00,
-                               .flash_wait_states = 6, /* workaround silicon bug */
+                               .flash_wait_states = 5,
                                .present = 1,
                                .size_bytes =  512 * 1024,
                                .nsectors   =  64,
@@ -1305,10 +1305,10 @@ static const struct sam4_chip_details all_sam4_details[] = {
                },
        },
 
-       /* at91samg53n19 */
+       /* atsamg53n19 */
        {
                .chipid_cidr    = 0x247e0ae0,
-               .name           = "at91samg53n19",
+               .name           = "atsamg53n19",
                .total_flash_size     = 512 * 1024,
                .total_sram_size      = 96 * 1024,
                .n_gpnvms       = 2,
@@ -1323,7 +1323,7 @@ static const struct sam4_chip_details all_sam4_details[] = {
                                .bank_number = 0,
                                .base_address = FLASH_BANK_BASE_S,
                                .controller_address = 0x400e0a00,
-                               .flash_wait_states = 6, /* workaround silicon bug */
+                               .flash_wait_states = 5,
                                .present = 1,
                                .size_bytes =  512 * 1024,
                                .nsectors   =  64,