"0x%8.8" PRIx32 "\t0x%8.8" PRIx32
"\tMULTS64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
address,
- opcode, (dt_val >> 1) & 0x1, instruction->info.ra,
+ opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
instruction->info.rb);
}
break;
"0x%8.8" PRIx32 "\t0x%8.8" PRIx32
"\tMULT64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
address,
- opcode, (dt_val >> 1) & 0x1, instruction->info.ra,
+ opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
instruction->info.rb);
}
break;
"0x%8.8" PRIx32 "\t0x%8.8" PRIx32
"\tMADDS64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
address,
- opcode, (dt_val >> 1) & 0x1, instruction->info.ra,
+ opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
instruction->info.rb);
}
break;
"0x%8.8" PRIx32 "\t0x%8.8" PRIx32
"\tMADD64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
address,
- opcode, (dt_val >> 1) & 0x1, instruction->info.ra,
+ opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
instruction->info.rb);
}
break;
"0x%8.8" PRIx32 "\t0x%8.8" PRIx32
"\tMSUBS64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
address,
- opcode, (dt_val >> 1) & 0x1, instruction->info.ra,
+ opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
instruction->info.rb);
}
break;
"0x%8.8" PRIx32 "\t0x%8.8" PRIx32
"\tMSUB64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
address,
- opcode, (dt_val >> 1) & 0x1, instruction->info.ra,
+ opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
instruction->info.rb);
}
break;
"0x%8.8" PRIx32 "\t0x%8.8" PRIx32
"\tDIVS\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
address,
- opcode, (dt_val >> 1) & 0x1, instruction->info.ra,
+ opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
instruction->info.rb);
}
break;
"0x%8.8" PRIx32 "\t0x%8.8" PRIx32
"\tDIV\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
address,
- opcode, (dt_val >> 1) & 0x1, instruction->info.ra,
+ opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
instruction->info.rb);
}
break;
"0x%8.8" PRIx32 "\t0x%8.8" PRIx32
"\tMULT32\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
address,
- opcode, (dt_val >> 1) & 0x1, instruction->info.ra,
+ opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
instruction->info.rb);
}
break;
"0x%8.8" PRIx32 "\t0x%8.8" PRIx32
"\tMADD32\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
address,
- opcode, (dt_val >> 1) & 0x1, instruction->info.ra,
+ opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
instruction->info.rb);
}
break;
"0x%8.8" PRIx32 "\t0x%8.8" PRIx32
"\tMSUB32\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
address,
- opcode, (dt_val >> 1) & 0x1, instruction->info.ra,
+ opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
instruction->info.rb);
}
break;
"0x%8.8" PRIx32 "\t0x%4.4" PRIx16
"\t\tBREAK16\t#%" PRId16,
address,
- opcode, opcode & 0x1F);
+ opcode, (int16_t)(opcode & 0x1F));
} else { /* EX9.IT */
instruction->type = NDS32_INSN_MISC;
/* TODO: implement real instruction semantics */
"0x%8.8" PRIx32 "\t0x%4.4" PRIx16
"\t\tEX9.IT\t#%" PRId16,
address,
- opcode, opcode & 0x1FF);
+ opcode, (int16_t)(opcode & 0x1FF));
}
break;
case 2: /* ADDI10S */