--- /dev/null
+/*\r
+ FreeRTOS.org V5.0.4 - Copyright (C) 2003-2008 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify\r
+ it under the terms of the GNU General Public License as published by\r
+ the Free Software Foundation; either version 2 of the License, or\r
+ (at your option) any later version.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful,\r
+ but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ GNU General Public License for more details.\r
+\r
+ You should have received a copy of the GNU General Public License\r
+ along with FreeRTOS.org; if not, write to the Free Software\r
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+\r
+ A special exception to the GPL can be applied should you wish to distribute\r
+ a combined work that includes FreeRTOS.org, without being obliged to provide\r
+ the source code for any proprietary components. See the licensing section\r
+ of http://www.FreeRTOS.org for full details of how and when the exception\r
+ can be applied.\r
+\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+ * *\r
+ * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *\r
+ * and even write all or part of your application on your behalf. *\r
+ * See http://www.OpenRTOS.com for details of the services we provide to *\r
+ * expedite your project. *\r
+ * *\r
+ ***************************************************************************\r
+ ***************************************************************************\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+\r
+/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.\r
+\r
+NOTE: This driver is primarily to test the scheduler functionality. It does\r
+not effectively use the buffers or DMA and is therefore not intended to be\r
+an example of an efficient driver. */\r
+\r
+/* Standard include file. */\r
+#include <stdlib.h>\r
+\r
+/* Scheduler include files. */\r
+#include "FreeRTOS.h"\r
+#include "queue.h"\r
+#include "task.h"\r
+\r
+/* Demo app include files. */\r
+#include "serial.h"\r
+\r
+/* Hardware definitions. */\r
+#define serNO_PARITY ( ( unsigned portCHAR ) 0x02 << 3 )\r
+#define ser8DATA_BITS ( ( unsigned portCHAR ) 0x03 )\r
+#define ser1STOP_BIT ( ( unsigned portCHAR ) 0x07 )\r
+#define serSYSTEM_CLOCK ( ( unsigned portCHAR ) 0xdd )\r
+#define serTX_ENABLE ( ( unsigned portCHAR ) 0x04 )\r
+#define serRX_ENABLE ( ( unsigned portCHAR ) 0x01 )\r
+#define serTX_INT ( ( unsigned portCHAR ) 0x01 )\r
+#define serRX_INT ( ( unsigned portCHAR ) 0x02 )\r
+\r
+\r
+/* The queues used to communicate between tasks and ISR's. */\r
+static xQueueHandle xRxedChars;\r
+static xQueueHandle xCharsForTx;\r
+\r
+/* Flag used to indicate the tx status. */\r
+static portBASE_TYPE xTxHasEnded = pdTRUE;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
+{\r
+const unsigned portLONG ulBaudRateDivisor = ( configCPU_CLOCK_HZ / ( 32UL * ulWantedBaud ) );\r
+\r
+ /* Create the queues used by the com test task. */\r
+ xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );\r
+ xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );\r
+\r
+ xTxHasEnded = pdTRUE;\r
+\r
+ /* Set the pins to UART mode. */\r
+ MCF_GPIO_PUAPAR |= MCF_GPIO_PUAPAR_UTXD0_UTXD0;\r
+ MCF_GPIO_PUAPAR |= MCF_GPIO_PUAPAR_URXD0_URXD0;\r
+\r
+ /* Reset the peripheral. */\r
+ MCF_UART0_UCR = MCF_UART_UCR_RESET_RX;\r
+ MCF_UART0_UCR = MCF_UART_UCR_RESET_TX;\r
+ MCF_UART0_UCR = MCF_UART_UCR_RESET_ERROR;\r
+ MCF_UART0_UCR = MCF_UART_UCR_RESET_BKCHGINT;\r
+ MCF_UART0_UCR = MCF_UART_UCR_RESET_MR | MCF_UART_UCR_RX_DISABLED | MCF_UART_UCR_TX_DISABLED;\r
+\r
+ /* Configure the UART. */\r
+ MCF_UART0_UMR1 = serNO_PARITY | ser8DATA_BITS;\r
+ MCF_UART0_UMR2 = ser1STOP_BIT;\r
+ MCF_UART0_UCSR = serSYSTEM_CLOCK;\r
+\r
+ MCF_UART0_UBG1 = ( unsigned portCHAR ) ( ( ulBaudRateDivisor >> 8UL ) & 0xffUL );\r
+ MCF_UART0_UBG2 = ( unsigned portCHAR ) ( ulBaudRateDivisor & 0xffUL );\r
+\r
+ /* Turn it on. */\r
+ MCF_UART0_UCR = serTX_ENABLE | serRX_ENABLE;\r
+\r
+ /* Configure the interrupt controller. Run the UARTs above the kernel\r
+ interrupt priority for demo purposes. */\r
+ MCF_INTC0_ICR13 = ( ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 1 ) << 3 );\r
+ MCF_INTC0_IMRL &= ~( MCF_INTC_IMRL_INT_MASK13 | 0x01 );\r
+\r
+ /* The Tx interrupt is not enabled until there is data to send. */\r
+ MCF_UART0_UIMR = serRX_INT;\r
+\r
+ /* Only a single port is implemented so we don't need to return anything. */\r
+ return NULL;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )\r
+{\r
+ /* Only one port is supported. */\r
+ ( void ) pxPort;\r
+\r
+ /* Get the next character from the buffer. Return false if no characters\r
+ are available or arrive before xBlockTime expires. */\r
+ if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )\r
+ {\r
+ return pdTRUE;\r
+ }\r
+ else\r
+ {\r
+ return pdFALSE;\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )\r
+{\r
+ /* Only one port is supported. */\r
+ ( void ) pxPort;\r
+\r
+ /* Return false if after the block time there is no room on the Tx queue. */\r
+ if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )\r
+ {\r
+ return pdFAIL;\r
+ }\r
+\r
+ /* A critical section should not be required as xTxHasEnded will not be\r
+ written to by the ISR if it is already 0 (is this correct?). */\r
+ if( xTxHasEnded != pdFALSE )\r
+ {\r
+ xTxHasEnded = pdFALSE;\r
+ MCF_UART0_UIMR = serRX_INT | serTX_INT;\r
+ }\r
+\r
+ return pdPASS;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSerialClose( xComPortHandle xPort )\r
+{\r
+ ( void ) xPort;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+__declspec(interrupt:0) void vUART0InterruptHandler( void )\r
+{\r
+unsigned portCHAR ucChar;\r
+portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE, xDoneSomething = pdTRUE;\r
+\r
+ while( xDoneSomething != pdFALSE )\r
+ {\r
+ xDoneSomething = pdFALSE;\r
+\r
+ /* Does the tx buffer contain space? */\r
+ if( ( MCF_UART0_USR & MCF_UART_USR_TXRDY ) != 0x00 )\r
+ {\r
+ /* Are there any characters queued to be sent? */\r
+ if( xQueueReceiveFromISR( xCharsForTx, &ucChar, &xHigherPriorityTaskWoken ) == pdTRUE )\r
+ {\r
+ /* Send the next char. */\r
+ MCF_UART0_UTB = ucChar;\r
+ xDoneSomething = pdTRUE;\r
+ }\r
+ else\r
+ {\r
+ /* Turn off the Tx interrupt until such time as another character\r
+ is being transmitted. */\r
+ MCF_UART0_UIMR = serRX_INT;\r
+ xTxHasEnded = pdTRUE;\r
+ }\r
+ }\r
+\r
+ if( MCF_UART0_USR & MCF_UART_USR_RXRDY )\r
+ {\r
+ ucChar = MCF_UART0_URB;\r
+ xQueueSendFromISR( xRxedChars, &ucChar, &xHigherPriorityTaskWoken );\r
+ xDoneSomething = pdTRUE;\r
+ }\r
+ }\r
+\r
+ portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );\r
+}\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
projects / freertos / commitdiff