--- /dev/null
+/*\r
+ FreeRTOS.org V5.3.1 - Copyright (C) 2003-2009 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify it\r
+ under the terms of the GNU General Public License (version 2) as published\r
+ by the Free Software Foundation and modified by the FreeRTOS exception.\r
+ **NOTE** The exception to the GPL is included to allow you to distribute a\r
+ combined work that includes FreeRTOS.org without being obliged to provide\r
+ the source code for any proprietary components. Alternative commercial\r
+ license and support terms are also available upon request. See the \r
+ licensing section of http://www.FreeRTOS.org for full details.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details.\r
+\r
+ You should have received a copy of the GNU General Public License along\r
+ with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59\r
+ Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * This is a concise, step by step, 'hands on' guide that describes both *\r
+ * general multitasking concepts and FreeRTOS specifics. It presents and *\r
+ * explains numerous examples that are written using the FreeRTOS API. *\r
+ * Full source code for all the examples is provided in an accompanying *\r
+ * .zip file. *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/* When switching out a task, if the task tag contains a buffer address then\r
+save the flop context into the buffer. */\r
+#define traceTASK_SWITCHED_OUT() \\r
+ if( pxCurrentTCB->pxTaskTag != NULL ) \\r
+ { \\r
+ extern void vPortSaveFPURegisters( void * ); \\r
+ vPortSaveFPURegisters( ( void * ) ( pxCurrentTCB->pxTaskTag ) ); \\r
+ }\r
+\r
+/* When switching in a task, if the task tag contains a buffer address then\r
+load the flop context from the buffer. */\r
+#define traceTASK_SWITCHED_IN() \\r
+ if( pxCurrentTCB->pxTaskTag != NULL ) \\r
+ { \\r
+ extern void vPortRestoreFPURegisters( void * ); \\r
+ vPortRestoreFPURegisters( ( void * ) ( pxCurrentTCB->pxTaskTag ) ); \\r
+ }\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS.org V5.3.1 - Copyright (C) 2003-2009 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify it\r
+ under the terms of the GNU General Public License (version 2) as published\r
+ by the Free Software Foundation and modified by the FreeRTOS exception.\r
+ **NOTE** The exception to the GPL is included to allow you to distribute a\r
+ combined work that includes FreeRTOS.org without being obliged to provide\r
+ the source code for any proprietary components. Alternative commercial\r
+ license and support terms are also available upon request. See the \r
+ licensing section of http://www.FreeRTOS.org for full details.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details.\r
+\r
+ You should have received a copy of the GNU General Public License along\r
+ with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59\r
+ Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * This is a concise, step by step, 'hands on' guide that describes both *\r
+ * general multitasking concepts and FreeRTOS specifics. It presents and *\r
+ * explains numerous examples that are written using the FreeRTOS API. *\r
+ * Full source code for all the examples is provided in an accompanying *\r
+ * .zip file. *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/*-----------------------------------------------------------\r
+ * Implementation of functions defined in portable.h for the PPC440 port.\r
+ *----------------------------------------------------------*/\r
+\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Library includes. */\r
+#include "xtime_l.h"\r
+#include "xintc.h"\r
+#include "xintc_i.h"\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Definitions to set the initial MSR of each task. */\r
+#define portCRITICAL_INTERRUPT_ENABLE ( 1UL << 17UL )\r
+#define portEXTERNAL_INTERRUPT_ENABLE ( 1UL << 15UL )\r
+#define portMACHINE_CHECK_ENABLE ( 1UL << 12UL )\r
+\r
+#if configUSE_FPU == 1\r
+ #define portAPU_PRESENT ( 1UL << 25UL )\r
+ #define portFCM_FPU_PRESENT ( 1UL << 13UL )\r
+#else\r
+ #define portAPU_PRESENT ( 0UL )\r
+ #define portFCM_FPU_PRESENT ( 0UL )\r
+#endif\r
+\r
+#define portINITIAL_MSR ( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE | portAPU_PRESENT | portFCM_FPU_PRESENT )\r
+\r
+\r
+extern const unsigned _SDA_BASE_;\r
+extern const unsigned _SDA2_BASE_;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Setup the system timer to generate the tick interrupt.\r
+ */\r
+static void prvSetupTimerInterrupt( void );\r
+\r
+/*\r
+ * The handler for the tick interrupt - defined in portasm.s.\r
+ */\r
+extern void vPortTickISR( void );\r
+\r
+/*\r
+ * The handler for the yield function - defined in portasm.s.\r
+ */\r
+extern void vPortYield( void );\r
+\r
+/*\r
+ * Function to start the scheduler running by starting the highest\r
+ * priority task that has thus far been created.\r
+ */\r
+extern void vPortStartFirstTask( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Structure used to hold the state of the interrupt controller. */\r
+static XIntc xInterruptController;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Initialise the stack of a task to look exactly as if the task had been\r
+ * interrupted.\r
+ *\r
+ * See the header file portable.h.\r
+ */\r
+portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+{\r
+ /* Place a known value at the bottom of the stack for debugging. */\r
+ *pxTopOfStack = 0xDEADBEEF;\r
+ pxTopOfStack--;\r
+\r
+ /* EABI stack frame. */\r
+ pxTopOfStack -= 20; /* Previous backchain and LR, R31 to R4 inclusive. */\r
+\r
+ /* Parameters in R13. */\r
+ *pxTopOfStack = ( portSTACK_TYPE ) &_SDA_BASE_; /* address of the first small data area */\r
+ pxTopOfStack -= 10;\r
+\r
+ /* Parameters in R3. */\r
+ *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ pxTopOfStack--;\r
+\r
+ /* Parameters in R2. */\r
+ *pxTopOfStack = ( portSTACK_TYPE ) &_SDA2_BASE_; /* address of the second small data area */\r
+ pxTopOfStack--;\r
+\r
+ /* R1 is the stack pointer so is omitted. */\r
+\r
+ *pxTopOfStack = 0x10000001UL;; /* R0. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x00000000UL; /* USPRG0. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x00000000UL; /* CR. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x00000000UL; /* XER. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x00000000UL; /* CTR. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) vPortEndScheduler; /* LR. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* SRR0. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = portINITIAL_MSR;/* SRR1. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) vPortEndScheduler;/* Next LR. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0x00000000UL;/* Backchain. */\r
+\r
+ return pxTopOfStack;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE xPortStartScheduler( void )\r
+{\r
+ prvSetupTimerInterrupt();\r
+ XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );\r
+ vPortStartFirstTask();\r
+\r
+ /* Should not get here as the tasks are now running! */\r
+ return pdFALSE;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEndScheduler( void )\r
+{\r
+ /* Not implemented. */\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Hardware initialisation to generate the RTOS tick.\r
+ */\r
+static void prvSetupTimerInterrupt( void )\r
+{\r
+const unsigned portLONG ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );\r
+\r
+ XTime_DECClearInterrupt();\r
+ XTime_FITClearInterrupt();\r
+ XTime_WDTClearInterrupt();\r
+ XTime_WDTDisableInterrupt();\r
+ XTime_FITDisableInterrupt();\r
+\r
+ XExc_RegisterHandler( XEXC_ID_DEC_INT, ( XExceptionHandler ) vPortTickISR, ( void * ) 0 );\r
+\r
+ XTime_DECEnableAutoReload();\r
+ XTime_DECSetInterval( ulInterval );\r
+ XTime_DECEnableInterrupt();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortISRHandler( void *pvNullDoNotUse )\r
+{\r
+unsigned portLONG ulInterruptStatus, ulInterruptMask = 1UL;\r
+portBASE_TYPE xInterruptNumber;\r
+XIntc_Config *pxInterruptController;\r
+XIntc_VectorTableEntry *pxTable;\r
+\r
+ /* Just to remove compiler warning. */\r
+ ( void ) pvNullDoNotUse;\r
+\r
+ /* Get the configuration by using the device ID - in this case it is\r
+ assumed that only one interrupt controller is being used. */\r
+ pxInterruptController = &XIntc_ConfigTable[ XPAR_XPS_INTC_0_DEVICE_ID ];\r
+\r
+ /* Which interrupts are pending? */\r
+ ulInterruptStatus = XIntc_mGetIntrStatus( pxInterruptController->BaseAddress );\r
+\r
+ for( xInterruptNumber = 0; xInterruptNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS; xInterruptNumber++ )\r
+ {\r
+ if( ulInterruptStatus & 0x01UL )\r
+ {\r
+ /* Clear the pending interrupt. */\r
+ XIntc_mAckIntr( pxInterruptController->BaseAddress, ulInterruptMask );\r
+\r
+ /* Call the registered handler. */\r
+ pxTable = &( pxInterruptController->HandlerTable[ xInterruptNumber ] );\r
+ pxTable->Handler( pxTable->CallBackRef );\r
+ }\r
+\r
+ /* Check the next interrupt. */\r
+ ulInterruptMask <<= 0x01UL;\r
+ ulInterruptStatus >>= 0x01UL;\r
+\r
+ /* Have we serviced all interrupts? */\r
+ if( ulInterruptStatus == 0UL )\r
+ {\r
+ break;\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortSetupInterruptController( void )\r
+{\r
+extern void vPortISRWrapper( void );\r
+\r
+ /* Perform all library calls necessary to initialise the exception table\r
+ and interrupt controller. This assumes only one interrupt controller is in\r
+ use. */\r
+ XExc_mDisableExceptions( XEXC_NON_CRITICAL );\r
+ XExc_Init();\r
+\r
+ /* The library functions save the context - we then jump to a wrapper to\r
+ save the stack into the TCB. The wrapper then calls the handler defined\r
+ above. */\r
+ XExc_RegisterHandler( XEXC_ID_NON_CRITICAL_INT, ( XExceptionHandler ) vPortISRWrapper, NULL );\r
+ XIntc_Initialize( &xInterruptController, XPAR_XPS_INTC_0_DEVICE_ID );\r
+ XIntc_Start( &xInterruptController, XIN_REAL_MODE );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )\r
+{\r
+portBASE_TYPE xReturn = pdFAIL;\r
+\r
+ /* This function is defined here so the scope of xInterruptController can\r
+ remain within this file. */\r
+\r
+ if( XST_SUCCESS == XIntc_Connect( &xInterruptController, ucInterruptID, pxHandler, pvCallBackRef ) )\r
+ {\r
+ XIntc_Enable( &xInterruptController, ucInterruptID );\r
+ xReturn = pdPASS;\r
+ }\r
+\r
+ return xReturn;\r
+}\r
--- /dev/null
+/*\r
+ FreeRTOS.org V5.3.1 - Copyright (C) 2003-2009 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify it\r
+ under the terms of the GNU General Public License (version 2) as published\r
+ by the Free Software Foundation and modified by the FreeRTOS exception.\r
+ **NOTE** The exception to the GPL is included to allow you to distribute a\r
+ combined work that includes FreeRTOS.org without being obliged to provide\r
+ the source code for any proprietary components. Alternative commercial\r
+ license and support terms are also available upon request. See the \r
+ licensing section of http://www.FreeRTOS.org for full details.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details.\r
+\r
+ You should have received a copy of the GNU General Public License along\r
+ with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59\r
+ Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * This is a concise, step by step, 'hands on' guide that describes both *\r
+ * general multitasking concepts and FreeRTOS specifics. It presents and *\r
+ * explains numerous examples that are written using the FreeRTOS API. *\r
+ * Full source code for all the examples is provided in an accompanying *\r
+ * .zip file. *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+#include "FreeRTOSConfig.h"\r
+\r
+ .extern pxCurrentTCB\r
+ .extern vTaskSwitchContext\r
+ .extern vTaskIncrementTick\r
+ .extern vPortISRHandler\r
+\r
+ .global vPortStartFirstTask\r
+ .global vPortYield\r
+ .global vPortTickISR\r
+ .global vPortISRWrapper\r
+ .global vPortSaveFPURegisters\r
+ .global vPortRestoreFPURegisters\r
+\r
+.set BChainField, 0\r
+.set NextLRField, BChainField + 4\r
+.set MSRField, NextLRField + 4\r
+.set PCField, MSRField + 4\r
+.set LRField, PCField + 4\r
+.set CTRField, LRField + 4\r
+.set XERField, CTRField + 4\r
+.set CRField, XERField + 4\r
+.set USPRG0Field, CRField + 4\r
+.set r0Field, USPRG0Field + 4\r
+.set r2Field, r0Field + 4\r
+.set r3r31Field, r2Field + 4\r
+.set IFrameSize, r3r31Field + ( ( 31 - 3 ) + 1 ) * 4\r
+\r
+\r
+.macro portSAVE_STACK_POINTER_AND_LR\r
+\r
+ /* Get the address of the TCB. */\r
+ xor R0, R0, R0\r
+ addis R2, R0, pxCurrentTCB@ha\r
+ lwz R2, pxCurrentTCB@l( R2 )\r
+\r
+ /* Store the stack pointer into the TCB */\r
+ stw SP, 0( R2 )\r
+\r
+ /* Save the link register */\r
+ stwu R1, -24( R1 )\r
+ mflr R0\r
+ stw R31, 20( R1 )\r
+ stw R0, 28( R1 )\r
+ mr R31, r1\r
+\r
+.endm\r
+\r
+.macro portRESTORE_STACK_POINTER_AND_LR\r
+\r
+ /* Restore the link register */\r
+ lwz R11, 0( R1 )\r
+ lwz R0, 4( R11 )\r
+ mtlr R0\r
+ lwz R31, -4( R11 )\r
+ mr R1, R11\r
+\r
+ /* Get the address of the TCB. */\r
+ xor R0, R0, R0\r
+ addis SP, R0, pxCurrentTCB@ha\r
+ lwz SP, pxCurrentTCB@l( R1 )\r
+\r
+ /* Get the task stack pointer from the TCB. */\r
+ lwz SP, 0( SP )\r
+\r
+.endm\r
+\r
+\r
+vPortStartFirstTask:\r
+\r
+ /* Get the address of the TCB. */\r
+ xor R0, R0, R0\r
+ addis SP, R0, pxCurrentTCB@ha\r
+ lwz SP, pxCurrentTCB@l( SP )\r
+\r
+ /* Get the task stack pointer from the TCB. */\r
+ lwz SP, 0( SP )\r
+ \r
+ /* Restore MSR register to SRR1. */\r
+ lwz R0, MSRField(R1)\r
+ mtsrr1 R0\r
+ \r
+ /* Restore current PC location to SRR0. */\r
+ lwz R0, PCField(R1)\r
+ mtsrr0 R0\r
+\r
+ /* Save USPRG0 register */\r
+ lwz R0, USPRG0Field(R1)\r
+ mtspr 0x100,R0\r
+ \r
+ /* Restore Condition register */\r
+ lwz R0, CRField(R1)\r
+ mtcr R0\r
+ \r
+ /* Restore Fixed Point Exception register */\r
+ lwz R0, XERField(R1)\r
+ mtxer R0\r
+ \r
+ /* Restore Counter register */\r
+ lwz R0, CTRField(R1)\r
+ mtctr R0\r
+ \r
+ /* Restore Link register */\r
+ lwz R0, LRField(R1)\r
+ mtlr R0\r
+ \r
+ /* Restore remaining GPR registers. */\r
+ lmw R3,r3r31Field(R1)\r
+ \r
+ /* Restore r0 and r2. */\r
+ lwz R0, r0Field(R1)\r
+ lwz R2, r2Field(R1)\r
+ \r
+ /* Remove frame from stack */\r
+ addi R1,R1,IFrameSize\r
+\r
+ /* Return into the first task */\r
+ rfi\r
+\r
+\r
+\r
+vPortYield:\r
+\r
+ portSAVE_STACK_POINTER_AND_LR\r
+ bl vTaskSwitchContext\r
+ portRESTORE_STACK_POINTER_AND_LR\r
+ blr\r
+\r
+vPortTickISR:\r
+\r
+ portSAVE_STACK_POINTER_AND_LR\r
+ bl vTaskIncrementTick\r
+ \r
+ #if configUSE_PREEMPTION == 1\r
+ bl vTaskSwitchContext\r
+ #endif\r
+\r
+ /* Clear the interrupt */\r
+ lis R0, 2048\r
+ mttsr R0\r
+\r
+ portRESTORE_STACK_POINTER_AND_LR\r
+ blr\r
+\r
+vPortISRWrapper:\r
+\r
+ portSAVE_STACK_POINTER_AND_LR\r
+ bl vPortISRHandler\r
+ portRESTORE_STACK_POINTER_AND_LR\r
+ blr\r
+\r
+#if configUSE_FPU == 1\r
+\r
+vPortSaveFPURegisters:\r
+\r
+ /* Enable APU and mark FPU as present. */\r
+ mfmsr r0\r
+ xor r30, r30, r30\r
+ oris r30, r30, 512\r
+ ori r30, r30, 8192\r
+ or r0, r0, r30\r
+ mtmsr r0\r
+\r
+#ifdef USE_DP_FPU\r
+\r
+ /* Buffer address is in r3. Save each flop register into an offset from\r
+ this buffer address. */\r
+ stfd f0, 0(r3)\r
+ stfd f1, 8(r3)\r
+ stfd f2, 16(r3)\r
+ stfd f3, 24(r3)\r
+ stfd f4, 32(r3)\r
+ stfd f5, 40(r3)\r
+ stfd f6, 48(r3)\r
+ stfd f7, 56(r3)\r
+ stfd f8, 64(r3)\r
+ stfd f9, 72(r3)\r
+ stfd f10, 80(r3)\r
+ stfd f11, 88(r3)\r
+ stfd f12, 96(r3)\r
+ stfd f13, 104(r3)\r
+ stfd f14, 112(r3)\r
+ stfd f15, 120(r3)\r
+ stfd f16, 128(r3)\r
+ stfd f17, 136(r3)\r
+ stfd f18, 144(r3)\r
+ stfd f19, 152(r3)\r
+ stfd f20, 160(r3)\r
+ stfd f21, 168(r3)\r
+ stfd f22, 176(r3)\r
+ stfd f23, 184(r3)\r
+ stfd f24, 192(r3)\r
+ stfd f25, 200(r3)\r
+ stfd f26, 208(r3)\r
+ stfd f27, 216(r3)\r
+ stfd f28, 224(r3)\r
+ stfd f29, 232(r3)\r
+ stfd f30, 240(r3)\r
+ stfd f31, 248(r3) \r
+ \r
+ /* Also save the FPSCR. */\r
+ mffs f31\r
+ stfs f31, 256(r3)\r
+\r
+#else\r
+\r
+ /* Buffer address is in r3. Save each flop register into an offset from\r
+ this buffer address. */\r
+ stfs f0, 0(r3)\r
+ stfs f1, 4(r3)\r
+ stfs f2, 8(r3)\r
+ stfs f3, 12(r3)\r
+ stfs f4, 16(r3)\r
+ stfs f5, 20(r3)\r
+ stfs f6, 24(r3)\r
+ stfs f7, 28(r3)\r
+ stfs f8, 32(r3)\r
+ stfs f9, 36(r3)\r
+ stfs f10, 40(r3)\r
+ stfs f11, 44(r3)\r
+ stfs f12, 48(r3)\r
+ stfs f13, 52(r3)\r
+ stfs f14, 56(r3)\r
+ stfs f15, 60(r3)\r
+ stfs f16, 64(r3)\r
+ stfs f17, 68(r3)\r
+ stfs f18, 72(r3)\r
+ stfs f19, 76(r3)\r
+ stfs f20, 80(r3)\r
+ stfs f21, 84(r3)\r
+ stfs f22, 88(r3)\r
+ stfs f23, 92(r3)\r
+ stfs f24, 96(r3)\r
+ stfs f25, 100(r3)\r
+ stfs f26, 104(r3)\r
+ stfs f27, 108(r3)\r
+ stfs f28, 112(r3)\r
+ stfs f29, 116(r3)\r
+ stfs f30, 120(r3)\r
+ stfs f31, 124(r3)\r
+ \r
+ /* Also save the FPSCR. */\r
+ mffs f31\r
+ stfs f31, 128(r3)\r
+ \r
+#endif\r
+\r
+ blr\r
+\r
+#endif /* configUSE_FPU. */\r
+\r
+\r
+#if configUSE_FPU == 1\r
+\r
+vPortRestoreFPURegisters:\r
+\r
+ /* Enable APU and mark FPU as present. */\r
+ mfmsr r0\r
+ xor r30, r30, r30\r
+ oris r30, r30, 512\r
+ ori r30, r30, 8192\r
+ or r0, r0, r30\r
+ mtmsr r0\r
+\r
+#ifdef USE_DP_FPU\r
+\r
+ /* Buffer address is in r3. Restore each flop register from an offset\r
+ into this buffer. \r
+ \r
+ First the FPSCR. */\r
+ lfs f31, 256(r3)\r
+ mtfsf f31, 7\r
+\r
+ lfd f0, 0(r3)\r
+ lfd f1, 8(r3)\r
+ lfd f2, 16(r3)\r
+ lfd f3, 24(r3)\r
+ lfd f4, 32(r3)\r
+ lfd f5, 40(r3)\r
+ lfd f6, 48(r3)\r
+ lfd f7, 56(r3)\r
+ lfd f8, 64(r3)\r
+ lfd f9, 72(r3)\r
+ lfd f10, 80(r3)\r
+ lfd f11, 88(r3)\r
+ lfd f12, 96(r3)\r
+ lfd f13, 104(r3)\r
+ lfd f14, 112(r3)\r
+ lfd f15, 120(r3)\r
+ lfd f16, 128(r3)\r
+ lfd f17, 136(r3)\r
+ lfd f18, 144(r3)\r
+ lfd f19, 152(r3)\r
+ lfd f20, 160(r3)\r
+ lfd f21, 168(r3)\r
+ lfd f22, 176(r3)\r
+ lfd f23, 184(r3)\r
+ lfd f24, 192(r3)\r
+ lfd f25, 200(r3)\r
+ lfd f26, 208(r3)\r
+ lfd f27, 216(r3)\r
+ lfd f28, 224(r3)\r
+ lfd f29, 232(r3)\r
+ lfd f30, 240(r3)\r
+ lfd f31, 248(r3)\r
+\r
+#else\r
+\r
+ /* Buffer address is in r3. Restore each flop register from an offset\r
+ into this buffer. \r
+ \r
+ First the FPSCR. */\r
+ lfs f31, 128(r3)\r
+ mtfsf f31, 7\r
+\r
+ lfs f0, 0(r3)\r
+ lfs f1, 4(r3)\r
+ lfs f2, 8(r3)\r
+ lfs f3, 12(r3)\r
+ lfs f4, 16(r3)\r
+ lfs f5, 20(r3)\r
+ lfs f6, 24(r3)\r
+ lfs f7, 28(r3)\r
+ lfs f8, 32(r3)\r
+ lfs f9, 36(r3)\r
+ lfs f10, 40(r3)\r
+ lfs f11, 44(r3)\r
+ lfs f12, 48(r3)\r
+ lfs f13, 52(r3)\r
+ lfs f14, 56(r3)\r
+ lfs f15, 60(r3)\r
+ lfs f16, 64(r3)\r
+ lfs f17, 68(r3)\r
+ lfs f18, 72(r3)\r
+ lfs f19, 76(r3)\r
+ lfs f20, 80(r3)\r
+ lfs f21, 84(r3)\r
+ lfs f22, 88(r3)\r
+ lfs f23, 92(r3)\r
+ lfs f24, 96(r3)\r
+ lfs f25, 100(r3)\r
+ lfs f26, 104(r3)\r
+ lfs f27, 108(r3)\r
+ lfs f28, 112(r3)\r
+ lfs f29, 116(r3)\r
+ lfs f30, 120(r3)\r
+ lfs f31, 124(r3)\r
+\r
+#endif\r
+\r
+ blr\r
+\r
+#endif /* configUSE_FPU. */\r
+\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS.org V5.3.1 - Copyright (C) 2003-2009 Richard Barry.\r
+\r
+ This file is part of the FreeRTOS.org distribution.\r
+\r
+ FreeRTOS.org is free software; you can redistribute it and/or modify it\r
+ under the terms of the GNU General Public License (version 2) as published\r
+ by the Free Software Foundation and modified by the FreeRTOS exception.\r
+ **NOTE** The exception to the GPL is included to allow you to distribute a\r
+ combined work that includes FreeRTOS.org without being obliged to provide\r
+ the source code for any proprietary components. Alternative commercial\r
+ license and support terms are also available upon request. See the \r
+ licensing section of http://www.FreeRTOS.org for full details.\r
+\r
+ FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details.\r
+\r
+ You should have received a copy of the GNU General Public License along\r
+ with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59\r
+ Temple Place, Suite 330, Boston, MA 02111-1307 USA.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * This is a concise, step by step, 'hands on' guide that describes both *\r
+ * general multitasking concepts and FreeRTOS specifics. It presents and *\r
+ * explains numerous examples that are written using the FreeRTOS API. *\r
+ * Full source code for all the examples is provided in an accompanying *\r
+ * .zip file. *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ Please ensure to read the configuration and relevant port sections of the\r
+ online documentation.\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+#ifndef PORTMACRO_H\r
+#define PORTMACRO_H\r
+\r
+#include "xexception_l.h"\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/*-----------------------------------------------------------\r
+ * Port specific definitions. \r
+ *\r
+ * The settings in this file configure FreeRTOS correctly for the\r
+ * given hardware and compiler.\r
+ *\r
+ * These settings should not be altered.\r
+ *-----------------------------------------------------------\r
+ */\r
+\r
+/* Type definitions. */\r
+#define portCHAR char\r
+#define portFLOAT float\r
+#define portDOUBLE double\r
+#define portLONG long\r
+#define portSHORT short\r
+#define portSTACK_TYPE unsigned portLONG\r
+#define portBASE_TYPE portLONG\r
+\r
+#if( configUSE_16_BIT_TICKS == 1 )\r
+ typedef unsigned portSHORT portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffff\r
+#else\r
+ typedef unsigned portLONG portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+#endif\r
+/*-----------------------------------------------------------*/ \r
+\r
+/* This port uses the critical nesting count from the TCB rather than\r
+maintaining a separate value and then saving this value in the task stack. */\r
+#define portCRITICAL_NESTING_IN_TCB 1\r
+\r
+/* Interrupt control macros. */\r
+#define portDISABLE_INTERRUPTS() XExc_mDisableExceptions( XEXC_NON_CRITICAL );\r
+#define portENABLE_INTERRUPTS() XExc_mEnableExceptions( XEXC_NON_CRITICAL );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Critical section macros. */\r
+void vTaskEnterCritical( void );\r
+void vTaskExitCritical( void );\r
+#define portENTER_CRITICAL() vTaskEnterCritical()\r
+#define portEXIT_CRITICAL() vTaskExitCritical()\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task utilities. */\r
+void vPortYield( void );\r
+#define portYIELD() asm volatile ( "SC \n\t NOP" )\r
+#define portYIELD_FROM_ISR() vTaskSwitchContext()\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Hardware specifics. */\r
+#define portBYTE_ALIGNMENT 8\r
+#define portSTACK_GROWTH ( -1 )\r
+#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portNOP() asm volatile ( "NOP" )\r
+\r
+/* There are 32 * 32bit floating point regieters, plus the FPSCR to save. */\r
+#define portNO_FLOP_REGISTERS_TO_SAVE ( 32 + 1 )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task function macros as described on the FreeRTOS.org WEB site. */\r
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+\r
+/* Port specific interrupt handling functions. */\r
+void vPortSetupInterruptController( void );\r
+portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* PORTMACRO_H */\r
+\r
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