Update MSP430X IAR port to ensure the power settings are correct for the clock speed.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1706 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/Demo/MSP430X_MSP430F5438_IAR/F5XX_6XX_Core_Lib/HAL_PMM.c b/Demo/MSP430X_MSP430F5438_IAR/F5XX_6XX_Core_Lib/HAL_PMM.c
new file mode 100644 (file)
index 0000000..7e16eae
--- /dev/null
+++ b/Demo/MSP430X_MSP430F5438_IAR/F5XX_6XX_Core_Lib/HAL_PMM.c
@@ -0,0 +1,248 @@
+/*******************************************************************************\r
+ *\r
+ * HAL_PMM.c\r
+ * Power Management Module Library for MSP430F5xx/6xx family\r
+ *\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/\r
+ *\r
+ *\r
+ *  Redistribution and use in source and binary forms, with or without\r
+ *  modification, are permitted provided that the following conditions\r
+ *  are met:\r
+ *\r
+ *    Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ *\r
+ *    Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the\r
+ *    distribution.\r
+ *\r
+ *    Neither the name of Texas Instruments Incorporated nor the names of\r
+ *    its contributors may be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ ******************************************************************************/\r
+\r
+#include "msp430.h"\r
+#include "HAL_PMM.h"\r
+\r
+/*******************************************************************************\r
+ * \brief   Increase Vcore by one level\r
+ *\r
+ * \param level     Level to which Vcore needs to be increased\r
+ * \return status   Success/failure\r
+ ******************************************************************************/\r
+\r
+static uint16_t SetVCoreUp(uint8_t level)\r
+{\r
+    uint16_t PMMRIE_backup, SVSMHCTL_backup, SVSMLCTL_backup;\r
+\r
+    // The code flow for increasing the Vcore has been altered to work around\r
+    // the erratum FLASH37.\r
+    // Please refer to the Errata sheet to know if a specific device is affected\r
+    // DO NOT ALTER THIS FUNCTION\r
+\r
+    // Open PMM registers for write access\r
+    PMMCTL0_H = 0xA5;\r
+\r
+    // Disable dedicated Interrupts\r
+    // Backup all registers\r
+    PMMRIE_backup = PMMRIE;\r
+    PMMRIE &= ~(SVMHVLRPE | SVSHPE | SVMLVLRPE | SVSLPE | SVMHVLRIE |\r
+                SVMHIE | SVSMHDLYIE | SVMLVLRIE | SVMLIE | SVSMLDLYIE);\r
+    SVSMHCTL_backup = SVSMHCTL;\r
+    SVSMLCTL_backup = SVSMLCTL;\r
+\r
+    // Clear flags\r
+    PMMIFG = 0;\r
+\r
+    // Set SVM highside to new level and check if a VCore increase is possible\r
+    SVSMHCTL = SVMHE | SVSHE | (SVSMHRRL0 * level);\r
+\r
+    // Wait until SVM highside is settled\r
+    while ((PMMIFG & SVSMHDLYIFG) == 0) ;\r
+\r
+    // Clear flag\r
+    PMMIFG &= ~SVSMHDLYIFG;\r
+\r
+    // Check if a VCore increase is possible\r
+    if ((PMMIFG & SVMHIFG) == SVMHIFG){     // -> Vcc is too low for a Vcore increase\r
+        // recover the previous settings\r
+        PMMIFG &= ~SVSMHDLYIFG;\r
+        SVSMHCTL = SVSMHCTL_backup;\r
+\r
+        // Wait until SVM highside is settled\r
+        while ((PMMIFG & SVSMHDLYIFG) == 0) ;\r
+\r
+        // Clear all Flags\r
+        PMMIFG &= ~(SVMHVLRIFG | SVMHIFG | SVSMHDLYIFG | SVMLVLRIFG | SVMLIFG | SVSMLDLYIFG);\r
+\r
+        PMMRIE = PMMRIE_backup;             // Restore PMM interrupt enable register\r
+        PMMCTL0_H = 0x00;                   // Lock PMM registers for write access\r
+        return PMM_STATUS_ERROR;            // return: voltage not set\r
+    }\r
+\r
+    // Set also SVS highside to new level\r
+    // Vcc is high enough for a Vcore increase\r
+    SVSMHCTL |= (SVSHRVL0 * level);\r
+\r
+    // Wait until SVM highside is settled\r
+    while ((PMMIFG & SVSMHDLYIFG) == 0) ;\r
+\r
+    // Clear flag\r
+    PMMIFG &= ~SVSMHDLYIFG;\r
+\r
+    // Set VCore to new level\r
+    PMMCTL0_L = PMMCOREV0 * level;\r
+\r
+    // Set SVM, SVS low side to new level\r
+    SVSMLCTL = SVMLE | (SVSMLRRL0 * level) | SVSLE | (SVSLRVL0 * level);\r
+\r
+    // Wait until SVM, SVS low side is settled\r
+    while ((PMMIFG & SVSMLDLYIFG) == 0) ;\r
+\r
+    // Clear flag\r
+    PMMIFG &= ~SVSMLDLYIFG;\r
+    // SVS, SVM core and high side are now set to protect for the new core level\r
+\r
+    // Restore Low side settings\r
+    // Clear all other bits _except_ level settings\r
+    SVSMLCTL &= (SVSLRVL0 + SVSLRVL1 + SVSMLRRL0 + SVSMLRRL1 + SVSMLRRL2);\r
+\r
+    // Clear level settings in the backup register,keep all other bits\r
+    SVSMLCTL_backup &= ~(SVSLRVL0 + SVSLRVL1 + SVSMLRRL0 + SVSMLRRL1 + SVSMLRRL2);\r
+\r
+    // Restore low-side SVS monitor settings\r
+    SVSMLCTL |= SVSMLCTL_backup;\r
+\r
+    // Restore High side settings\r
+    // Clear all other bits except level settings\r
+    SVSMHCTL &= (SVSHRVL0 + SVSHRVL1 + SVSMHRRL0 + SVSMHRRL1 + SVSMHRRL2);\r
+\r
+    // Clear level settings in the backup register,keep all other bits\r
+    SVSMHCTL_backup &= ~(SVSHRVL0 + SVSHRVL1 + SVSMHRRL0 + SVSMHRRL1 + SVSMHRRL2);\r
+\r
+    // Restore backup\r
+    SVSMHCTL |= SVSMHCTL_backup;\r
+\r
+    // Wait until high side, low side settled\r
+    while (((PMMIFG & SVSMLDLYIFG) == 0) && ((PMMIFG & SVSMHDLYIFG) == 0)) ;\r
+\r
+    // Clear all Flags\r
+    PMMIFG &= ~(SVMHVLRIFG | SVMHIFG | SVSMHDLYIFG | SVMLVLRIFG | SVMLIFG | SVSMLDLYIFG);\r
+\r
+    PMMRIE = PMMRIE_backup;                 // Restore PMM interrupt enable register\r
+    PMMCTL0_H = 0x00;                       // Lock PMM registers for write access\r
+\r
+    return PMM_STATUS_OK;\r
+}\r
+\r
+/*******************************************************************************\r
+ * \brief  Decrease Vcore by one level\r
+ *\r
+ * \param  level    Level to which Vcore needs to be decreased\r
+ * \return status   Success/failure\r
+ ******************************************************************************/\r
+\r
+static uint16_t SetVCoreDown(uint8_t level)\r
+{\r
+    uint16_t PMMRIE_backup, SVSMHCTL_backup, SVSMLCTL_backup;\r
+\r
+    // The code flow for decreasing the Vcore has been altered to work around\r
+    // the erratum FLASH37.\r
+    // Please refer to the Errata sheet to know if a specific device is affected\r
+    // DO NOT ALTER THIS FUNCTION\r
+\r
+    // Open PMM registers for write access\r
+    PMMCTL0_H = 0xA5;\r
+\r
+    // Disable dedicated Interrupts\r
+    // Backup all registers\r
+    PMMRIE_backup = PMMRIE;\r
+    PMMRIE &= ~(SVMHVLRPE | SVSHPE | SVMLVLRPE | SVSLPE | SVMHVLRIE |\r
+                SVMHIE | SVSMHDLYIE | SVMLVLRIE | SVMLIE | SVSMLDLYIE);\r
+    SVSMHCTL_backup = SVSMHCTL;\r
+    SVSMLCTL_backup = SVSMLCTL;\r
+\r
+    // Clear flags\r
+    PMMIFG &= ~(SVMHIFG | SVSMHDLYIFG | SVMLIFG | SVSMLDLYIFG);\r
+\r
+    // Set SVM, SVS high & low side to new settings in normal mode\r
+    SVSMHCTL = SVMHE | (SVSMHRRL0 * level) | SVSHE | (SVSHRVL0 * level);\r
+    SVSMLCTL = SVMLE | (SVSMLRRL0 * level) | SVSLE | (SVSLRVL0 * level);\r
+\r
+    // Wait until SVM high side and SVM low side is settled\r
+    while ((PMMIFG & SVSMHDLYIFG) == 0 || (PMMIFG & SVSMLDLYIFG) == 0) ;\r
+\r
+    // Clear flags\r
+    PMMIFG &= ~(SVSMHDLYIFG + SVSMLDLYIFG);\r
+    // SVS, SVM core and high side are now set to protect for the new core level\r
+\r
+    // Set VCore to new level\r
+    PMMCTL0_L = PMMCOREV0 * level;\r
+\r
+    // Restore Low side settings\r
+    // Clear all other bits _except_ level settings\r
+    SVSMLCTL &= (SVSLRVL0 + SVSLRVL1 + SVSMLRRL0 + SVSMLRRL1 + SVSMLRRL2);\r
+\r
+    // Clear level settings in the backup register,keep all other bits\r
+    SVSMLCTL_backup &= ~(SVSLRVL0 + SVSLRVL1 + SVSMLRRL0 + SVSMLRRL1 + SVSMLRRL2);\r
+\r
+    // Restore low-side SVS monitor settings\r
+    SVSMLCTL |= SVSMLCTL_backup;\r
+\r
+    // Restore High side settings\r
+    // Clear all other bits except level settings\r
+    SVSMHCTL &= (SVSHRVL0 + SVSHRVL1 + SVSMHRRL0 + SVSMHRRL1 + SVSMHRRL2);\r
+\r
+    // Clear level settings in the backup register, keep all other bits\r
+    SVSMHCTL_backup &= ~(SVSHRVL0 + SVSHRVL1 + SVSMHRRL0 + SVSMHRRL1 + SVSMHRRL2);\r
+\r
+    // Restore backup\r
+    SVSMHCTL |= SVSMHCTL_backup;\r
+\r
+    // Wait until high side, low side settled\r
+    while (((PMMIFG & SVSMLDLYIFG) == 0) && ((PMMIFG & SVSMHDLYIFG) == 0)) ;\r
+\r
+    // Clear all Flags\r
+    PMMIFG &= ~(SVMHVLRIFG | SVMHIFG | SVSMHDLYIFG | SVMLVLRIFG | SVMLIFG | SVSMLDLYIFG);\r
+\r
+    PMMRIE = PMMRIE_backup;                // Restore PMM interrupt enable register\r
+    PMMCTL0_H = 0x00;                      // Lock PMM registers for write access\r
+    return PMM_STATUS_OK;                  // Return: OK\r
+}\r
+\r
+uint16_t SetVCore(uint8_t level)\r
+{\r
+    uint16_t actlevel;\r
+    uint16_t status = 0;\r
+\r
+    level &= PMMCOREV_3;                   // Set Mask for Max. level\r
+    actlevel = (PMMCTL0 & PMMCOREV_3);     // Get actual VCore\r
+                                           // step by step increase or decrease\r
+    while ((level != actlevel) && (status == 0)) {\r
+        if (level > actlevel){\r
+            status = SetVCoreUp(++actlevel);\r
+        }\r
+        else {\r
+            status = SetVCoreDown(--actlevel);\r
+        }\r
+    }\r
+\r
+    return status;\r
+}\r
+\r

diff --git a/Demo/MSP430X_MSP430F5438_IAR/F5XX_6XX_Core_Lib/HAL_PMM.h b/Demo/MSP430X_MSP430F5438_IAR/F5XX_6XX_Core_Lib/HAL_PMM.h
new file mode 100644 (file)
index 0000000..ace1641
--- /dev/null
+++ b/Demo/MSP430X_MSP430F5438_IAR/F5XX_6XX_Core_Lib/HAL_PMM.h
@@ -0,0 +1,113 @@
+/*******************************************************************************\r
+ *\r
+ * HAL_PMM.h\r
+ * Power Management Module Library for MSP430F5xx/6xx family\r
+ *\r
+ *\r
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/\r
+ *\r
+ *\r
+ *  Redistribution and use in source and binary forms, with or without\r
+ *  modification, are permitted provided that the following conditions\r
+ *  are met:\r
+ *\r
+ *    Redistributions of source code must retain the above copyright\r
+ *    notice, this list of conditions and the following disclaimer.\r
+ *\r
+ *    Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the\r
+ *    documentation and/or other materials provided with the\r
+ *    distribution.\r
+ *\r
+ *    Neither the name of Texas Instruments Incorporated nor the names of\r
+ *    its contributors may be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ ******************************************************************************/\r
+\r
+#ifndef HAL_PMM_H\r
+#define HAL_PMM_H\r
+\r
+#include <stdint.h>\r
+#include "HAL_MACROS.h"\r
+\r
+/*******************************************************************************\r
+ * Macros\r
+ ******************************************************************************/\r
+#define ENABLE_SVSL()        st(PMMCTL0_H = 0xA5; SVSMLCTL |= SVSLE; PMMCTL0_H = 0x00; )\r
+#define DISABLE_SVSL()       st(PMMCTL0_H = 0xA5; SVSMLCTL &= ~SVSLE; PMMCTL0_H = 0x00; )\r
+#define ENABLE_SVML()        st(PMMCTL0_H = 0xA5; SVSMLCTL |= SVMLE; PMMCTL0_H = 0x00; )\r
+#define DISABLE_SVML()       st(PMMCTL0_H = 0xA5; SVSMLCTL &= ~SVMLE; PMMCTL0_H = 0x00; )\r
+#define ENABLE_SVSH()        st(PMMCTL0_H = 0xA5; SVSMHCTL |= SVSHE; PMMCTL0_H = 0x00; )\r
+#define DISABLE_SVSH()       st(PMMCTL0_H = 0xA5; SVSMHCTL &= ~SVSHE; PMMCTL0_H = 0x00; )\r
+#define ENABLE_SVMH()        st(PMMCTL0_H = 0xA5; SVSMHCTL |= SVMHE; PMMCTL0_H = 0x00; )\r
+#define DISABLE_SVMH()       st(PMMCTL0_H = 0xA5; SVSMHCTL &= ~SVMHE; PMMCTL0_H = 0x00; )\r
+#define ENABLE_SVSL_SVML()   st(PMMCTL0_H = 0xA5; SVSMLCTL |= (SVSLE + SVMLE); PMMCTL0_H = 0x00; )\r
+#define DISABLE_SVSL_SVML()  st(PMMCTL0_H = 0xA5; SVSMLCTL &= ~(SVSLE + SVMLE); PMMCTL0_H = 0x00; )\r
+#define ENABLE_SVSH_SVMH()   st(PMMCTL0_H = 0xA5; SVSMHCTL |= (SVSHE + SVMHE); PMMCTL0_H = 0x00; )\r
+#define DISABLE_SVSH_SVMH()  st(PMMCTL0_H = 0xA5; SVSMHCTL &= ~(SVSHE + SVMHE); PMMCTL0_H = 0x00; )\r
+\r
+#define ENABLE_SVSL_RESET()       st(PMMCTL0_H = 0xA5; PMMRIE |= SVSLPE; PMMCTL0_H = 0x00; )\r
+#define DISABLE_SVSL_RESET()      st(PMMCTL0_H = 0xA5; PMMRIE &= ~SVSLPE; PMMCTL0_H = 0x00; )\r
+#define ENABLE_SVML_INTERRUPT()   st(PMMCTL0_H = 0xA5; PMMRIE |= SVMLIE; PMMCTL0_H = 0x00; )\r
+#define DISABLE_SVML_INTERRUPT()  st(PMMCTL0_H = 0xA5; PMMRIE &= ~SVMLIE; PMMCTL0_H = 0x00; )\r
+#define ENABLE_SVSH_RESET()       st(PMMCTL0_H = 0xA5; PMMRIE |= SVSHPE; PMMCTL0_H = 0x00; )\r
+#define DISABLE_SVSH_RESET()      st(PMMCTL0_H = 0xA5; PMMRIE &= ~SVSHPE; PMMCTL0_H = 0x00; )\r
+#define ENABLE_SVMH_INTERRUPT()   st(PMMCTL0_H = 0xA5; PMMRIE |= SVMHIE; PMMCTL0_H = 0x00; )\r
+#define DISABLE_SVMH_INTERRUPT()  st(PMMCTL0_H = 0xA5; PMMRIE &= ~SVMHIE; PMMCTL0_H = 0x00; )\r
+#define CLEAR_PMM_IFGS()          st(PMMCTL0_H = 0xA5; PMMIFG = 0; PMMCTL0_H = 0x00; )\r
+\r
+// These settings use SVSH/LACE = 0\r
+#define SVSL_ENABLED_IN_LPM_FAST_WAKE()  st( \\r
+        PMMCTL0_H = 0xA5; SVSMLCTL |= (SVSLFP + SVSLMD); SVSMLCTL &= ~SVSMLACE; PMMCTL0_H = 0x00; )\r
+#define SVSL_ENABLED_IN_LPM_SLOW_WAKE()  st(PMMCTL0_H = 0xA5; SVSMLCTL |= SVSLMD; SVSMLCTL &= \\r
+                                                ~(SVSLFP + SVSMLACE); PMMCTL0_H = 0x00; )\r
+\r
+#define SVSL_DISABLED_IN_LPM_FAST_WAKE() st(PMMCTL0_H = 0xA5; SVSMLCTL |= SVSLFP; SVSMLCTL &= \\r
+                                                ~(SVSLMD + SVSMLACE); PMMCTL0_H = 0x00; )\r
+#define SVSL_DISABLED_IN_LPM_SLOW_WAKE() st(PMMCTL0_H = 0xA5; SVSMLCTL &= \\r
+                                                ~(SVSLFP + SVSMLACE + SVSLMD); PMMCTL0_H = 0x00; )\r
+\r
+#define SVSH_ENABLED_IN_LPM_NORM_PERF()  st(PMMCTL0_H = 0xA5; SVSMHCTL |= SVSHMD; SVSMHCTL &= \\r
+                                                ~(SVSMHACE + SVSHFP); PMMCTL0_H = 0x00; )\r
+#define SVSH_ENABLED_IN_LPM_FULL_PERF()  st( \\r
+        PMMCTL0_H = 0xA5; SVSMHCTL |= (SVSHMD + SVSHFP); SVSMHCTL &= ~SVSMHACE; PMMCTL0_H = 0x00; )\r
+\r
+#define SVSH_DISABLED_IN_LPM_NORM_PERF() st(PMMCTL0_H = 0xA5; SVSMHCTL &= \\r
+                                                ~(SVSMHACE + SVSHFP + SVSHMD); PMMCTL0_H = 0x00; )\r
+#define SVSH_DISABLED_IN_LPM_FULL_PERF() st(PMMCTL0_H = 0xA5; SVSMHCTL |= SVSHFP; SVSMHCTL &= \\r
+                                                ~(SVSMHACE + SVSHMD); PMMCTL0_H = 0x00; )\r
+\r
+// These setting use SVSH/LACE = 1\r
+#define SVSL_OPTIMIZED_IN_LPM_FAST_WAKE() st(PMMCTL0_H = 0xA5; SVSMLCTL |= \\r
+                                                 (SVSLFP + SVSLMD + SVSMLACE); PMMCTL0_H = 0x00; )\r
+#define SVSH_OPTIMIZED_IN_LPM_FULL_PERF() st(PMMCTL0_H = 0xA5; SVSMHCTL |= \\r
+                                                 (SVSHMD + SVSHFP + SVSMHACE); PMMCTL0_H = 0x00; )\r
+\r
+/*******************************************************************************\r
+ * Defines\r
+ ******************************************************************************/\r
+#define PMM_STATUS_OK     0\r
+#define PMM_STATUS_ERROR  1\r
+\r
+/*******************************************************************************\r
+ * \brief   Set Vcore to expected level\r
+ *\r
+ * \param level     Level to which Vcore needs to be increased/decreased\r
+ * \return status   Success/failure\r
+ ******************************************************************************/\r
+extern uint16_t SetVCore(uint8_t level);\r
+\r
+#endif /* HAL_PMM_H */\r

diff --git a/Demo/MSP430X_MSP430F5438_IAR/FreeRTOSConfig.h b/Demo/MSP430X_MSP430F5438_IAR/FreeRTOSConfig.h
index fd2db001de7aa8434b85b275c03f74a31d951fbe..704d4fe03cb498492e36333940fce3b2a1372914 100644 (file)
--- a/Demo/MSP430X_MSP430F5438_IAR/FreeRTOSConfig.h
+++ b/Demo/MSP430X_MSP430F5438_IAR/FreeRTOSConfig.h
@@ -1,6 +1,6 @@
 /*\r
     FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
-       \r
+\r
 \r
     ***************************************************************************\r
      *                                                                       *\r
@@ -69,7 +69,8 @@
 #define configUSE_PREEMPTION                   1\r
 #define configUSE_IDLE_HOOK                            1\r
 #define configUSE_TICK_HOOK                            1\r
-#define configCPU_CLOCK_HZ                             ( 25000000UL )  \r
+#define configCPU_CLOCK_HZ                             ( 25000000UL )\r
+#define configLFXT_CLOCK_HZ                    ( 32768L )\r
 #define configTICK_RATE_HZ                             ( ( portTickType ) 1000 )\r
 #define configMAX_PRIORITIES                   ( ( unsigned portBASE_TYPE ) 5 )\r
 #define configTOTAL_HEAP_SIZE                  ( ( size_t ) ( 10 * 1024 ) )\r
@@ -125,7 +126,7 @@ The timer is configured to interrupt each time it overflows so a count of
 overflows can be kept - that way a 32 bit time value can be constructed from\r
 the timers current count value and the number of overflows. */\r
 #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() vConfigureTimerForRunTimeStats()\r
-       \r
+\r
 /* Construct a 32 bit time value for use as the run time stats time base.  This\r
 comes from the current value of a 16 bit timer combined with the number of times\r
 the timer has overflowed. */\r

diff --git a/Demo/MSP430X_MSP430F5438_IAR/MSP-EXP430F5438_HAL/hal_MSP-EXP430F5438.h b/Demo/MSP430X_MSP430F5438_IAR/MSP-EXP430F5438_HAL/hal_MSP-EXP430F5438.h
index c1baa94ff38178d8ddef88fd8c10faf2de8cdee3..6d97edac0cc417517d50c19d0ed32be9bb5a884b 100644 (file)
--- a/Demo/MSP430X_MSP430F5438_IAR/MSP-EXP430F5438_HAL/hal_MSP-EXP430F5438.h
+++ b/Demo/MSP430X_MSP430F5438_IAR/MSP-EXP430F5438_HAL/hal_MSP-EXP430F5438.h
@@ -23,5 +23,6 @@ in order to use MSP-EXP430F5438 HAL.
 //#include "hal_rf.h"\r
 //#include "hal_rtc.h"\r
 //#include "hal_tlv.h"\r
+#include "hal_pmm.h"\r
 \r
 #endif /* HAL_MSP_EXP430F5438_H */\r

diff --git a/Demo/MSP430X_MSP430F5438_IAR/MSP-EXP430F5438_HAL/hal_board.c b/Demo/MSP430X_MSP430F5438_IAR/MSP-EXP430F5438_HAL/hal_board.c
index f44d7409a09d6a845bee99d65a46bf3e0c2f9b07..444741ab7ea7c3bfcbb4d11f7ebc6643a07589c2 100644 (file)
--- a/Demo/MSP430X_MSP430F5438_IAR/MSP-EXP430F5438_HAL/hal_board.c
+++ b/Demo/MSP430X_MSP430F5438_IAR/MSP-EXP430F5438_HAL/hal_board.c
@@ -66,3 +66,43 @@ void halBoardInit(void)
   PJDIR  = 0xFF;\r
   P11SEL = 0;\r
 }\r
+\r
+/**********************************************************************//**\r
+ * @brief  Set function for MCLK frequency.\r
+ *\r
+ *\r
+ * @return none\r
+ *************************************************************************/\r
+void hal430SetSystemClock(unsigned long req_clock_rate, unsigned long ref_clock_rate)\r
+{\r
+  /* Convert a Hz value to a KHz value, as required\r
+   *  by the Init_FLL_Settle() function. */\r
+  unsigned long ulCPU_Clock_KHz = req_clock_rate / 1000UL;\r
+\r
+  //Make sure we aren't overclocking\r
+  if(ulCPU_Clock_KHz > 25000L)\r
+  {\r
+    ulCPU_Clock_KHz = 25000L;\r
+  }\r
+\r
+  //Set VCore to a level sufficient for the requested clock speed.\r
+  if(ulCPU_Clock_KHz <= 8000L)\r
+  {\r
+    SetVCore(PMMCOREV_0);\r
+  }\r
+  else if(ulCPU_Clock_KHz <= 12000L)\r
+  {\r
+    SetVCore(PMMCOREV_1);\r
+  }\r
+  else if(ulCPU_Clock_KHz <= 20000L)\r
+  {\r
+    SetVCore(PMMCOREV_2);\r
+  }\r
+  else\r
+  {\r
+    SetVCore(PMMCOREV_3);\r
+  }\r
+\r
+  //Set the DCO\r
+  Init_FLL_Settle( ( unsigned short )ulCPU_Clock_KHz, req_clock_rate / ref_clock_rate );\r
+}\r

diff --git a/Demo/MSP430X_MSP430F5438_IAR/MSP-EXP430F5438_HAL/hal_board.h b/Demo/MSP430X_MSP430F5438_IAR/MSP-EXP430F5438_HAL/hal_board.h
index 603c728362ce068ee9d1340b44a0ed085bd2149b..c4fe6318de56c09992fab53744f918100ef7d943 100644 (file)
--- a/Demo/MSP430X_MSP430F5438_IAR/MSP-EXP430F5438_HAL/hal_board.h
+++ b/Demo/MSP430X_MSP430F5438_IAR/MSP-EXP430F5438_HAL/hal_board.h
@@ -27,5 +27,6 @@ static void halBoardGetSystemClockSettings(unsigned char systemClockSpeed,
 extern void halBoardOutputSystemClock(void);\r
 extern void halBoardStopOutputSystemClock(void);\r
 extern void halBoardInit(void);\r
+void hal430SetSystemClock(unsigned long req_clock_rate, unsigned long ref_clock_rate);\r
 \r
 #endif /* HAL_BOARD_H */\r

diff --git a/Demo/MSP430X_MSP430F5438_IAR/RTOSDemo.ewp b/Demo/MSP430X_MSP430F5438_IAR/RTOSDemo.ewp
index 76af4b41fc24917da27fdfa5757aaba342123a92..8ec55d85596f8711370d94a6537b4ad9d452aaa8 100644 (file)
--- a/Demo/MSP430X_MSP430F5438_IAR/RTOSDemo.ewp
+++ b/Demo/MSP430X_MSP430F5438_IAR/RTOSDemo.ewp
@@ -3796,6 +3796,9 @@
   </configuration>\r
   <group>\r
     <name>F5XX_6XX_Core_Lib</name>\r
+    <file>\r
+      <name>$PROJ_DIR$\F5XX_6XX_Core_Lib\HAL_PMM.c</name>\r
+    </file>\r
     <file>\r
       <name>$PROJ_DIR$\F5XX_6XX_Core_Lib\hal_UCS.c</name>\r
     </file>\r

diff --git a/Demo/MSP430X_MSP430F5438_IAR/main.c b/Demo/MSP430X_MSP430F5438_IAR/main.c
index b7122effa80eefccab897d99060f51d031ee7333..9577a4395f0f12f936c9cb3b948525b48ed3ab23 100644 (file)
--- a/Demo/MSP430X_MSP430F5438_IAR/main.c
+++ b/Demo/MSP430X_MSP430F5438_IAR/main.c
@@ -443,14 +443,10 @@ xQueueMessage xMessage;
 \r
 static void prvSetupHardware( void )\r
 {\r
-/* Convert a Hz value to a KHz value, as required by the Init_FLL_Settle()\r
-function. */\r
-unsigned long ulCPU_Clock_KHz = ( configCPU_CLOCK_HZ / 1000UL );\r
-\r
        halBoardInit();\r
 \r
        LFXT_Start( XT1DRIVE_0 );\r
-       Init_FLL_Settle( ( unsigned short ) ulCPU_Clock_KHz, 488 );\r
+       hal430SetSystemClock( configCPU_CLOCK_HZ, configLFXT_CLOCK_HZ );\r
 \r
        halButtonsInit( BUTTON_ALL );\r
        halButtonsInterruptEnable( BUTTON_SELECT );\r

diff --git a/Demo/MSP430X_MSP430F5438_IAR/settings/RTOSDemo.dbgdt b/Demo/MSP430X_MSP430F5438_IAR/settings/RTOSDemo.dbgdt
index 46edd8ae772871b65fc2078fb375f1a10da6dda3..beeea5c3566a308c5a4a61fbcf75b67c369fe291 100644 (file)
--- a/Demo/MSP430X_MSP430F5438_IAR/settings/RTOSDemo.dbgdt
+++ b/Demo/MSP430X_MSP430F5438_IAR/settings/RTOSDemo.dbgdt
@@ -31,7 +31,7 @@
       \r
       \r
       \r
-    <Wnd3>\r
+    <Wnd0>\r
         <Tabs>\r
           <Tab>\r
             <Identity>TabID-11539-27703</Identity>\r
@@ -43,20 +43,20 @@
           </Tab>\r
         </Tabs>\r
         \r
-      <SelectedTab>0</SelectedTab></Wnd3><Wnd4><Tabs><Tab><Identity>TabID-25774-15685</Identity><TabName>Terminal I/O</TabName><Factory>TerminalIO</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd4><Wnd5><Tabs><Tab><Identity>TabID-408-3295</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd5></Windows>\r
+      <SelectedTab>0</SelectedTab></Wnd0><Wnd1><Tabs><Tab><Identity>TabID-25774-15685</Identity><TabName>Terminal I/O</TabName><Factory>TerminalIO</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd1><Wnd2><Tabs><Tab><Identity>TabID-408-3295</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd2></Windows>\r
     <Editor>\r
       \r
       \r
       \r
       \r
-    <Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\main.c</Filename><XPos>0</XPos><YPos>230</YPos><SelStart>12197</SelStart><SelEnd>12197</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\..\Source\portable\IAR\MSP430X\portext.s43</Filename><XPos>0</XPos><YPos>92</YPos><SelStart>4402</SelStart><SelEnd>4402</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\..\Source\tasks.c</Filename><XPos>0</XPos><YPos>1615</YPos><SelStart>51325</SelStart><SelEnd>51325</SelEnd></Tab><ActiveTab>2</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>\r
+    <Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\main.c</Filename><XPos>0</XPos><YPos>425</YPos><SelStart>19939</SelStart><SelEnd>19939</SelEnd></Tab><ActiveTab>0</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>\r
     <Positions>\r
       \r
       \r
       \r
       \r
       \r
-    <Top><Row0><Sizes><Toolbar-012aad60><key>iaridepm.enu1</key></Toolbar-012aad60><Toolbar-0bfe1790><key>430fet1</key></Toolbar-0bfe1790></Sizes></Row0><Row1><Sizes><Toolbar-0908f838><key>debuggergui.enu1</key></Toolbar-0908f838></Sizes></Row1><Row2><Sizes/></Row2></Top><Left><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>716</Bottom><Right>259</Right><x>-2</x><y>-2</y><xscreen>121</xscreen><yscreen>150</yscreen><sizeHorzCX>72024</sizeHorzCX><sizeHorzCY>152749</sizeHorzCY><sizeVertCX>155357</sizeVertCX><sizeVertCY>731161</sizeVertCY></Rect></Wnd3></Sizes></Row0></Left><Right><Row0><Sizes><Wnd4><Rect><Top>-2</Top><Left>-2</Left><Bottom>716</Bottom><Right>514</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>119048</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>307143</sizeVertCX><sizeVertCY>731161</sizeVertCY></Rect></Wnd4></Sizes></Row0></Right><Bottom><Row0><Sizes><Wnd5><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1682</Right><x>-2</x><y>-2</y><xscreen>1684</xscreen><yscreen>200</yscreen><sizeHorzCX>1002381</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>119048</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd5></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>\r
+    <Top><Row0><Sizes><Toolbar-01349480><key>iaridepm.enu1</key></Toolbar-01349480><Toolbar-053ff260><key>430fet1</key></Toolbar-053ff260></Sizes></Row0><Row1><Sizes><Toolbar-05b3fdc8><key>debuggergui.enu1</key></Toolbar-05b3fdc8></Sizes></Row1></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>716</Bottom><Right>259</Right><x>-2</x><y>-2</y><xscreen>121</xscreen><yscreen>150</yscreen><sizeHorzCX>72024</sizeHorzCX><sizeHorzCY>152749</sizeHorzCY><sizeVertCX>155357</sizeVertCX><sizeVertCY>731161</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>716</Bottom><Right>514</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>119048</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>307143</sizeVertCX><sizeVertCY>731161</sizeVertCY></Rect></Wnd1></Sizes></Row0></Right><Bottom><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1682</Right><x>-2</x><y>-2</y><xscreen>1684</xscreen><yscreen>200</yscreen><sizeHorzCX>1002381</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>119048</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd2></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>\r
   </Desktop>\r
 </Project>\r
 \r

diff --git a/Demo/MSP430X_MSP430F5438_IAR/settings/RTOSDemo.dni b/Demo/MSP430X_MSP430F5438_IAR/settings/RTOSDemo.dni
index 3aa7b04f7bc09a009d171dd0cafe8cb13625c413..f24622ccbec993c6da3145c5b88e9b7747965e6d 100644 (file)
--- a/Demo/MSP430X_MSP430F5438_IAR/settings/RTOSDemo.dni
+++ b/Demo/MSP430X_MSP430F5438_IAR/settings/RTOSDemo.dni
@@ -1,5 +1,5 @@
 [DebugChecksum]\r
-Checksum=131837655\r
+Checksum=1421140093\r
 [DisAssemblyWindow]\r
 NumStates=_ 1\r
 State 1=_ 1\r
@@ -28,6 +28,16 @@ UseTrigger=1
 TriggerName=main\r
 LimitSize=0\r
 ByteLimit=50\r
+[Stack]\r
+FillEnabled=0\r
+OverflowWarningsEnabled=1\r
+WarningThreshold=90\r
+SpWarningsEnabled=1\r
+WarnLogOnly=1\r
+UseTrigger=1\r
+TriggerName=main\r
+LimitSize=0\r
+ByteLimit=50\r
 [Log file]\r
 LoggingEnabled=_ 0\r
 LogFile=_ ""\r
@@ -35,13 +45,16 @@ Category=_ 0
 [TermIOLog]\r
 LoggingEnabled=_ 0\r
 LogFile=_ ""\r
+[CallStack]\r
+ShowArgs=0\r
 [CallStackLog]\r
 Enabled=0\r
 [DriverProfiling]\r
 Enabled=0\r
-Mode=152238872\r
+Mode=0\r
 Graph=0\r
 Symbiont=0\r
+Exclusions=\r
 [Breakpoints]\r
 Count=0\r
 [FET]\r

diff --git a/Demo/MSP430X_MSP430F5438_IAR/settings/RTOSDemo.wsdt b/Demo/MSP430X_MSP430F5438_IAR/settings/RTOSDemo.wsdt
index 11db5ab79c1443ae3a1f2953b1a6fae7b9784969..c5cfe63a4c6b7ba67df18861826468c8d865457f 100644 (file)
--- a/Demo/MSP430X_MSP430F5438_IAR/settings/RTOSDemo.wsdt
+++ b/Demo/MSP430X_MSP430F5438_IAR/settings/RTOSDemo.wsdt
@@ -12,7 +12,7 @@
           \r
           \r
           \r
-        <Column0>235</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>\r
+        <Column0>335</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>\r
       </Workspace>\r
       <Build>\r
         \r
@@ -43,14 +43,14 @@
       \r
       \r
       \r
-    <Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\main.c</Filename><XPos>0</XPos><YPos>40</YPos><SelStart>12197</SelStart><SelEnd>12197</SelEnd></Tab><ActiveTab>0</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>\r
+    <Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\main.c</Filename><XPos>0</XPos><YPos>50</YPos><SelStart>19236</SelStart><SelEnd>19236</SelEnd></Tab><ActiveTab>0</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>\r
     <Positions>\r
       \r
       \r
       \r
       \r
       \r
-    <Top><Row0><Sizes><Toolbar-012aad60><key>iaridepm.enu1</key></Toolbar-012aad60></Sizes></Row0><Row1><Sizes/></Row1><Row2><Sizes/></Row2><Row3><Sizes/></Row3><Row4><Sizes/></Row4></Top><Left><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>740</Bottom><Right>309</Right><x>-2</x><y>-2</y><xscreen>331</xscreen><yscreen>267</yscreen><sizeHorzCX>197024</sizeHorzCX><sizeHorzCY>271894</sizeHorzCY><sizeVertCX>185119</sizeVertCX><sizeVertCY>755601</sizeVertCY></Rect></Wnd2></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1682</Right><x>-2</x><y>-2</y><xscreen>1684</xscreen><yscreen>200</yscreen><sizeHorzCX>1002381</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>119048</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd3></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>\r
+    <Top><Row0><Sizes><Toolbar-01349480><key>iaridepm.enu1</key></Toolbar-01349480></Sizes></Row0><Row1><Sizes/></Row1><Row2><Sizes/></Row2><Row3><Sizes/></Row3></Top><Left><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>610</Bottom><Right>409</Right><x>-2</x><y>-2</y><xscreen>331</xscreen><yscreen>267</yscreen><sizeHorzCX>197024</sizeHorzCX><sizeHorzCY>271894</sizeHorzCY><sizeVertCX>244643</sizeVertCX><sizeVertCY>623218</sizeVertCY></Rect></Wnd2></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>328</Bottom><Right>1682</Right><x>-2</x><y>-2</y><xscreen>1684</xscreen><yscreen>330</yscreen><sizeHorzCX>1002381</sizeHorzCX><sizeHorzCY>336049</sizeHorzCY><sizeVertCX>119048</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd3></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>\r
   </Desktop>\r
 </Workspace>\r
 \r