* Representation of a pin on an AT91SAM9 chip.
*/
struct at91sam9_pin {
- /** Target this pin is on. */
- struct target *target;
-
/** Address of the PIO controller. */
uint32_t pioc;
* Private data for the controller that is stored in the NAND device structure.
*/
struct at91sam9_nand {
- /** Target the NAND is attached to. */
- struct target *target;
-
/** Address of the ECC controller for NAND. */
uint32_t ecc;
*/
static int at91sam9_init(struct nand_device *nand)
{
- struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = info->target;
+ struct target *target = nand->target;
if (!at91sam9_halted(target, "init")) {
return ERROR_NAND_OPERATION_FAILED;
* @param info NAND controller information for controlling NAND device.
* @return Success or failure of the enabling.
*/
-static int at91sam9_enable(struct at91sam9_nand *info)
+static int at91sam9_enable(struct nand_device *nand)
{
- struct target *target = info->target;
+ struct at91sam9_nand *info = nand->controller_priv;
+ struct target *target = nand->target;
return target_write_u32(target, info->ce.pioc + AT91C_PIOx_CODR, 1 << info->ce.num);
}
* @param info NAND controller information for controlling NAND device.
* @return Success or failure of the disabling.
*/
-static int at91sam9_disable(struct at91sam9_nand *info)
+static int at91sam9_disable(struct nand_device *nand)
{
- struct target *target = info->target;
+ struct at91sam9_nand *info = nand->controller_priv;
+ struct target *target = nand->target;
return target_write_u32(target, info->ce.pioc + AT91C_PIOx_SODR, 1 << info->ce.num);
}
static int at91sam9_command(struct nand_device *nand, uint8_t command)
{
struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = info->target;
+ struct target *target = nand->target;
if (!at91sam9_halted(target, "command")) {
return ERROR_NAND_OPERATION_FAILED;
}
- at91sam9_enable(info);
+ at91sam9_enable(nand);
return target_write_u8(target, info->cmd, command);
}
*/
static int at91sam9_reset(struct nand_device *nand)
{
- struct at91sam9_nand *info = nand->controller_priv;
-
- if (!at91sam9_halted(info->target, "reset")) {
+ if (!at91sam9_halted(nand->target, "reset")) {
return ERROR_NAND_OPERATION_FAILED;
}
- return at91sam9_disable(info);
+ return at91sam9_disable(nand);
}
/**
static int at91sam9_address(struct nand_device *nand, uint8_t address)
{
struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = info->target;
+ struct target *target = nand->target;
- if (!at91sam9_halted(info->target, "address")) {
+ if (!at91sam9_halted(nand->target, "address")) {
return ERROR_NAND_OPERATION_FAILED;
}
static int at91sam9_read_data(struct nand_device *nand, void *data)
{
struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = info->target;
+ struct target *target = nand->target;
- if (!at91sam9_halted(info->target, "read data")) {
+ if (!at91sam9_halted(nand->target, "read data")) {
return ERROR_NAND_OPERATION_FAILED;
}
static int at91sam9_write_data(struct nand_device *nand, uint16_t data)
{
struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = info->target;
+ struct target *target = nand->target;
if (!at91sam9_halted(target, "write data")) {
return ERROR_NAND_OPERATION_FAILED;
static int at91sam9_nand_ready(struct nand_device *nand, int timeout)
{
struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = info->target;
+ struct target *target = nand->target;
uint32_t status;
if (!at91sam9_halted(target, "nand ready")) {
struct arm_nand_data *io = &info->io;
int status;
- if (!at91sam9_halted(info->target, "read block")) {
+ if (!at91sam9_halted(nand->target, "read block")) {
return ERROR_NAND_OPERATION_FAILED;
}
struct arm_nand_data *io = &info->io;
int status;
- if (!at91sam9_halted(info->target, "write block")) {
+ if (!at91sam9_halted(nand->target, "write block")) {
return ERROR_NAND_OPERATION_FAILED;
}
{
int retval;
struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = info->target;
+ struct target *target = nand->target;
uint8_t *oob_data;
uint32_t status;
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = info->target;
+ struct target *target = nand->target;
int retval;
uint8_t *oob_data = oob;
uint32_t parity, nparity;
*/
NAND_DEVICE_COMMAND_HANDLER(at91sam9_nand_device_command)
{
- struct target *target = NULL;
unsigned long chip = 0, ecc = 0;
struct at91sam9_nand *info = NULL;
return ERROR_NAND_OPERATION_FAILED;
}
- target = get_target(CMD_ARGV[1]);
- if (!target) {
- LOG_ERROR("invalid target: %s", CMD_ARGV[1]);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], chip);
if (chip == 0) {
LOG_ERROR("invalid NAND chip address: %s", CMD_ARGV[2]);
return ERROR_NAND_OPERATION_FAILED;
}
- info->target = target;
info->data = chip;
info->cmd = chip | (1 << 22);
info->addr = chip | (1 << 21);
info->ecc = ecc;
nand->controller_priv = info;
- info->io.target = target;
+ info->io.target = nand->target;
info->io.data = info->data;
info->io.op = ARM_NAND_NONE;