struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
struct swjdp_common *swjdp = &cortex_m3->armv7m.swjdp_info;
struct cortex_m3_fp_comparator *fp_list = cortex_m3->fp_comparator_list;
- cortex_m3_dwt_comparator_t *dwt_list = cortex_m3->dwt_comparator_list;
+ struct cortex_m3_dwt_comparator *dwt_list = cortex_m3->dwt_comparator_list;
mem_ap_read_atomic_u32(swjdp, DCB_DEMCR, &dcb_demcr);
LOG_DEBUG("DCB_DEMCR = 0x%8.8" PRIx32 "",dcb_demcr);
* watchpoint using comparator #1; comparator #0 matching cycle
* count; send data trace info through ITM and TPIU; etc
*/
- cortex_m3_dwt_comparator_t *comparator;
+ struct cortex_m3_dwt_comparator *comparator;
for (comparator = cortex_m3->dwt_comparator_list;
comparator->used && dwt_num < cortex_m3->dwt_num_comp;
cortex_m3_unset_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
{
struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
- cortex_m3_dwt_comparator_t *comparator;
+ struct cortex_m3_dwt_comparator *comparator;
int dwt_num;
if (!watchpoint->set)
{
uint32_t dwtcr;
struct reg_cache *cache;
- cortex_m3_dwt_comparator_t *comparator;
+ struct cortex_m3_dwt_comparator *comparator;
int reg, i;
target_read_u32(target, DWT_CTRL, &dwtcr);
cm3->dwt_num_comp = (dwtcr >> 28) & 0xF;
cm3->dwt_comp_available = cm3->dwt_num_comp;
cm3->dwt_comparator_list = calloc(cm3->dwt_num_comp,
- sizeof(cortex_m3_dwt_comparator_t));
+ sizeof(struct cortex_m3_dwt_comparator));
if (!cm3->dwt_comparator_list) {
fail0:
cm3->dwt_num_comp = 0;
uint32_t fpcr_address;
};
-typedef struct cortex_m3_dwt_comparator_s
+struct cortex_m3_dwt_comparator
{
int used;
uint32_t comp;
uint32_t mask;
uint32_t function;
uint32_t dwt_comparator_address;
-} cortex_m3_dwt_comparator_t;
+};
struct cortex_m3_common
{
/* Data Watchpoint and Trace (DWT) */
int dwt_num_comp;
int dwt_comp_available;
- cortex_m3_dwt_comparator_t *dwt_comparator_list;
+ struct cortex_m3_dwt_comparator *dwt_comparator_list;
struct reg_cache *dwt_cache;
struct armv7m_common armv7m;