]> git.sur5r.net Git - openocd/commitdiff
arm_adi_v5: added two CoreSight peripheral IDs
authorPeter Lawrence <majbthrd@gmail.com>
Sun, 2 Nov 2014 00:31:49 +0000 (17:31 -0700)
committerAndreas Fritiofson <andreas.fritiofson@gmail.com>
Mon, 3 Nov 2014 19:30:59 +0000 (19:30 +0000)
added "Single Wire Output" and "Trace Memory Controller" peripheral
IDs to dap_rom_display(), which is invoked by the "dap info" command

Change-Id: Iea3201007bb98e6376fbb50be40a4a2e031b0a03
Signed-off-by: Peter Lawrence <majbthrd@gmail.com>
Reviewed-on: http://openocd.zylin.com/2369
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
src/target/arm_adi_v5.c

index a059531534750c3027ae3a24958bfd624131ac31..c76cc690720255ff18ccaa3f156c3b900f62a141 100644 (file)
@@ -1275,6 +1275,10 @@ static int dap_rom_display(struct command_context *cmd_ctx,
                                type = "Coresight ITM";
                                full = "(Instrumentation Trace Macrocell)";
                                break;
+                       case 0x914:
+                               type = "Coresight SWO";
+                               full = "(Single Wire Output)";
+                               break;
                        case 0x917:
                                type = "Coresight HTM";
                                full = "(AHB Trace Macrocell)";
@@ -1311,6 +1315,10 @@ static int dap_rom_display(struct command_context *cmd_ctx,
                                type = "CoreSight Component";
                                full = "(unidentified Cortex-A9 component)";
                                break;
+                       case 0x961:
+                               type = "CoreSight TMC";
+                               full = "(Trace Memory Controller)";
+                               break;
                        case 0x962:
                                type = "CoreSight STM";
                                full = "(System Trace Macrocell)";