Add support for double precision floating point.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@790 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/Source/portable/GCC/PPC405_Xilinx/port.c b/Source/portable/GCC/PPC405_Xilinx/port.c
index 623543c835accd4777dbc7c4376ded0f9965b35a..882bb8b0e913040bc058c71c45169f9c0026d333 100644 (file)
--- a/Source/portable/GCC/PPC405_Xilinx/port.c
+++ b/Source/portable/GCC/PPC405_Xilinx/port.c
@@ -80,6 +80,10 @@
 \r
 #define portINITIAL_MSR                ( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE | portAPU_PRESENT | portFCM_FPU_PRESENT )\r
 \r
+\r
+extern const unsigned _SDA_BASE_;\r
+extern const unsigned _SDA2_BASE_;\r
+\r
 /*-----------------------------------------------------------*/\r
 \r
 /*\r
@@ -123,12 +127,18 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
        pxTopOfStack--;\r
 \r
        /* EABI stack frame. */\r
-       pxTopOfStack -= 30;     /* Previous backchain and LR, R31 to R4 inclusive. */\r
+       pxTopOfStack -= 20;     /* Previous backchain and LR, R31 to R4 inclusive. */\r
+\r
+       /* Parameters in R13. */\r
+       *pxTopOfStack = ( portSTACK_TYPE ) &_SDA_BASE_; /* address of the first small data area */\r
+       pxTopOfStack -= 10;\r
 \r
        /* Parameters in R3. */\r
        *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
        pxTopOfStack--;\r
-       *pxTopOfStack = 0x02020202UL;   /* R2. */\r
+\r
+       /* Parameters in R2. */\r
+       *pxTopOfStack = ( portSTACK_TYPE ) &_SDA2_BASE_;        /* address of the second small data area */\r
        pxTopOfStack--;\r
 \r
        /* R1 is the stack pointer so is omitted. */\r

diff --git a/Source/portable/GCC/PPC405_Xilinx/portasm.S b/Source/portable/GCC/PPC405_Xilinx/portasm.S
index 252af6bb916d81d7e2f04f9927a014b3d6f3687c..54cdd10a566bdd94de774646500d4bac230096b8 100644 (file)
--- a/Source/portable/GCC/PPC405_Xilinx/portasm.S
+++ b/Source/portable/GCC/PPC405_Xilinx/portasm.S
@@ -212,6 +212,49 @@ vPortSaveFPURegisters:
        or              r0, r0, r30\r
        mtmsr   r0\r
 \r
+#ifdef USE_DP_FPU\r
+\r
+       /* Buffer address is in r3.  Save each flop register into an offset from\r
+       this buffer address. */\r
+       stfd    f0, 0(r3)\r
+       stfd    f1, 8(r3)\r
+       stfd    f2, 16(r3)\r
+       stfd    f3, 24(r3)\r
+       stfd    f4, 32(r3)\r
+       stfd    f5, 40(r3)\r
+       stfd    f6, 48(r3)\r
+       stfd    f7, 56(r3)\r
+       stfd    f8, 64(r3)\r
+       stfd    f9, 72(r3)\r
+       stfd    f10, 80(r3)\r
+       stfd    f11, 88(r3)\r
+       stfd    f12, 96(r3)\r
+       stfd    f13, 104(r3)\r
+       stfd    f14, 112(r3)\r
+       stfd    f15, 120(r3)\r
+       stfd    f16, 128(r3)\r
+       stfd    f17, 136(r3)\r
+       stfd    f18, 144(r3)\r
+       stfd    f19, 152(r3)\r
+       stfd    f20, 160(r3)\r
+       stfd    f21, 168(r3)\r
+       stfd    f22, 176(r3)\r
+       stfd    f23, 184(r3)\r
+       stfd    f24, 192(r3)\r
+       stfd    f25, 200(r3)\r
+       stfd    f26, 208(r3)\r
+       stfd    f27, 216(r3)\r
+       stfd    f28, 224(r3)\r
+       stfd    f29, 232(r3)\r
+       stfd    f30, 240(r3)\r
+       stfd    f31, 248(r3)    \r
+       \r
+       /* Also save the FPSCR. */\r
+       mffs    f31\r
+       stfs    f31, 256(r3)\r
+\r
+#else\r
+\r
        /* Buffer address is in r3.  Save each flop register into an offset from\r
        this buffer address. */\r
        stfs    f0, 0(r3)\r
@@ -250,6 +293,8 @@ vPortSaveFPURegisters:
        /* Also save the FPSCR. */\r
        mffs    f31\r
        stfs    f31, 128(r3)\r
+       \r
+#endif\r
 \r
        blr\r
 \r
@@ -268,6 +313,49 @@ vPortRestoreFPURegisters:
        or              r0, r0, r30\r
        mtmsr   r0\r
 \r
+#ifdef USE_DP_FPU\r
+\r
+       /* Buffer address is in r3.  Restore each flop register from an offset\r
+       into this buffer. \r
+       \r
+       First the FPSCR. */\r
+       lfs             f31, 256(r3)\r
+       mtfsf   f31, 7\r
+\r
+       lfd             f0, 0(r3)\r
+       lfd         f1, 8(r3)\r
+       lfd             f2, 16(r3)\r
+       lfd             f3, 24(r3)\r
+       lfd             f4, 32(r3)\r
+       lfd             f5, 40(r3)\r
+       lfd             f6, 48(r3)\r
+       lfd             f7, 56(r3)\r
+       lfd             f8, 64(r3)\r
+       lfd             f9, 72(r3)\r
+       lfd             f10, 80(r3)\r
+       lfd             f11, 88(r3)\r
+       lfd             f12, 96(r3)\r
+       lfd             f13, 104(r3)\r
+       lfd             f14, 112(r3)\r
+       lfd             f15, 120(r3)\r
+       lfd             f16, 128(r3)\r
+       lfd             f17, 136(r3)\r
+       lfd             f18, 144(r3)\r
+       lfd             f19, 152(r3)\r
+       lfd             f20, 160(r3)\r
+       lfd             f21, 168(r3)\r
+       lfd             f22, 176(r3)\r
+       lfd             f23, 184(r3)\r
+       lfd             f24, 192(r3)\r
+       lfd             f25, 200(r3)\r
+       lfd             f26, 208(r3)\r
+       lfd             f27, 216(r3)\r
+       lfd             f28, 224(r3)\r
+       lfd             f29, 232(r3)\r
+       lfd             f30, 240(r3)\r
+       lfd             f31, 248(r3)\r
+\r
+#else\r
 \r
        /* Buffer address is in r3.  Restore each flop register from an offset\r
        into this buffer. \r
@@ -309,6 +397,8 @@ vPortRestoreFPURegisters:
        lfs             f30, 120(r3)\r
        lfs             f31, 124(r3)\r
 \r
+#endif\r
+\r
        blr\r
 \r
 #endif /* configUSE_FPU. */\r