--- /dev/null
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--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<projectDescription>\r
+ <name>RTOSDemo</name>\r
+ <comment></comment>\r
+ <projects>\r
+ </projects>\r
+ <buildSpec>\r
+ <buildCommand>\r
+ <name>com.tasking.arm.TskManagedBuilder</name>\r
+ <arguments>\r
+ </arguments>\r
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+ <nature>com.tasking.arm.target</nature>\r
+ </natures>\r
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--- /dev/null
+/*\r
+ FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+\r
+#ifndef FREERTOS_CONFIG_H\r
+#define FREERTOS_CONFIG_H\r
+\r
+\r
+/*-----------------------------------------------------------\r
+ * Application specific definitions.\r
+ *\r
+ * These definitions should be adjusted for your particular hardware and\r
+ * application requirements.\r
+ *\r
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.\r
+ *\r
+ * See http://www.freertos.org/a00110.html.\r
+ *----------------------------------------------------------*/\r
+\r
+#include <stdint.h>\r
+extern uint32_t SystemCoreClock;\r
+\r
+#define configUSE_PREEMPTION 1\r
+#define configUSE_IDLE_HOOK 0\r
+#define configUSE_TICK_HOOK 0\r
+#define configCPU_CLOCK_HZ ( SystemCoreClock )\r
+#define configTICK_RATE_HZ ( ( portTickType ) 1000 )\r
+#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )\r
+#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 130 )\r
+#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 40960 ) )\r
+#define configMAX_TASK_NAME_LEN ( 10 )\r
+#define configUSE_TRACE_FACILITY 1\r
+#define configUSE_16_BIT_TICKS 0\r
+#define configIDLE_SHOULD_YIELD 1\r
+#define configUSE_MUTEXES 1\r
+#define configQUEUE_REGISTRY_SIZE 8\r
+#define configCHECK_FOR_STACK_OVERFLOW 2\r
+#define configUSE_RECURSIVE_MUTEXES 1\r
+#define configUSE_MALLOC_FAILED_HOOK 1\r
+#define configUSE_APPLICATION_TASK_TAG 0\r
+#define configUSE_COUNTING_SEMAPHORES 1\r
+#define configGENERATE_RUN_TIME_STATS 0\r
+\r
+/* Co-routine definitions. */\r
+#define configUSE_CO_ROUTINES 0\r
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )\r
+\r
+/* Software timer definitions. */\r
+#define configUSE_TIMERS 1\r
+#define configTIMER_TASK_PRIORITY ( 2 )\r
+#define configTIMER_QUEUE_LENGTH 5\r
+#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 )\r
+\r
+/* Set the following definitions to 1 to include the API function, or zero\r
+to exclude the API function. */\r
+#define INCLUDE_vTaskPrioritySet 1\r
+#define INCLUDE_uxTaskPriorityGet 1\r
+#define INCLUDE_vTaskDelete 1\r
+#define INCLUDE_vTaskCleanUpResources 1\r
+#define INCLUDE_vTaskSuspend 1\r
+#define INCLUDE_vTaskDelayUntil 1\r
+#define INCLUDE_vTaskDelay 1\r
+\r
+/* Cortex-M specific definitions. */\r
+#ifdef __NVIC_PRIO_BITS\r
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */\r
+ #define configPRIO_BITS __NVIC_PRIO_BITS\r
+#else\r
+ #define configPRIO_BITS 6 /* 63 priority levels */\r
+#endif\r
+\r
+/* The lowest interrupt priority that can be used in a call to a "set priority"\r
+function. */\r
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x3f\r
+\r
+/* The highest interrupt priority that can be used by any interrupt service\r
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL\r
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER\r
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */\r
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5\r
+\r
+/* Interrupt priorities used by the kernel port layer itself. These are generic\r
+to all Cortex-M ports, and do not rely on any particular library functions. */\r
+#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )\r
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )\r
+ \r
+/* Normal assert() semantics without relying on the provision of an assert.h\r
+header file. */\r
+#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); } \r
+ \r
+#endif /* FREERTOS_CONFIG_H */\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/*-----------------------------------------------------------\r
+ * Implementation of functions defined in portable.h for the ARM CM4F port.\r
+ *----------------------------------------------------------*/\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Constants required to manipulate the NVIC. */\r
+#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long * ) 0xe000e010 )\r
+#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long * ) 0xe000e014 )\r
+#define portNVIC_INT_CTRL ( ( volatile unsigned long * ) 0xe000ed04 )\r
+#define portNVIC_SYSPRI2 ( ( volatile unsigned long * ) 0xe000ed20 )\r
+#define portNVIC_SYSTICK_CLK 0x00000004\r
+#define portNVIC_SYSTICK_INT 0x00000002\r
+#define portNVIC_SYSTICK_ENABLE 0x00000001\r
+#define portNVIC_PENDSVSET 0x10000000\r
+#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
+#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
+\r
+/* Constants required to manipulate the VFP. */\r
+#define portFPCCR ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */\r
+#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )\r
+\r
+/* Constants required to set up the initial stack. */\r
+#define portINITIAL_XPSR ( 0x01000000 )\r
+#define portINITIAL_EXEC_RETURN ( 0xfffffffd )\r
+\r
+/* The priority used by the kernel is assigned to a variable to make access\r
+from inline assembler easier. */\r
+const unsigned long ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;\r
+\r
+/* Each task maintains its own interrupt status in the critical nesting\r
+variable. */\r
+static unsigned long ulCriticalNesting = 0xaaaaaaaaUL;\r
+\r
+/*\r
+ * Setup the timer to generate the tick interrupts.\r
+ */\r
+static void prvSetupTimerInterrupt( void );\r
+\r
+/*\r
+ * Exception handlers.\r
+ */\r
+void SysTick_Handler( void );\r
+\r
+/*\r
+ * Functions defined in port_asm.asm.\r
+ */\r
+extern void vPortEnableVFP( void );\r
+extern void vPortStartFirstTask( void );\r
+\r
+/* This exists purely to allow the const to be used from within the\r
+port_asm.asm assembly file. */\r
+const unsigned long ulMaxSyscallInterruptPriorityConst = configMAX_SYSCALL_INTERRUPT_PRIORITY;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * See header file for description.\r
+ */\r
+portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+{\r
+ /* Simulate the stack frame as it would be created by a context switch\r
+ interrupt. */\r
+\r
+ /* Offset added to account for the way the MCU uses the stack on entry/exit\r
+ of interrupts, and to ensure alignment. */\r
+ pxTopOfStack -= 2;\r
+\r
+ *pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0; /* LR */\r
+\r
+ /* Save code space by skipping register initialisation. */\r
+ pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
+ *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+\r
+ /* A save method is being used that requiers each task to maintain its\r
+ own exec return value. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = portINITIAL_EXEC_RETURN;\r
+\r
+ pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
+\r
+ return pxTopOfStack;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * See header file for description.\r
+ */\r
+portBASE_TYPE xPortStartScheduler( void )\r
+{\r
+ /* Make PendSV and SysTick the lowest priority interrupts. */\r
+ *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
+ *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
+\r
+ /* Start the timer that generates the tick ISR. Interrupts are disabled\r
+ here already. */\r
+ prvSetupTimerInterrupt();\r
+\r
+ /* Initialise the critical nesting count ready for the first task. */\r
+ ulCriticalNesting = 0;\r
+\r
+ /* Ensure the VFP is enabled - it should be anyway. */\r
+ vPortEnableVFP();\r
+\r
+ /* Lazy save always. */\r
+ *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;\r
+\r
+ /* Start the first task. */\r
+ vPortStartFirstTask();\r
+\r
+ /* Should not get here! */\r
+ return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEndScheduler( void )\r
+{\r
+ /* It is unlikely that the CM4F port will require this function as there\r
+ is nothing to return to. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortYieldFromISR( void )\r
+{\r
+ /* Set a PendSV to request a context switch. */\r
+ *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEnterCritical( void )\r
+{\r
+ portDISABLE_INTERRUPTS();\r
+ ulCriticalNesting++;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortExitCritical( void )\r
+{\r
+ ulCriticalNesting--;\r
+ if( ulCriticalNesting == 0 )\r
+ {\r
+ portENABLE_INTERRUPTS();\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void SysTick_Handler( void )\r
+{\r
+unsigned long ulDummy;\r
+\r
+ /* If using preemption, also force a context switch. */\r
+ #if configUSE_PREEMPTION == 1\r
+ *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
+ #endif\r
+\r
+ ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
+ {\r
+ vTaskIncrementTick();\r
+ }\r
+ portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Setup the systick timer to generate the tick interrupts at the required\r
+ * frequency.\r
+ */\r
+void prvSetupTimerInterrupt( void )\r
+{\r
+ /* Configure SysTick to interrupt at the requested rate. */\r
+ *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
+ *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
--- /dev/null
+;/*\r
+; FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+;\r
+;\r
+; ***************************************************************************\r
+; * *\r
+; * FreeRTOS tutorial books are available in pdf and paperback. *\r
+; * Complete, revised, and edited pdf reference manuals are also *\r
+; * available. *\r
+; * *\r
+; * Purchasing FreeRTOS documentation will not only help you, by *\r
+; * ensuring you get running as quickly as possible and with an *\r
+; * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+; * the FreeRTOS project to continue with its mission of providing *\r
+; * professional grade, cross platform, de facto standard solutions *\r
+; * for microcontrollers - completely free of charge! *\r
+; * *\r
+; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+; * *\r
+; * Thank you for using FreeRTOS, and thank you for your support! *\r
+; * *\r
+; ***************************************************************************\r
+;\r
+;\r
+; This file is part of the FreeRTOS distribution.\r
+;\r
+; FreeRTOS is free software; you can redistribute it and/or modify it under\r
+; the terms of the GNU General Public License (version 2) as published by the\r
+; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+; >>>NOTE<<< The modification to the GPL is included to allow you to\r
+; distribute a combined work that includes FreeRTOS without being obliged to\r
+; provide the source code for proprietary components outside of the FreeRTOS\r
+; kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+; more details. You should have received a copy of the GNU General Public\r
+; License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+; can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+; by writing to Richard Barry, contact details for whom are available on the\r
+; FreeRTOS WEB site.\r
+;\r
+; 1 tab == 4 spaces!\r
+;\r
+; http://www.FreeRTOS.org - Documentation, latest information, license and\r
+; contact details.\r
+;\r
+; http://www.SafeRTOS.com - A version that is certified for use in safety\r
+; critical systems.\r
+;\r
+; http://www.OpenRTOS.com - Commercial support, development, porting,\r
+; licensing and training services.\r
+;*/\r
+\r
+ .extern pxCurrentTCB\r
+ .extern vTaskSwitchContext\r
+ .extern ulMaxSyscallInterruptPriorityConst\r
+\r
+ .global PendSV_Handler\r
+ .global SVC_Handler\r
+ .global vPortStartFirstTask\r
+ .global vPortEnableVFP\r
+ \r
+;-----------------------------------------------------------\r
+\r
+ .section .text\r
+ .thumb\r
+ .align 4\r
+PendSV_Handler: .type func\r
+ mrs r0, psp\r
+\r
+ ;Get the location of the current TCB.\r
+ ldr r3, =pxCurrentTCB\r
+ ldr r2, [r3]\r
+\r
+ ;Is the task using the FPU context? If so, push high vfp registers.\r
+ tst r14, #0x10\r
+ it eq\r
+ vstmdbeq r0!, {s16-s31}\r
+\r
+ ;Save the core registers.\r
+ stmdb r0!, {r4-r11, r14}\r
+\r
+ ;Save the new top of stack into the first member of the TCB.\r
+ str r0, [r2]\r
+\r
+ stmdb sp!, {r3, r14}\r
+ ldr r0, ulMaxSyscallInterruptPriorityConst\r
+ ldr r0, [r0]\r
+ msr basepri, r0\r
+; bl vTaskSwitchContext\r
+ mov r0, #0\r
+ msr basepri, r0\r
+ ldmia sp!, {r3, r14}\r
+\r
+ ;The first item in pxCurrentTCB is the task top of stack.\r
+ ldr r1, [r3]\r
+ ldr r0, [r1]\r
+\r
+ ;Pop the core registers.\r
+ ldmia r0!, {r4-r11, r14}\r
+\r
+ ;Is the task using the FPU context? If so, pop the high vfp registers too.\r
+ tst r14, #0x10\r
+ it eq\r
+ vldmiaeq r0!, {s16-s31}\r
+\r
+ msr psp, r0\r
+ bx r14\r
+\r
+ .size PendSV_Handler, $-PendSV_Handler\r
+ .endsec\r
+\r
+;-----------------------------------------------------------\r
+\r
+ .section .text\r
+ .thumb\r
+ .align 4\r
+SVC_Handler: .type func\r
+ ;Get the location of the current TCB.\r
+ ldr r3, =pxCurrentTCB\r
+ ldr r1, [r3]\r
+ ldr r0, [r1]\r
+ ;Pop the core registers.\r
+ ldmia r0!, {r4-r11, r14}\r
+ msr psp, r0\r
+ mov r0, #0\r
+ msr basepri, r0\r
+ bx r14\r
+ .size SVC_Handler, $-SVC_Handler\r
+ .endsec\r
+\r
+;-----------------------------------------------------------\r
+\r
+ .section .text\r
+ .thumb\r
+ .align 4\r
+vPortStartFirstTask .type func\r
+ ;Use the NVIC offset register to locate the stack.\r
+ ldr r0, =0xE000ED08\r
+ ldr r0, [r0]\r
+ ldr r0, [r0]\r
+ ;Set the msp back to the start of the stack.\r
+ msr msp, r0\r
+ ;Call SVC to start the first task.\r
+ cpsie i\r
+ svc 0\r
+ .size vPortStartFirstTask, $-vPortStartFirstTask\r
+ .endsec\r
+\r
+;-----------------------------------------------------------\r
+\r
+ .section .text\r
+ .thumb\r
+ .align 4\r
+vPortEnableVFP .type func\r
+ ;The FPU enable bits are in the CPACR.\r
+ ldr r0, =0xE000ED88\r
+ ldr r1, [r0]\r
+\r
+ ;Enable CP10 and CP11 coprocessors, then save back.\r
+ orr r1, r1, #( 0xf << 20 )\r
+ str r1, [r0]\r
+ bx r14\r
+ .size vPortEnableVFP, $-vPortEnableVFP\r
+ .endsec\r
+\r
+\r
+ .end\r
+ \r
--- /dev/null
+/*\r
+ FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+ \r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+\r
+#ifndef PORTMACRO_H\r
+#define PORTMACRO_H\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/*-----------------------------------------------------------\r
+ * Port specific definitions. \r
+ *\r
+ * The settings in this file configure FreeRTOS correctly for the\r
+ * given hardware and compiler.\r
+ *\r
+ * These settings should not be altered.\r
+ *-----------------------------------------------------------\r
+ */\r
+\r
+/* Type definitions. */\r
+#define portCHAR char\r
+#define portFLOAT float\r
+#define portDOUBLE double\r
+#define portLONG long\r
+#define portSHORT short\r
+#define portSTACK_TYPE unsigned portLONG\r
+#define portBASE_TYPE long\r
+\r
+#if( configUSE_16_BIT_TICKS == 1 )\r
+ typedef unsigned portSHORT portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffff\r
+#else\r
+ typedef unsigned portLONG portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+#endif\r
+/*-----------------------------------------------------------*/ \r
+\r
+/* Architecture specifics. */\r
+#define portSTACK_GROWTH ( -1 )\r
+#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portBYTE_ALIGNMENT 8\r
+/*-----------------------------------------------------------*/ \r
+\r
+\r
+/* Scheduler utilities. */\r
+extern void vPortYieldFromISR( void );\r
+\r
+#define portYIELD() vPortYieldFromISR()\r
+\r
+#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR()\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
+/* Critical section management. */\r
+\r
+/* \r
+ * Set basepri to portMAX_SYSCALL_INTERRUPT_PRIORITY without effecting other\r
+ * registers. r0 is clobbered.\r
+ */ \r
+#define portSET_INTERRUPT_MASK() __set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY )\r
+ \r
+/*\r
+ * Set basepri back to 0 without effective other registers.\r
+ * r0 is clobbered.\r
+ */\r
+#define portCLEAR_INTERRUPT_MASK() __set_BASEPRI( 0 )\r
+\r
+#define portSET_INTERRUPT_MASK_FROM_ISR() 0;portSET_INTERRUPT_MASK()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) portCLEAR_INTERRUPT_MASK();(void)x\r
+\r
+\r
+extern void vPortEnterCritical( void );\r
+extern void vPortExitCritical( void );\r
+\r
+#define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK()\r
+#define portENABLE_INTERRUPTS() portCLEAR_INTERRUPT_MASK()\r
+#define portENTER_CRITICAL() vPortEnterCritical()\r
+#define portEXIT_CRITICAL() vPortExitCritical()\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task function macros as described on the FreeRTOS.org WEB site. */\r
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+\r
+#define portNOP()\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* PORTMACRO_H */\r
+\r
--- /dev/null
+// TASKING VX-toolset for ARM\r
+// Project linker script file\r
+// \r
+#if defined(__PROC_XMC4500X1024__)\r
+#include "xmc45xx.lsl"\r
+#else\r
+#include <device.lsl>\r
+#endif\r
--- /dev/null
+/*\r
+** @(#)cstart.c 1.8 $E%\r
+**\r
+** Copyright 1997-2012 Altium BV *\r
+**\r
+** DESCRIPTION:\r
+**\r
+** The system startup code initializes the processor's registers\r
+** and the application C variables.\r
+**\r
+*/\r
+\r
+#pragma nomisrac\r
+#pragma profiling off /* prevent profiling information on cstart */\r
+#pragma optimize abcefgIJKlopRsUy /* preset optimization level */\r
+#pragma tradeoff 4 /* preset tradeoff level */\r
+#pragma runtime BCMSZ /* disable runtime error checking for cstart */\r
+#pragma warning 750 /* do not warn about unsaved registers */\r
+#pragma section .text=cstart /* use: .text.cstart as the section name */\r
+#pragma alias Reset_Handler = _START /* requirement for CMSIS */\r
+#pragma extern Reset_Handler /* required for mil-linking with CMSIS */\r
+\r
+#include <stdlib.h>\r
+#include <dbg.h>\r
+\r
+#define VTOR (*(volatile unsigned int *)0xE000ED08)\r
+#define PREF_PCON (*(volatile unsigned int *)0x58004000)\r
+#define SCU_GCU_PEEN (*(volatile unsigned int *)0x5000413C)\r
+#define SCU_GCU_PEFLAG (*(volatile unsigned int *)0x50004150)\r
+\r
+\r
+extern unsigned char _lc_ub_stack[];\r
+extern unsigned char _lc_vtor_value[];\r
+\r
+#pragma weak exit\r
+#pragma extern _Exit\r
+#pragma extern main\r
+extern int main( int argc, char *argv[] );\r
+extern void SystemInit( void );\r
+extern void __init( void );\r
+#if __PROF_ENABLE__\r
+extern void __prof_init( void );\r
+#endif\r
+\r
+#ifdef __POSIX__\r
+extern void * _posix_boot_stack_top;\r
+extern int posix_main( void );\r
+#endif\r
+\r
+#ifdef __USE_ARGC_ARGV\r
+#ifndef __ARGCV_BUFSIZE\r
+#define __ARGCV_BUFSIZE 256\r
+#endif\r
+static char argcv[__ARGCV_BUFSIZE];\r
+#endif\r
+\r
+void __interrupt() __frame() _START( void )\r
+{\r
+ PREF_PCON |= 0x00010000; /* Disable Branch prediction */\r
+ SCU_GCU_PEFLAG =0xFFFFFFFF; /* Clear existing parity errors if any */\r
+ SCU_GCU_PEEN = 0; /* Disable parity */\r
+\r
+ /*\r
+ * Anticipate possible ROM/RAM remapping\r
+ * by loading the 'real' program address.\r
+ */\r
+ __remap_pc();\r
+ /*\r
+ * Initialize stack pointer.\r
+ */\r
+ __setsp( _lc_ub_stack );\r
+ /*\r
+ * Call a user function which initializes hardware,\r
+ * such as ROM/RAM re-mapping or MMU configuration.\r
+ */\r
+ SystemInit();\r
+ /*\r
+ * Copy initialized sections from ROM to RAM\r
+ * and clear uninitialized data sections in RAM.\r
+ */\r
+ __init();\r
+ __asm( "_cptable_handled:" ); /* symbol may be used by debugger */\r
+\r
+ /*\r
+ * Load VTOR register with the actual vector table\r
+ * start address\r
+ */\r
+ VTOR = (unsigned int)_lc_vtor_value;\r
+ \r
+#ifdef __POSIX__\r
+ __setsp( _posix_boot_stack_top );\r
+#endif\r
+#if __PROF_ENABLE__\r
+ __prof_init();\r
+#endif\r
+#ifdef __POSIX__\r
+ exit( posix_main() );\r
+#elif defined __USE_ARGC_ARGV\r
+ exit( main( _argcv( argcv, __ARGCV_BUFSIZE ), (char **)argcv ) );\r
+#else\r
+ exit( main( 0, NULL ) );\r
+#endif\r
+ return;\r
+}\r
--- /dev/null
+/******************************************************************************\r
+ * @file system_XMC4500.c\r
+ * @brief Device specific initialization for the XMC4500-Series according to CMSIS\r
+ * @version V2.2\r
+ * @date 20. January 2012\r
+ *\r
+ * @note\r
+ * Copyright (C) 2011 Infineon Technologies AG. All rights reserved.\r
+\r
+ *\r
+ * @par\r
+ * Infineon Technologies AG (Infineon) is supplying this software for use with Infineon\92s microcontrollers. \r
+ * This file can be freely distributed within development tools that are supporting such microcontrollers. \r
+\r
+ *\r
+ * @par\r
+ * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+ * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+ * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+ *\r
+ *\r
+ ******************************************************************************/\r
+\r
+#include "system_XMC4500.h"\r
+#include <XMC4500.h>\r
+\r
+/*----------------------------------------------------------------------------\r
+ Define clocks is located in System_XMC4500.h\r
+ *----------------------------------------------------------------------------*/\r
+\r
+/*----------------------------------------------------------------------------\r
+ Clock Variable definitions\r
+ *----------------------------------------------------------------------------*/\r
+/*!< System Clock Frequency (Core Clock)*/\r
+uint32_t SystemCoreClock = CLOCK_OSC_HP;\r
+\r
+/*----------------------------------------------------------------------------\r
+ Keil pragma to prevent warnings\r
+ *----------------------------------------------------------------------------*/\r
+#if defined(__ARMCC_VERSION)\r
+#pragma diag_suppress 177\r
+#endif\r
+\r
+/*\r
+//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------\r
+*/\r
+\r
+\r
+\r
+/*--------------------- Watchdog Configuration -------------------------------\r
+//\r
+// <e> Watchdog Configuration\r
+// <o1.0> Disable Watchdog\r
+//\r
+// </e>\r
+*/\r
+#define WDT_SETUP 1\r
+#define WDTENB_nVal 0x00000001\r
+\r
+/*--------------------- CLOCK Configuration -------------------------------\r
+//\r
+// <e> Main Clock Configuration\r
+// <o1.0..1> CPU clock divider\r
+// <0=> fCPU = fSYS \r
+// <1=> fCPU = fSYS / 2\r
+// <o2.0..1> Peripheral Bus clock divider\r
+// <0=> fPB = fCPU\r
+// <1=> fPB = fCPU / 2\r
+// <o3.0..1> CCU Bus clock divider\r
+// <0=> fCCU = fCPU\r
+// <1=> fCCU = fCPU / 2\r
+//\r
+// </e>\r
+// \r
+*/\r
+\r
+#define SCU_CLOCK_SETUP 1\r
+#define SCU_CPUCLKCR_DIV 0x00000000\r
+#define SCU_PBCLKCR_DIV 0x00000000\r
+#define SCU_CCUCLKCR_DIV 0x00000000\r
+\r
+\r
+\r
+/*--------------------- USB CLOCK Configuration ---------------------------\r
+//\r
+// <e> USB Clock Configuration\r
+//\r
+// </e>\r
+// \r
+*/\r
+\r
+#define SCU_USB_CLOCK_SETUP 0\r
+\r
+\r
+/*--------------------- CLOCKOUT Configuration -------------------------------\r
+//\r
+// <e> Clock OUT Configuration\r
+// <o1.0..1> Clockout Source Selection\r
+// <0=> System Clock\r
+// <2=> USB Clock\r
+// <3=> Divided value of PLL Clock\r
+// <o2.0..1> Clockout Pin Selection\r
+// <0=> P1.15\r
+// <1=> P0.8\r
+// \r
+//\r
+// </e>\r
+// \r
+*/\r
+\r
+#define SCU_CLOCKOUT_SETUP 0 // recommended to keep disabled\r
+#define SCU_CLOCKOUT_SOURCE 0x00000000\r
+#define SCU_CLOCKOUT_PIN 0x00000000\r
+\r
+/*----------------------------------------------------------------------------\r
+ static functions declarations\r
+ *----------------------------------------------------------------------------*/\r
+#if (SCU_CLOCK_SETUP == 1)\r
+static int SystemClockSetup(void);\r
+#endif\r
+\r
+#if (SCU_USB_CLOCK_SETUP == 1)\r
+static void USBClockSetup(void);\r
+#endif\r
+\r
+/**\r
+ * @brief Setup the microcontroller system.\r
+ * Initialize the PLL and update the \r
+ * SystemCoreClock variable.\r
+ * @param None\r
+ * @retval None\r
+ */\r
+void SystemInit(void)\r
+{\r
+/* Setup the WDT */\r
+#if (WDT_SETUP == 1)\r
+WDT->CTR &= ~WDTENB_nVal; \r
+#endif\r
+\r
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)\r
+SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */\r
+ (3UL << 11*2) ); /* set CP11 Full Access */\r
+#endif\r
+\r
+/* Disable branch prediction - PCON.PBS = 1 */\r
+PREF->PCON |= (PREF_PCON_PBS_Msk);\r
+\r
+/* Enable unaligned memory access - SCB_CCR.UNALIGN_TRP = 0 */\r
+SCB->CCR &= ~(SCB_CCR_UNALIGN_TRP_Msk);\r
+\r
+/* Setup the clockout */\r
+/* README README README README README README README README README README */\r
+/*\r
+ * Please use the CLOCKOUT feature with diligence. Use this only if you know\r
+ * what you are doing.\r
+ *\r
+ * You must be aware that the settings below can potentially be in conflict\r
+ * with DAVE code generation engine preferences.\r
+ *\r
+ * Even worse, the setting below configures the ports as output ports while in\r
+ * reality, the board on which this chip is mounted may have a source driving\r
+ * the ports.\r
+ *\r
+ * So use this feature only when you are absolutely sure that the port must \r
+ * indeed be configured as an output AND you are NOT linking this startup code\r
+ * with code that was generated by DAVE code engine.\r
+ */\r
+#if (SCU_CLOCKOUT_SETUP == 1)\r
+SCU_CLK->EXTCLKCR |= SCU_CLOCKOUT_SOURCE;\r
+\r
+if (SCU_CLOCKOUT_PIN) {\r
+ PORT0->IOCR8 = 0x00000088; /*P0.8 --> ALT1 select + HWSEL */\r
+ PORT0->HWSEL &= (~PORT0_HWSEL_HW8_Msk);\r
+ }\r
+else PORT1->IOCR12 = 0x88000000; /*P1.15--> ALT1 select */\r
+#endif\r
+\r
+/* Setup the System clock */ \r
+#if (SCU_CLOCK_SETUP == 1)\r
+SystemClockSetup();\r
+#endif\r
+\r
+/* Setup the USB PL */ \r
+#if (SCU_USB_CLOCK_SETUP == 1)\r
+USBClockSetup();\r
+#endif\r
+\r
+}\r
+\r
+\r
+/**\r
+ * @brief Update SystemCoreClock according to Clock Register Values\r
+ * @note - \r
+ * @param None\r
+ * @retval None\r
+ */\r
+void SystemCoreClockUpdate(void)\r
+{\r
+\r
+/*----------------------------------------------------------------------------\r
+ Clock Variable definitions\r
+ *----------------------------------------------------------------------------*/\r
+SystemCoreClock = SYSTEM_FREQUENCY;/*!< System Clock Frequency (Core Clock)*/\r
+\r
+}\r
+\r
+\r
+/**\r
+ * @brief -\r
+ * @note - \r
+ * @param None\r
+ * @retval None\r
+ */\r
+#if (SCU_CLOCK_SETUP == 1)\r
+static int SystemClockSetup(void)\r
+{\r
+/* enable PLL first */\r
+ SCU_PLL->PLLCON0 &= ~(SCU_PLL_PLLCON0_VCOPWD_Msk | \r
+ SCU_PLL_PLLCON0_PLLPWD_Msk);\r
+\r
+/* Enable OSC_HP */\r
+ if (SCU_PLL_CLOCK_INPUT == SCU_CLOCK_CRYSTAL)\r
+ {\r
+ /* Enable the OSC_HP*/\r
+ SCU_OSC->OSCHPCTRL = (OSC_HP_MODE<<4); \r
+ /* Setup OSC WDG devider */\r
+ SCU_OSC->OSCHPCTRL |= (OSCHPWDGDIV<<16); \r
+ /* Select external OSC as PLL input */\r
+ SCU_PLL->PLLCON2 &= ~SCU_PLL_PLLCON2_PINSEL_Msk;\r
+ /* Restart OSC Watchdog */\r
+ SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_OSCRES_Msk; \r
+\r
+ do \r
+ {\r
+ ; /* here a timeout need to be added */\r
+ }while(!( (SCU_PLL->PLLSTAT) & \r
+ (SCU_PLL_PLLSTAT_PLLHV_Msk | SCU_PLL_PLLSTAT_PLLLV_Msk |\r
+ SCU_PLL_PLLSTAT_PLLSP_Msk)\r
+ )\r
+ ); \r
+\r
+ }\r
+\r
+/* Setup Main PLL */\r
+ /* Select FOFI as system clock */\r
+ if(SCU_CLK->SYSCLKCR != 0X000000)\r
+ SCU_CLK->SYSCLKCR = 0x00000000; /*Select FOFI*/\r
+\r
+ /* Go to bypass the Main PLL */\r
+ SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_VCOBYP_Msk;\r
+\r
+ /* disconnect OSC_HP to PLL */\r
+ SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_FINDIS_Msk;\r
+\r
+ /* Setup devider settings for main PLL */\r
+ SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | \r
+ (PLL_K2DIV_STEP_1<<16) | (PLL_PDIV<<24));\r
+\r
+ /* we may have to set OSCDISCDIS */\r
+ SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_OSCDISCDIS_Msk;\r
+\r
+ /* connect OSC_HP to PLL */\r
+ SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_FINDIS_Msk;\r
+\r
+ /* restart PLL Lock detection */\r
+ SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_RESLD_Msk;\r
+\r
+ /* wait for PLL Lock */\r
+ while (!(SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOLOCK_Msk));\r
+\r
+ /* Go back to the Main PLL */\r
+ SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_VCOBYP_Msk;\r
+\r
+ /*********************************************************\r
+ here we need to setup the system clock divider\r
+ *********************************************************/\r
+\r
+ SCU_CLK->CPUCLKCR = SCU_CPUCLKCR_DIV;\r
+ SCU_CLK->PBCLKCR = SCU_PBCLKCR_DIV; \r
+ SCU_CLK->CCUCLKCR = SCU_CCUCLKCR_DIV;\r
+\r
+ /* Switch system clock to PLL */\r
+ SCU_CLK->SYSCLKCR |= 0x00010000; \r
+ \r
+ /*********************************************************\r
+ here the ramp up of the system clock starts\r
+ *********************************************************/\r
+ /* Delay for next K2 step ~50µs */\r
+ /********************************/\r
+ /* Set reload register */\r
+ SysTick->LOAD = ((1250+100) & SysTick_LOAD_RELOAD_Msk) - 1;\r
+\r
+ /* Load the SysTick Counter Value */\r
+ SysTick->VAL = 0; \r
+\r
+ /* Enable SysTick IRQ and SysTick Timer */\r
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |\r
+ SysTick_CTRL_ENABLE_Msk; \r
+ \r
+ /* wait for ~50µs */\r
+ while (SysTick->VAL >= 100); \r
+\r
+ /* Stop SysTick Timer */\r
+ SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; \r
+ /********************************/\r
+\r
+ /* Setup devider settings for main PLL */\r
+ SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | \r
+ (PLL_K2DIV_STEP_2<<16) | (PLL_PDIV<<24));\r
+\r
+ /* Delay for next K2 step ~50µs */\r
+ /********************************/\r
+ SysTick->LOAD = ((3000+100) & SysTick_LOAD_RELOAD_Msk) - 1;\r
+\r
+ /* Load the SysTick Counter Value */\r
+ SysTick->VAL = 0;\r
+\r
+ /* Enable SysTick IRQ and SysTick Timer */\r
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;\r
+ \r
+ /* Wait for ~50µs */\r
+ while (SysTick->VAL >= 100); \r
+\r
+ /* Stop SysTick Timer */\r
+ SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; \r
+ /********************************/\r
+\r
+ /* Setup devider settings for main PLL */\r
+ SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | \r
+ (PLL_K2DIV_STEP_3<<16) | (PLL_PDIV<<24));\r
+\r
+ /* Delay for next K2 step ~50µs */\r
+ /********************************/\r
+ SysTick->LOAD = ((4800+100) & SysTick_LOAD_RELOAD_Msk) - 1;\r
+\r
+ /* Load the SysTick Counter Value */\r
+ SysTick->VAL = 0; \r
+\r
+ /* Enable SysTick IRQ and SysTick Timer */\r
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;\r
+ \r
+ /* Wait for ~50µs */\r
+ while (SysTick->VAL >= 100); \r
+\r
+ /* Stop SysTick Timer */\r
+ SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; \r
+ /********************************/\r
+\r
+ /* Setup devider settings for main PLL */\r
+ SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | (PLL_K2DIV<<16) | \r
+ (PLL_PDIV<<24));\r
+\r
+ /* clear request for System OCS Watchdog Trap and System VCO Lock Trap */\r
+ SCU_TRAP->TRAPCLR = SCU_TRAP_TRAPCLR_SOSCWDGT_Msk | \r
+ SCU_TRAP_TRAPCLR_SVCOLCKT_Msk; \r
+\r
+ return(1);\r
+\r
+}\r
+#endif\r
+\r
+/**\r
+ * @brief -\r
+ * @note - \r
+ * @param None\r
+ * @retval None\r
+ */\r
+#if(SCU_USB_CLOCK_SETUP == 1)\r
+static void USBClockSetup(void)\r
+{\r
+/* enable PLL first */\r
+ SCU_PLL->USBPLLCON &= ~(SCU_PLL_USBPLLCON_VCOPWD_Msk | \r
+ SCU_PLL_USBPLLCON_PLLPWD_Msk);\r
+\r
+/* check and if not already running enable OSC_HP */\r
+ if(!((SCU_PLL->PLLSTAT) & \r
+ (SCU_PLL_PLLSTAT_PLLHV_Msk | \r
+ SCU_PLL_PLLSTAT_PLLLV_Msk |SCU_PLL_PLLSTAT_PLLSP_Msk)))\r
+ {\r
+ if (SCU_PLL_CLOCK_INPUT == SCU_CLOCK_CRYSTAL)\r
+ {\r
+ \r
+ SCU_OSC->OSCHPCTRL = (OSC_HP_MODE<<4); /*enable the OSC_HP*/\r
+ /* setup OSC WDG devider */\r
+ SCU_OSC->OSCHPCTRL |= (OSCHPWDGDIV<<16); \r
+ /* select external OSC as PLL input */\r
+ SCU_PLL->PLLCON2 &= ~SCU_PLL_PLLCON2_PINSEL_Msk;\r
+ /* restart OSC Watchdog */\r
+ SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_OSCRES_Msk; \r
+ \r
+ do \r
+ {\r
+ ; /* here a timeout need to be added */\r
+ }while(!((SCU_PLL->PLLSTAT) & (SCU_PLL_PLLSTAT_PLLHV_Msk | \r
+ SCU_PLL_PLLSTAT_PLLLV_Msk |SCU_PLL_PLLSTAT_PLLSP_Msk))); \r
+ \r
+ }\r
+ }\r
+\r
+\r
+/* Setup USB PLL */\r
+ /* Go to bypass the Main PLL */\r
+ SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_VCOBYP_Msk;\r
+ /* disconnect OSC_FI to PLL */\r
+ SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_FINDIS_Msk;\r
+ /* Setup devider settings for main PLL */\r
+ SCU_PLL->USBPLLCON = ((USBPLL_NDIV<<8) | (USBPLL_PDIV<<24));\r
+ /* we may have to set OSCDISCDIS */\r
+ SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_OSCDISCDIS_Msk;\r
+ /* connect OSC_FI to PLL */\r
+ SCU_PLL->USBPLLCON &= ~SCU_PLL_USBPLLCON_FINDIS_Msk;\r
+ /* restart PLL Lock detection */\r
+ SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_RESLD_Msk;\r
+ /* wait for PLL Lock */\r
+ while (!(SCU_PLL->USBPLLSTAT & SCU_PLL_USBPLLSTAT_VCOLOCK_Msk));\r
+ }\r
+#endif\r
--- /dev/null
+/*\r
+ FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/******************************************************************************\r
+ * This project provides two demo applications. A simple blinky style project,\r
+ * and a more comprehensive test and demo application. The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting (defined in this file) is used to\r
+ * select between the two. The simply blinky demo is implemented and described\r
+ * in main_blinky.c. The more comprehensive test and demo application is\r
+ * implemented and described in main_full.c.\r
+ *\r
+ * This file implements the code that is not demo specific, including the\r
+ * hardware setup and FreeRTOS hook functions.\r
+ *\r
+ * \r
+ * Additional code:\r
+ * \r
+ * This demo does not contain a non-kernel interrupt service routine that\r
+ * can be used as an example for application writers to use as a reference.\r
+ * Therefore, the framework of a dummy (not installed) handler is provided\r
+ * in this file. The dummy function is called Dummy_IRQHandler(). Please\r
+ * ensure to read the comments in the function itself, but more importantly,\r
+ * the notes on the function contained on the documentation page for this demo\r
+ * that is found on the FreeRTOS.org web site.\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Hardware includes. */\r
+#include "XMC4500.h"\r
+#include "System_XMC4500.h"\r
+\r
+/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,\r
+or 0 to run the more comprehensive test and demo application. */\r
+#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 0\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Set up the hardware ready to run this demo.\r
+ */\r
+static void prvSetupHardware( void );\r
+\r
+/* \r
+ * main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.\r
+ * main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0. \r
+ */\r
+extern void main_blinky( void );\r
+extern void main_full( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+int main( void )\r
+{\r
+ /* Prepare the hardware to run this demo. */\r
+ prvSetupHardware();\r
+\r
+ /* The mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting is described at the top\r
+ of this file. */\r
+ #if mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1\r
+ {\r
+ main_blinky();\r
+ }\r
+ #else\r
+ {\r
+ main_full();\r
+ }\r
+ #endif\r
+\r
+ return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetupHardware( void )\r
+{\r
+extern void SystemCoreClockUpdate( void );\r
+\r
+ /* Ensure SystemCoreClock variable is set. */\r
+ SystemCoreClockUpdate();\r
+\r
+ /* Configure pin P3.9 for the LED. */\r
+ PORT3->IOCR8 = 0x00008000;\r
+\r
+ /* Ensure all priority bits are assigned as preemption priority bits. */\r
+ NVIC_SetPriorityGrouping( 0 );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationMallocFailedHook( void )\r
+{\r
+ /* vApplicationMallocFailedHook() will only be called if\r
+ configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook\r
+ function that will get called if a call to pvPortMalloc() fails.\r
+ pvPortMalloc() is called internally by the kernel whenever a task, queue,\r
+ timer or semaphore is created. It is also called by various parts of the\r
+ demo application. If heap_1.c or heap_2.c are used, then the size of the\r
+ heap available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in\r
+ FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used\r
+ to query the size of free heap space that remains (although it does not\r
+ provide information on how the remaining heap might be fragmented). */\r
+ taskDISABLE_INTERRUPTS();\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationIdleHook( void )\r
+{\r
+ /* vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set\r
+ to 1 in FreeRTOSConfig.h. It will be called on each iteration of the idle\r
+ task. It is essential that code added to this hook function never attempts\r
+ to block in any way (for example, call xQueueReceive() with a block time\r
+ specified, or call vTaskDelay()). If the application makes use of the\r
+ vTaskDelete() API function (as this demo application does) then it is also\r
+ important that vApplicationIdleHook() is permitted to return to its calling\r
+ function, because it is the responsibility of the idle task to clean up\r
+ memory allocated by the kernel to any task that has since been deleted. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationStackOverflowHook( xTaskHandle pxTask, signed char *pcTaskName )\r
+{\r
+ ( void ) pcTaskName;\r
+ ( void ) pxTask;\r
+\r
+ /* Run time stack overflow checking is performed if\r
+ configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook\r
+ function is called if a stack overflow is detected. */\r
+ taskDISABLE_INTERRUPTS();\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationTickHook( void )\r
+{\r
+ /* This function will be called by each tick interrupt if \r
+ configUSE_TICK_HOOK is set to 1 in FreeRTOSConfig.h. User code can be\r
+ added here, but the tick hook is called from an interrupt context, so\r
+ code must not attempt to block, and only the interrupt safe FreeRTOS API\r
+ functions can be used (those that end in FromISR()). */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+#ifdef JUST_AN_EXAMPLE_ISR\r
+\r
+void Dummy_IRQHandler(void)\r
+{\r
+long lHigherPriorityTaskWoken = pdFALSE;\r
+\r
+ /* Clear the interrupt if necessary. */\r
+ Dummy_ClearITPendingBit();\r
+ \r
+ /* This interrupt does nothing more than demonstrate how to synchronise a\r
+ task with an interrupt. A semaphore is used for this purpose. Note\r
+ lHigherPriorityTaskWoken is initialised to zero. */\r
+ xSemaphoreGiveFromISR( xTestSemaphore, &lHigherPriorityTaskWoken );\r
+ \r
+ /* If there was a task that was blocked on the semaphore, and giving the\r
+ semaphore caused the task to unblock, and the unblocked task has a priority\r
+ higher than the current Running state task (the task that this interrupt\r
+ interrupted), then lHigherPriorityTaskWoken will have been set to pdTRUE\r
+ internally within xSemaphoreGiveFromISR(). Passing pdTRUE into the \r
+ portEND_SWITCHING_ISR() macro will result in a context switch being pended to\r
+ ensure this interrupt returns directly to the unblocked, higher priority, \r
+ task. Passing pdFALSE into portEND_SWITCHING_ISR() has no effect. */\r
+ portEND_SWITCHING_ISR( lHigherPriorityTaskWoken );\r
+}\r
+\r
+#endif /* JUST_AN_EXAMPLE_ISR */\r
--- /dev/null
+/*\r
+ FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/******************************************************************************\r
+ * NOTE 1: This project provides two demo applications. A simple blinky style\r
+ * project, and a more comprehensive test and demo application. The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
+ * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
+ * in main.c. This file implements the simply blinky style version.\r
+ *\r
+ * NOTE 2: This file only contains the source code that is specific to the\r
+ * basic demo. Generic functions, such FreeRTOS hook functions, and functions\r
+ * required to configure the hardware, are defined in main.c.\r
+ ******************************************************************************\r
+ *\r
+ * main_blinky() creates one queue, and two tasks. It then starts the\r
+ * scheduler.\r
+ *\r
+ * The Queue Send Task:\r
+ * The queue send task is implemented by the prvQueueSendTask() function in\r
+ * this file. prvQueueSendTask() sits in a loop that causes it to repeatedly\r
+ * block for 200 milliseconds, before sending the value 100 to the queue that\r
+ * was created within main_blinky(). Once the value is sent, the task loops\r
+ * back around to block for another 200 milliseconds.\r
+ *\r
+ * The Queue Receive Task:\r
+ * The queue receive task is implemented by the prvQueueReceiveTask() function\r
+ * in this file. prvQueueReceiveTask() sits in a loop where it repeatedly\r
+ * blocks on attempts to read data from the queue that was created within\r
+ * main_blinky(). When data is received, the task checks the value of the\r
+ * data, and if the value equals the expected 100, toggles the LED. The 'block\r
+ * time' parameter passed to the queue receive function specifies that the\r
+ * task should be held in the Blocked state indefinitely to wait for data to\r
+ * be available on the queue. The queue receive task will only leave the\r
+ * Blocked state when the queue send task writes to the queue. As the queue\r
+ * send task writes to the queue every 200 milliseconds, the queue receive\r
+ * task leaves the Blocked state every 200 milliseconds, and therefore toggles\r
+ * the LED every 200 milliseconds.\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "semphr.h"\r
+\r
+/* Hardware includes. */\r
+#include "XMC4500.h"\r
+#include "System_XMC4500.h"\r
+\r
+/* Priorities at which the tasks are created. */\r
+#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
+#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )\r
+\r
+/* The rate at which data is sent to the queue. The 200ms value is converted\r
+to ticks using the portTICK_RATE_MS constant. */\r
+#define mainQUEUE_SEND_FREQUENCY_MS ( 200 / portTICK_RATE_MS )\r
+\r
+/* The number of items the queue can hold. This is 1 as the receive task\r
+will remove items as they are added, meaning the send task should always find\r
+the queue empty. */\r
+#define mainQUEUE_LENGTH ( 1 )\r
+\r
+/* Values passed to the two tasks just to check the task parameter\r
+functionality. */\r
+#define mainQUEUE_SEND_PARAMETER ( 0x1111UL )\r
+#define mainQUEUE_RECEIVE_PARAMETER ( 0x22UL )\r
+\r
+/* To toggle the single LED */\r
+#define mainTOGGLE_LED() ( PORT3->OMR = 0x02000200 )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The tasks as described in the comments at the top of this file.\r
+ */\r
+static void prvQueueReceiveTask( void *pvParameters );\r
+static void prvQueueSendTask( void *pvParameters );\r
+\r
+/*\r
+ * Called by main() to create the simply blinky style application if\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.\r
+ */\r
+void main_blinky( void );\r
+\r
+/*\r
+ * The hardware only has a single LED. Simply toggle it.\r
+ */\r
+extern void vMainToggleLED( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The queue used by both tasks. */\r
+static xQueueHandle xQueue = NULL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void main_blinky( void )\r
+{\r
+ /* Create the queue. */\r
+ xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( unsigned long ) );\r
+\r
+ if( xQueue != NULL )\r
+ {\r
+ /* Start the two tasks as described in the comments at the top of this\r
+ file. */\r
+ xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */\r
+ ( signed char * ) "Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */\r
+ configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */\r
+ ( void * ) mainQUEUE_RECEIVE_PARAMETER, /* The parameter passed to the task - just to check the functionality. */\r
+ mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */\r
+ NULL ); /* The task handle is not required, so NULL is passed. */\r
+\r
+ xTaskCreate( prvQueueSendTask, ( signed char * ) "TX", configMINIMAL_STACK_SIZE, ( void * ) mainQUEUE_SEND_PARAMETER, mainQUEUE_SEND_TASK_PRIORITY, NULL );\r
+\r
+ /* Start the tasks and timer running. */\r
+ vTaskStartScheduler();\r
+ }\r
+\r
+ /* If all is well, the scheduler will now be running, and the following\r
+ line will never be reached. If the following line does execute, then\r
+ there was insufficient FreeRTOS heap memory available for the idle and/or\r
+ timer tasks to be created. See the memory management section on the\r
+ FreeRTOS web site for more details. */\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvQueueSendTask( void *pvParameters )\r
+{\r
+portTickType xNextWakeTime;\r
+const unsigned long ulValueToSend = 100UL;\r
+\r
+ /* Check the task parameter is as expected. */\r
+ configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_SEND_PARAMETER );\r
+\r
+ /* Initialise xNextWakeTime - this only needs to be done once. */\r
+ xNextWakeTime = xTaskGetTickCount();\r
+\r
+ for( ;; )\r
+ {\r
+ /* Place this task in the blocked state until it is time to run again.\r
+ The block time is specified in ticks, the constant used converts ticks\r
+ to ms. While in the Blocked state this task will not consume any CPU\r
+ time. */\r
+ vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );\r
+\r
+ /* Send to the queue - causing the queue receive task to unblock and\r
+ toggle the LED. 0 is used as the block time so the sending operation\r
+ will not block - it shouldn't need to block as the queue should always\r
+ be empty at this point in the code. */\r
+ xQueueSend( xQueue, &ulValueToSend, 0U );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvQueueReceiveTask( void *pvParameters )\r
+{\r
+unsigned long ulReceivedValue;\r
+\r
+ /* Check the task parameter is as expected. */\r
+ configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_RECEIVE_PARAMETER );\r
+\r
+ for( ;; )\r
+ {\r
+ /* Wait until something arrives in the queue - this task will block\r
+ indefinitely provided INCLUDE_vTaskSuspend is set to 1 in\r
+ FreeRTOSConfig.h. */\r
+ xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );\r
+\r
+ /* To get here something must have been received from the queue, but\r
+ is it the expected value? If it is, toggle the LED. */\r
+ if( ulReceivedValue == 100UL )\r
+ {\r
+ mainTOGGLE_LED();\r
+ ulReceivedValue = 0U;\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/******************************************************************************\r
+ * NOTE 1: This project provides two demo applications. A simple blinky style\r
+ * project, and a more comprehensive test and demo application. The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
+ * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
+ * in main.c. This file implements the comprehensive test and demo version.\r
+ *\r
+ * NOTE 2: This file only contains the source code that is specific to the\r
+ * full demo. Generic functions, such FreeRTOS hook functions, and functions\r
+ * required to configure the hardware, are defined in main.c.\r
+ ******************************************************************************\r
+ *\r
+ * main_full() creates all the demo application tasks and a software timer, then\r
+ * starts the scheduler. The web documentation provides more details of the \r
+ * standard demo application tasks, which provide no particular functionality, \r
+ * but do provide a good example of how to use the FreeRTOS API.\r
+ *\r
+ * In addition to the standard demo tasks, the following tasks and tests are\r
+ * defined and/or created within this file:\r
+ *\r
+ * "Reg test" tasks - These fill both the core and floating point registers with\r
+ * known values, then check that each register maintains its expected value for\r
+ * the lifetime of the task. Each task uses a different set of values. The reg\r
+ * test tasks execute with a very low priority, so get preempted very\r
+ * frequently. A register containing an unexpected value is indicative of an\r
+ * error in the context switching mechanism.\r
+ *\r
+ * "Check" timer - The check software timer period is initially set to three\r
+ * seconds. The callback function associated with the check software timer\r
+ * checks that all the standard demo tasks, and the register check tasks, are\r
+ * not only still executing, but are executing without reporting any errors. If\r
+ * the check software timer discovers that a task has either stalled, or\r
+ * reported an error, then it changes its own execution period from the initial\r
+ * three seconds, to just 200ms. The check software timer callback function\r
+ * also toggles the single LED each time it is called. This provides a visual\r
+ * indication of the system status: If the LED toggles every three seconds,\r
+ * then no issues have been discovered. If the LED toggles every 200ms, then\r
+ * an issue has been discovered with at least one task.\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "timers.h"\r
+#include "semphr.h"\r
+\r
+/* Standard demo application includes. */\r
+#include "flop.h"\r
+#include "integer.h"\r
+#include "PollQ.h"\r
+#include "semtest.h"\r
+#include "dynamic.h"\r
+#include "BlockQ.h"\r
+#include "blocktim.h"\r
+#include "countsem.h"\r
+#include "GenQTest.h"\r
+#include "recmutex.h"\r
+#include "death.h"\r
+\r
+/* Hardware includes. */\r
+#include "XMC4500.h"\r
+#include "System_XMC4500.h"\r
+\r
+/* Priorities for the demo application tasks. */\r
+#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2UL )\r
+#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )\r
+#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )\r
+#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL )\r
+#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
+\r
+/* To toggle the single LED */\r
+#define mainTOGGLE_LED() ( PORT3->OMR = 0x02000200 )\r
+\r
+/* A block time of zero simply means "don't block". */\r
+#define mainDONT_BLOCK ( 0UL )\r
+\r
+/* The period after which the check timer will expire, in ms, provided no errors\r
+have been reported by any of the standard demo tasks. ms are converted to the\r
+equivalent in ticks using the portTICK_RATE_MS constant. */\r
+#define mainCHECK_TIMER_PERIOD_MS ( 3000UL / portTICK_RATE_MS )\r
+\r
+/* The period at which the check timer will expire, in ms, if an error has been\r
+reported in one of the standard demo tasks. ms are converted to the equivalent\r
+in ticks using the portTICK_RATE_MS constant. */\r
+#define mainERROR_CHECK_TIMER_PERIOD_MS ( 200UL / portTICK_RATE_MS )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The check timer callback function, as described at the top of this file.\r
+ */\r
+static void prvCheckTimerCallback( xTimerHandle xTimer );\r
+\r
+/*\r
+ * Register check tasks, and the tasks used to write over and check the contents\r
+ * of the FPU registers, as described at the top of this file. The nature of\r
+ * these files necessitates that they are written in an assembly file.\r
+ */\r
+static void vRegTest1Task( void *pvParameters );\r
+static void vRegTest2Task( void *pvParameters );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The following two variables are used to communicate the status of the\r
+register check tasks to the check software timer. If the variables keep\r
+incrementing, then the register check tasks has not discovered any errors. If\r
+a variable stops incrementing, then an error has been found. */\r
+volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void main_full( void )\r
+{\r
+xTimerHandle xCheckTimer = NULL;\r
+\r
+ /* Start all the other standard demo/test tasks. The have not particular\r
+ functionality, but do demonstrate how to use the FreeRTOS API and test the\r
+ kernel port. */\r
+ vStartIntegerMathTasks( tskIDLE_PRIORITY );\r
+ vStartDynamicPriorityTasks();\r
+ vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+ vCreateBlockTimeTasks();\r
+ vStartCountingSemaphoreTasks();\r
+ vStartGenericQueueTasks( tskIDLE_PRIORITY );\r
+ vStartRecursiveMutexTasks();\r
+ vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
+ vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
+ vStartMathTasks( mainFLOP_TASK_PRIORITY );\r
+ \r
+ /* Create the register check tasks, as described at the top of this\r
+ file */\r
+ xTaskCreate( vRegTest1Task, ( signed char * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, NULL );\r
+ xTaskCreate( vRegTest2Task, ( signed char * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, NULL );\r
+\r
+ /* Create the software timer that performs the 'check' functionality,\r
+ as described at the top of this file. */\r
+ xCheckTimer = xTimerCreate( ( const signed char * ) "CheckTimer",/* A text name, purely to help debugging. */\r
+ ( mainCHECK_TIMER_PERIOD_MS ), /* The timer period, in this case 3000ms (3s). */\r
+ pdTRUE, /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */\r
+ ( void * ) 0, /* The ID is not used, so can be set to anything. */\r
+ prvCheckTimerCallback /* The callback function that inspects the status of all the other tasks. */\r
+ ); \r
+ \r
+ if( xCheckTimer != NULL )\r
+ {\r
+ xTimerStart( xCheckTimer, mainDONT_BLOCK );\r
+ }\r
+\r
+ /* The set of tasks created by the following function call have to be \r
+ created last as they keep account of the number of tasks they expect to see \r
+ running. */\r
+ vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
+\r
+ /* Start the scheduler. */\r
+ vTaskStartScheduler();\r
+ \r
+ /* If all is well, the scheduler will now be running, and the following line\r
+ will never be reached. If the following line does execute, then there was\r
+ insufficient FreeRTOS heap memory available for the idle and/or timer tasks\r
+ to be created. See the memory management section on the FreeRTOS web site\r
+ for more details. */\r
+ for( ;; ); \r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvCheckTimerCallback( xTimerHandle xTimer )\r
+{\r
+static long lChangedTimerPeriodAlready = pdFALSE;\r
+static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;\r
+unsigned long ulErrorFound = pdFALSE;\r
+\r
+ /* Check all the demo tasks (other than the flash tasks) to ensure\r
+ that they are all still running, and that none have detected an error. */\r
+\r
+ if( xAreMathsTaskStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if ( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xIsCreateTaskStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xArePollingQueuesStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+ \r
+ /* Check that the register test 1 task is still running. */\r
+ if( ulLastRegTest1Value == ulRegTest1LoopCounter )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+ ulLastRegTest1Value = ulRegTest1LoopCounter;\r
+\r
+ /* Check that the register test 2 task is still running. */\r
+ if( ulLastRegTest2Value == ulRegTest2LoopCounter )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+ ulLastRegTest2Value = ulRegTest2LoopCounter;\r
+\r
+ /* Toggle the check LED to give an indication of the system status. If\r
+ the LED toggles every mainCHECK_TIMER_PERIOD_MS milliseconds then\r
+ everything is ok. A faster toggle indicates an error. */\r
+ mainTOGGLE_LED(); \r
+ \r
+ /* Have any errors been latch in ulErrorFound? If so, shorten the\r
+ period of the check timer to mainERROR_CHECK_TIMER_PERIOD_MS milliseconds.\r
+ This will result in an increase in the rate at which mainCHECK_LED\r
+ toggles. */\r
+ if( ulErrorFound != pdFALSE )\r
+ {\r
+ if( lChangedTimerPeriodAlready == pdFALSE )\r
+ {\r
+ lChangedTimerPeriodAlready = pdTRUE;\r
+ \r
+ /* This call to xTimerChangePeriod() uses a zero block time.\r
+ Functions called from inside of a timer callback function must\r
+ *never* attempt to block. */\r
+ xTimerChangePeriod( xTimer, ( mainERROR_CHECK_TIMER_PERIOD_MS ), mainDONT_BLOCK );\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* This is a naked function. */\r
+static void vRegTest1Task( void *pvParameters )\r
+{\r
+ __asm volatile\r
+ (\r
+ " \n" /* Fill the core registers with known values. */\r
+ " mov r0, #100 \n"\r
+ " mov r1, #101 \n"\r
+ " mov r2, #102 \n"\r
+ " mov r3, #103 \n"\r
+ " mov r4, #104 \n"\r
+ " mov r5, #105 \n"\r
+ " mov r6, #106 \n"\r
+ " mov r7, #107 \n"\r
+ " mov r8, #108 \n"\r
+ " mov r9, #109 \n"\r
+ " mov r10, #110 \n"\r
+ " mov r11, #111 \n"\r
+ " mov r12, #112 \n"\r
+ " \n"\r
+ " vmov d0, r0, r1 \n" /* Fill the VFP registers with known values. */\r
+ " vmov d1, r2, r3 \n"\r
+ " vmov d2, r4, r5 \n"\r
+ " vmov d3, r6, r7 \n"\r
+ " vmov d4, r8, r9 \n"\r
+ " vmov d5, r10, r11 \n"\r
+ " vmov d6, r0, r1 \n"\r
+ " vmov d7, r2, r3 \n"\r
+ " vmov d8, r4, r5 \n"\r
+ " vmov d9, r6, r7 \n"\r
+ " vmov d10, r8, r9 \n"\r
+ " vmov d11, r10, r11 \n"\r
+ " vmov d12, r0, r1 \n"\r
+ " vmov d13, r2, r3 \n"\r
+ " vmov d14, r4, r5 \n"\r
+ " vmov d15, r6, r7 \n"\r
+ " \n"\r
+ "reg1_loop: \n" /* Check all the VFP registers still contain the values set above." */\r
+ " push { r0-r1 } \n" /* First save registers that are clobbered by the test. */\r
+ " \n"\r
+ " vmov r0, r1, d0 \n"\r
+ " cmp r0, #100 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #101 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " vmov r0, r1, d1 \n"\r
+ " cmp r0, #102 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #103 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " vmov r0, r1, d2 \n"\r
+ " cmp r0, #104 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #105 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " vmov r0, r1, d3 \n"\r
+ " cmp r0, #106 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #107 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " vmov r0, r1, d4 \n"\r
+ " cmp r0, #108 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #109 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " vmov r0, r1, d5 \n"\r
+ " cmp r0, #110 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #111 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " vmov r0, r1, d6 \n"\r
+ " cmp r0, #100 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #101 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " vmov r0, r1, d7 \n"\r
+ " cmp r0, #102 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #103 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " vmov r0, r1, d8 \n"\r
+ " cmp r0, #104 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #105 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " vmov r0, r1, d9 \n"\r
+ " cmp r0, #106 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #107 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " vmov r0, r1, d10 \n"\r
+ " cmp r0, #108 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #109 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " vmov r0, r1, d11 \n"\r
+ " cmp r0, #110 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #111 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " vmov r0, r1, d12 \n"\r
+ " cmp r0, #100 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #101 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " vmov r0, r1, d13 \n"\r
+ " cmp r0, #102 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #103 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " vmov r0, r1, d14 \n"\r
+ " cmp r0, #104 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #105 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " vmov r0, r1, d15 \n"\r
+ " cmp r0, #106 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " cmp r1, #107 \n"\r
+ " bne reg1_error_loopf \n"\r
+ " \n"\r
+ " pop {r0-r1} \n" /* Restore the registers that were clobbered by the test. */\r
+ " \n"\r
+ " b reg1_loopf_pass \n" /* VFP register test passed. Jump to the core register test. */\r
+ " \n"\r
+ "reg1_error_loopf: \n"\r
+ " b reg1_error_loopf \n" /* If this line is hit then a VFP register value was found to be\n incorrect. */\r
+ " \n"\r
+ "reg1_loopf_pass: \n"\r
+ " \n"\r
+ " cmp r0, #100 \n"\r
+ " bne reg1_error_loop \n"\r
+ " cmp r1, #101 \n"\r
+ " bne reg1_error_loop \n"\r
+ " cmp r2, #102 \n"\r
+ " bne reg1_error_loop \n"\r
+ " cmp r3, #103 \n"\r
+ " bne reg1_error_loop \n"\r
+ " cmp r4, #104 \n"\r
+ " bne reg1_error_loop \n"\r
+ " cmp r5, #105 \n"\r
+ " bne reg1_error_loop \n"\r
+ " cmp r6, #106 \n"\r
+ " bne reg1_error_loop \n"\r
+ " cmp r7, #107 \n"\r
+ " bne reg1_error_loop \n"\r
+ " cmp r8, #108 \n"\r
+ " bne reg1_error_loop \n"\r
+ " cmp r9, #109 \n"\r
+ " bne reg1_error_loop \n"\r
+ " cmp r10, #110 \n"\r
+ " bne reg1_error_loop \n"\r
+ " cmp r11, #111 \n"\r
+ " bne reg1_error_loop \n"\r
+ " cmp r12, #112 \n"\r
+ " bne reg1_error_loop \n"\r
+ " \n"\r
+ " push { r0-r1 } \n" /* Everything passed, increment the loop counter. */\r
+ " ldr r0, =ulRegTest1LoopCounter \n"\r
+ " ldr r1, [r0] \n"\r
+ " adds r1, r1, #1 \n"\r
+ " str r1, [r0] \n"\r
+ " pop { r0-r1 } \n"\r
+ " \n"\r
+ " b reg1_loop \n" /* Start again. */\r
+ " \n"\r
+ "reg1_error_loop: \n" /* If this line is hit then there was an error in a core register value. */\r
+ " b reg1_error_loop \n" /* The loop ensures the loop counter stops incrementing. */\r
+ " nop "\r
+ );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* This is a naked function. */\r
+static void vRegTest2Task( void *pvParameters )\r
+{\r
+ __asm volatile\r
+ (\r
+ " mov r0, #-1 \n" /* Set all the core registers to known values. */\r
+ " mov r1, #1 \n"\r
+ " mov r2, #2 \n"\r
+ " mov r3, #3 \n"\r
+ " mov r4, #4 \n"\r
+ " mov r5, #5 \n"\r
+ " mov r6, #6 \n"\r
+ " mov r7, #7 \n"\r
+ " mov r8, #8 \n"\r
+ " mov r9, #9 \n"\r
+ " mov r10, #10 \n"\r
+ " mov r11, #11 \n"\r
+ " mov r12, #12 \n"\r
+ " \n"\r
+ " vmov d0, r0, r1 \n" /* Set all the VFP to known values. */\r
+ " vmov d1, r2, r3 \n"\r
+ " vmov d2, r4, r5 \n"\r
+ " vmov d3, r6, r7 \n"\r
+ " vmov d4, r8, r9 \n"\r
+ " vmov d5, r10, r11 \n"\r
+ " vmov d6, r0, r1 \n"\r
+ " vmov d7, r2, r3 \n"\r
+ " vmov d8, r4, r5 \n"\r
+ " vmov d9, r6, r7 \n"\r
+ " vmov d10, r8, r9 \n"\r
+ " vmov d11, r10, r11 \n"\r
+ " vmov d12, r0, r1 \n"\r
+ " vmov d13, r2, r3 \n"\r
+ " vmov d14, r4, r5 \n"\r
+ " vmov d15, r6, r7 \n"\r
+ " \n"\r
+ "reg2_loop: \n"\r
+ " \n"\r
+ " push { r0-r1 } \n" /* Check all the VFP registers still contain the values set above. */\r
+ " vmov r0, r1, d0 \n" /*First save registers that are clobbered by the test. */\r
+ " cmp r0, #-1 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #1 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " vmov r0, r1, d1 \n"\r
+ " cmp r0, #2 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #3 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " vmov r0, r1, d2 \n"\r
+ " cmp r0, #4 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #5 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " vmov r0, r1, d3 \n"\r
+ " cmp r0, #6 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #7 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " vmov r0, r1, d4 \n"\r
+ " cmp r0, #8 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #9 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " vmov r0, r1, d5 \n"\r
+ " cmp r0, #10 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #11 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " vmov r0, r1, d6 \n"\r
+ " cmp r0, #-1 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #1 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " vmov r0, r1, d7 \n"\r
+ " cmp r0, #2 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #3 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " vmov r0, r1, d8 \n"\r
+ " cmp r0, #4 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #5 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " vmov r0, r1, d9 \n"\r
+ " cmp r0, #6 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #7 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " vmov r0, r1, d10 \n"\r
+ " cmp r0, #8 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #9 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " vmov r0, r1, d11 \n"\r
+ " cmp r0, #10 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #11 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " vmov r0, r1, d12 \n"\r
+ " cmp r0, #-1 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #1 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " vmov r0, r1, d13 \n"\r
+ " cmp r0, #2 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #3 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " vmov r0, r1, d14 \n"\r
+ " cmp r0, #4 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #5 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " vmov r0, r1, d15 \n"\r
+ " cmp r0, #6 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " cmp r1, #7 \n"\r
+ " bne reg2_error_loopf \n"\r
+ " \n"\r
+ " pop {r0-r1} \n" /* Restore the registers that were clobbered by the test. */\r
+ " \n"\r
+ " b reg2_loopf_pass \n" /* VFP register test passed. Jump to the core register test. */\r
+ " \n"\r
+ "reg2_error_loopf: \n"\r
+ " b reg2_error_loopf \n" /* If this line is hit then a VFP register value was found to be incorrect. */\r
+ " \n"\r
+ "reg2_loopf_pass: \n"\r
+ " \n"\r
+ " cmp r0, #-1 \n"\r
+ " bne reg2_error_loop \n"\r
+ " cmp r1, #1 \n"\r
+ " bne reg2_error_loop \n"\r
+ " cmp r2, #2 \n"\r
+ " bne reg2_error_loop \n"\r
+ " cmp r3, #3 \n"\r
+ " bne reg2_error_loop \n"\r
+ " cmp r4, #4 \n"\r
+ " bne reg2_error_loop \n"\r
+ " cmp r5, #5 \n"\r
+ " bne reg2_error_loop \n"\r
+ " cmp r6, #6 \n"\r
+ " bne reg2_error_loop \n"\r
+ " cmp r7, #7 \n"\r
+ " bne reg2_error_loop \n"\r
+ " cmp r8, #8 \n"\r
+ " bne reg2_error_loop \n"\r
+ " cmp r9, #9 \n"\r
+ " bne reg2_error_loop \n"\r
+ " cmp r10, #10 \n"\r
+ " bne reg2_error_loop \n"\r
+ " cmp r11, #11 \n"\r
+ " bne reg2_error_loop \n"\r
+ " cmp r12, #12 \n"\r
+ " bne reg2_error_loop \n"\r
+ " \n"\r
+ " push { r0-r1 } \n" /* Increment the loop counter to indicate this test is still functioning correctly. */\r
+ " ldr r0, =ulRegTest2LoopCounter \n"\r
+ " ldr r1, [r0] \n"\r
+ " adds r1, r1, #1 \n"\r
+ " str r1, [r0] \n"\r
+ " pop { r0-r1 } \n"\r
+ " \n"\r
+ " b reg2_loop \n" /* Start again. */\r
+ " \n"\r
+ "reg2_error_loop: \n" /* If this line is hit then there was an error in a core register value. */\r
+ " b reg2_error_loop \n" /* This loop ensures the loop counter variable stops incrementing. */\r
+ " nop \n"\r
+ );\r
+}\r
+\r
+\r
+\r
projects / freertos / commitdiff