$comment = "// Autogenerated by contrib/gen-stellaris-part-header.pl
// From Stellaris Firmware Development Package revision";
-$struct_header = "static struct {
+$struct_header = "static const struct {
uint8_t class;
uint8_t partno;
const char *partname;
#define SPARE_OFFS 0x140
#define DATA_OFFS 0x200
-static int sp_ooblayout[] = {
+static const int sp_ooblayout[] = {
10, 11, 12, 13, 14, 15
};
-static int lp_ooblayout[] = {
+static const int lp_ooblayout[] = {
40, 41, 42, 43, 44, 45,
46, 47, 48, 49, 50, 51,
52, 53, 54, 55, 56, 57,
/* Copy to oob, at correct offsets */
static uint8_t ecc[24];
slc_ecc_copy_to_buffer(ecc, hw_ecc, ecc_count);
- int *layout = nand->page_size == 2048 ? lp_ooblayout : sp_ooblayout;
+ const int *layout = nand->page_size == 2048 ? lp_ooblayout : sp_ooblayout;
int i;
for (i = 0; i < ecc_count * 3; i++)
foob[layout[i]] = ecc[i];
slc_ecc_copy_to_buffer(ecc, hw_ecc, ecc_count);
/* Copy ECC from flash using correct layout */
static uint8_t fecc[24];/* max size */
- int *layout = nand->page_size == 2048 ? lp_ooblayout : sp_ooblayout;
+ const int *layout = nand->page_size == 2048 ? lp_ooblayout : sp_ooblayout;
int i;
for (i = 0; i < ecc_count * 3; i++)
fecc[i] = foob[layout[i]];
};
/* These are taken from Table 9-1 in 42023E-SAM-07/2013 */
-static struct sam4l_chip_info sam4l_known_chips[] = {
+static const struct sam4l_chip_info sam4l_known_chips[] = {
{ 0xAB0B0AE0, 0x1400000F, "ATSAM4LC8C" },
{ 0xAB0A09E0, 0x0400000F, "ATSAM4LC4C" },
{ 0xAB0A07E0, 0x0400000F, "ATSAM4LC2C" },
};
/* Meaning of SRAMSIZ field in CHIPID, see 9.3.1 in 42023E-SAM-07/2013 */
-static uint16_t sam4l_ram_sizes[16] = { 48, 1, 2, 6, 24, 4, 80, 160, 8, 16, 32, 64, 128, 256, 96, 512 };
+static const uint16_t sam4l_ram_sizes[16] = { 48, 1, 2, 6, 24, 4, 80, 160, 8, 16, 32, 64, 128, 256, 96, 512 };
/* Meaning of PSZ field in FPR, see 14.10.4 in 42023E-SAM-07/2013 */
static const uint16_t sam4l_page_sizes[8] = { 32, 64, 128, 256, 512, 1024, 2048, 4096 };
struct sam4l_info {
- struct sam4l_chip_info *details;
+ const struct sam4l_chip_info *details;
uint32_t flash_kb;
uint32_t ram_kb;
return ERROR_OK;
}
-static struct sam4l_chip_info *sam4l_find_chip_name(uint32_t id, uint32_t exid)
+static const struct sam4l_chip_info *sam4l_find_chip_name(uint32_t id, uint32_t exid)
{
unsigned int i;
static uint32_t at91sam7_wait_status_busy(struct flash_bank *bank, uint32_t waitbits, int timeout);
static int at91sam7_flash_command(struct flash_bank *bank, uint8_t cmd, uint16_t pagen);
-static uint32_t MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
-static uint32_t MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
-static uint32_t MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
+static const uint32_t MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
+static const uint32_t MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
+static const uint32_t MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
-static char *EPROC[8] = {
+static const char *EPROC[8] = {
"Unknown", "ARM946-E", "ARM7TDMI", "Unknown", "ARM920T", "ARM926EJ-S", "Unknown", "Unknown"
};
int probed;
};
-static struct avrf_type avft_chips_info[] = {
+static const struct avrf_type avft_chips_info[] = {
/* name, chip_id, flash_page_size, flash_page_num,
* eeprom_page_size, eeprom_page_num
*/
struct target *target = bank->target;
struct avrf_flash_bank *avrf_info = bank->driver_priv;
struct avr_common *avr = target->arch_info;
- struct avrf_type *avr_info = NULL;
+ const struct avrf_type *avr_info = NULL;
int i;
uint32_t device_id;
{
struct target *target = bank->target;
struct avr_common *avr = target->arch_info;
- struct avrf_type *avr_info = NULL;
+ const struct avrf_type *avr_info = NULL;
int i;
uint32_t device_id;
/* R4 keeps Flash Sequence address 2 (u32FlashSeq2) */
/* R5 returns result value (u32FlashResult) */
- const uint8_t fm3_flash_write_code[] = {
+ static const uint8_t fm3_flash_write_code[] = {
/* fm3_FLASH_IF->FASZ &= 0xFFFD; */
0x5F, 0xF0, 0x80, 0x45, /* MOVS.W R5, #(fm3_FLASH_IF->FASZ) */
0x2D, 0x68, /* LDR R5, [R5] */
*
*/
-const struct {
+static const struct {
unsigned pflash_sector_size_bytes;
unsigned nvm_sector_size_bytes;
unsigned num_blocks;
uint32_t ioconfig_base;
uint32_t bank_num;
uint32_t max_spi_clock_mhz;
- struct flash_device *dev;
+ const struct flash_device *dev;
};
struct lpcspifi_target {
uint32_t ioconfig_base; /* base address for the port word pin registers */
};
-static struct lpcspifi_target target_devices[] = {
+static const struct lpcspifi_target target_devices[] = {
/* name, tap_idcode, spifi_base, ssp_base, io_base, ioconfig_base */
{ "LPC43xx/18xx", 0x4ba00477, 0x14000000, 0x40083000, 0x400F4000, 0x40086000 },
{ NULL, 0, 0, 0, 0, 0 }
uint32_t ioconfig_base;
struct flash_sector *sectors;
uint32_t id = 0; /* silence uninitialized warning */
- struct lpcspifi_target *target_device;
+ const struct lpcspifi_target *target_device;
int retval;
/* If we've already probed, we should be fine to skip this time. */
return retval;
lpcspifi_info->dev = NULL;
- for (struct flash_device *p = flash_devices; p->name ; p++)
+ for (const struct flash_device *p = flash_devices; p->name ; p++)
if (p->device_id == id) {
lpcspifi_info->dev = p;
break;
#define LOCK 0x00
/* part structs */
-static struct {
+static const struct {
const char *partname;
uint32_t partno;
uint16_t num_page;
/* Shared table of known SPI flash devices for SPI-based flash drivers. Taken
* from device datasheets and Linux SPI flash drivers. */
-struct flash_device flash_devices[] = {
+const struct flash_device flash_devices[] = {
/* name, erase_cmd, chip_erase_cmd, device_id, pagesize, sectorsize, size_in_bytes */
FLASH_ID("st m25p05", 0xd8, 0xc7, 0x00102020, 0x80, 0x8000, 0x10000),
FLASH_ID("st m25p10", 0xd8, 0xc7, 0x00112020, 0x80, 0x8000, 0x20000),
.size_in_bytes = size \
}
-extern struct flash_device flash_devices[];
+extern const struct flash_device flash_devices[];
/* fields in SPI flash status register */
#define SPIFLASH_BSY_BIT 0x00000001 /* WIP Bit of SPI SR on SMI SR */
/* Autogenerated by contrib/gen-stellaris-part-header.pl */
/* From Stellaris Firmware Development Package revision 9453 */
-static struct {
+static const struct {
uint8_t class;
uint8_t partno;
const char *partname;
{0xFF, 0x00, "Unknown Part"}
};
-static char *StellarisClassname[7] = {
+static const char *StellarisClassname[7] = {
"Sandstorm",
"Fury",
"Unknown",
int probed;
uint32_t io_base;
uint32_t bank_num;
- struct flash_device *dev;
+ const struct flash_device *dev;
};
struct stmsmi_target {
uint32_t io_base;
};
-static struct stmsmi_target target_devices[] = {
+static const struct stmsmi_target target_devices[] = {
/* name, tap_idcode, smi_base, io_base */
{ "SPEAr3xx/6xx", 0x07926041, 0xf8000000, 0xfc000000 },
{ "STR75x", 0x4f1f0041, 0x80000000, 0x90000000 },
uint32_t io_base;
struct flash_sector *sectors;
uint32_t id = 0; /* silence uninitialized warning */
- struct stmsmi_target *target_device;
+ const struct stmsmi_target *target_device;
int retval;
if (stmsmi_info->probed)
return retval;
stmsmi_info->dev = NULL;
- for (struct flash_device *p = flash_devices; p->name ; p++)
+ for (const struct flash_device *p = flash_devices; p->name ; p++)
if (p->device_id == id) {
stmsmi_info->dev = p;
break;
STR7X_BUSY = 11
};
-static struct str7x_mem_layout mem_layout_str7bank0[] = {
+static const struct str7x_mem_layout mem_layout_str7bank0[] = {
{0x00000000, 0x02000, 0x01},
{0x00002000, 0x02000, 0x02},
{0x00004000, 0x02000, 0x04},
{0x00030000, 0x10000, 0x80}
};
-static struct str7x_mem_layout mem_layout_str7bank1[] = {
+static const struct str7x_mem_layout mem_layout_str7bank1[] = {
{0x00000000, 0x02000, 0x10000},
{0x00002000, 0x02000, 0x20000}
};