--- /dev/null
+/*\r
+ FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * If you are: *\r
+ * *\r
+ * + New to FreeRTOS, *\r
+ * + Wanting to learn FreeRTOS or multitasking in general quickly *\r
+ * + Looking for basic training, *\r
+ * + Wanting to improve your FreeRTOS skills and productivity *\r
+ * *\r
+ * then take a look at the FreeRTOS eBook *\r
+ * *\r
+ * "Using the FreeRTOS Real Time Kernel - a Practical Guide" *\r
+ * http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * A pdf reference manual is also available. Both are usually delivered *\r
+ * to your inbox within 20 minutes to two hours when purchased between 8am *\r
+ * and 8pm GMT (although please allow up to 24 hours in case of *\r
+ * exceptional circumstances). Thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ ***NOTE*** The exception to the GPL is included to allow you to distribute\r
+ a combined work that includes FreeRTOS without being obliged to provide the\r
+ source code for proprietary components outside of the FreeRTOS kernel.\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public \r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it \r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained \r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+#include <string.h>\r
+\r
+#include "FreeRTOS.h"\r
+#include "CircularBuffer.h"\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* See the header file for function information. */\r
+void vInitialiseCircularBuffer( xCircularBuffer *pxBuffer,\r
+ unsigned char *pucDataBuffer,\r
+ unsigned long ulBufferSizeInBytes,\r
+ unsigned long ulDataSizeInBytes,\r
+ void *pvTag\r
+ )\r
+{\r
+ pxBuffer->pucDataBuffer = pucDataBuffer;\r
+ pxBuffer->ulBufferSizeInBytes = ulBufferSizeInBytes;\r
+ pxBuffer->pucNextByteToRead = pucDataBuffer;\r
+ pxBuffer->pucNextByteToWrite = pucDataBuffer;\r
+ pxBuffer->ulDataSizeInBytes = ulDataSizeInBytes;\r
+ pxBuffer->pvTag = pvTag;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* See the header file for function information. */\r
+unsigned long ulBytesInCircularBuffer( const xCircularBuffer * const pxBuffer )\r
+{\r
+unsigned char *pucNextByteToWrite;\r
+unsigned long ulReturn;\r
+\r
+ if( pxBuffer->pvTag != NULL )\r
+ {\r
+ /* Locate the position that the DMA will next write to. */\r
+ pucNextByteToWrite = ( unsigned char * ) *( ( unsigned long * ) pxBuffer->pvTag );\r
+ }\r
+ else\r
+ {\r
+ /* Locate the position the application will next write to. */\r
+ pucNextByteToWrite = pxBuffer->pucNextByteToWrite;\r
+ }\r
+ \r
+ /* Has the write pointer wrapped back to the start of the buffer\r
+ compared to our read pointer? */\r
+ if( ( unsigned long ) pucNextByteToWrite >= ( unsigned long ) pxBuffer->pucNextByteToRead )\r
+ {\r
+ /* The write pointer is still ahead of us in the buffer. The amount of\r
+ data available is simple the gap between the two pointers. */\r
+ ulReturn = ( unsigned long ) pucNextByteToWrite - ( unsigned long ) pxBuffer->pucNextByteToRead;\r
+ }\r
+ else\r
+ {\r
+ /* The write pointer has wrapped back to the start. The amount of data\r
+ available is equal to the data between the read pointer and the end of\r
+ the buffer...*/\r
+ ulReturn = ( unsigned long ) &( pxBuffer->pucDataBuffer[ pxBuffer->ulBufferSizeInBytes ] ) - ( unsigned long ) pxBuffer->pucNextByteToRead;\r
+\r
+ /*... plus the data between the start of the buffer and the write\r
+ pointer. */\r
+ ulReturn += ( unsigned long ) pucNextByteToWrite - ( unsigned long ) pxBuffer->pucDataBuffer;\r
+ }\r
+\r
+ return ulReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+unsigned long ulCopyReceivedBytes( xCircularBuffer *pxBuffer, unsigned char * pucBuffer, unsigned long ulWantedBytes )\r
+{\r
+unsigned char *pucNextByteToWrite;\r
+unsigned long ulNumberOfBytesRead = 0, ulNumberOfBytesAvailable;\r
+\r
+ if( pxBuffer->pvTag != NULL )\r
+ {\r
+ /* Locate the position that the DMA will next write to. */\r
+ pucNextByteToWrite = ( unsigned char * ) *( ( unsigned long * ) pxBuffer->pvTag );\r
+ }\r
+ else\r
+ {\r
+ /* Locate the position that the application will next write to. */\r
+ pucNextByteToWrite = pxBuffer->pucNextByteToWrite;\r
+ }\r
+ \r
+ if( ( unsigned long ) pucNextByteToWrite >= ( unsigned long ) pxBuffer->pucNextByteToRead )\r
+ {\r
+ /* The write pointer has not wrapped around from our read pointer.\r
+ \r
+ Clip the number of bytes to read to the number available if the number\r
+ available is less than that wanted. */\r
+ ulNumberOfBytesAvailable = ( unsigned long ) pucNextByteToWrite - ( unsigned long ) ( pxBuffer->pucNextByteToRead );\r
+ \r
+ if( ulNumberOfBytesAvailable < ulWantedBytes )\r
+ {\r
+ ulWantedBytes = ulNumberOfBytesAvailable;\r
+ }\r
+ \r
+ /* Copy the data from ulRxBuffer into the application buffer. */\r
+ memcpy( pucBuffer, pxBuffer->pucNextByteToRead, ulWantedBytes );\r
+\r
+ /* Move up our read buffer. */\r
+ pxBuffer->pucNextByteToRead += ulWantedBytes;\r
+ ulNumberOfBytesRead = ulWantedBytes;\r
+ }\r
+ else\r
+ {\r
+ /* The write pointer has wrapped around from our read pointer. Is there\r
+ enough space from our read pointer to the end of the buffer without the\r
+ read pointer also wrapping around? */\r
+ ulNumberOfBytesAvailable = ( unsigned long ) &( pxBuffer->pucDataBuffer[ pxBuffer->ulBufferSizeInBytes ] ) - ( unsigned long ) pxBuffer->pucNextByteToRead;\r
+ \r
+ if( ulNumberOfBytesAvailable >= ulWantedBytes )\r
+ {\r
+ /* There is enough space from our current read pointer up to the end\r
+ of the buffer to obtain the number of bytes requested. */\r
+ memcpy( pucBuffer, pxBuffer->pucNextByteToRead, ulWantedBytes );\r
+\r
+ /* Move up our read buffer. */\r
+ pxBuffer->pucNextByteToRead += ulWantedBytes;\r
+ ulNumberOfBytesRead = ulWantedBytes;\r
+ }\r
+ else\r
+ {\r
+ /* There is not enough space up to the end of the buffer to obtain\r
+ the number of bytes requested. Copy up to the end of the buffer. */\r
+ memcpy( pucBuffer, pxBuffer->pucNextByteToRead, ulNumberOfBytesAvailable );\r
+ ulNumberOfBytesRead = ulNumberOfBytesAvailable;\r
+ \r
+ /* Then wrap back to the beginning of the buffer to attempt to\r
+ read the remaining bytes. */\r
+ pxBuffer->pucNextByteToRead = pxBuffer->pucDataBuffer;\r
+ pucBuffer += ulNumberOfBytesAvailable;\r
+ \r
+ /* How many more bytes do we want to read? */\r
+ ulWantedBytes -= ulNumberOfBytesAvailable;\r
+ \r
+ /* Clip the number of bytes we are going to read to the number\r
+ available if this is less than the number we want. */\r
+ ulNumberOfBytesAvailable = ( unsigned long ) pucNextByteToWrite - ( unsigned long ) pxBuffer->pucNextByteToRead;\r
+ \r
+ if( ulNumberOfBytesAvailable < ulWantedBytes )\r
+ {\r
+ ulWantedBytes = ulNumberOfBytesAvailable;\r
+ }\r
+\r
+ /* Copy these into the buffer. */\r
+ memcpy( pucBuffer, pxBuffer->pucNextByteToRead, ulWantedBytes );\r
+\r
+ /* Move up our read buffer. */\r
+ pxBuffer->pucNextByteToRead += ulWantedBytes;\r
+ ulNumberOfBytesRead += ulWantedBytes;\r
+ }\r
+ }\r
+ \r
+ /* Check we have not moved our read pointer off the end of the buffer. */\r
+ if( ( unsigned long ) pxBuffer->pucNextByteToRead >= ( unsigned long ) &( pxBuffer->pucDataBuffer[ pxBuffer->ulBufferSizeInBytes ] ) )\r
+ {\r
+ pxBuffer->pucNextByteToRead = pxBuffer->pucDataBuffer; \r
+ }\r
+ \r
+ /* Return the number of bytes read. */\r
+ return ulNumberOfBytesRead;\r
+}\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * If you are: *\r
+ * *\r
+ * + New to FreeRTOS, *\r
+ * + Wanting to learn FreeRTOS or multitasking in general quickly *\r
+ * + Looking for basic training, *\r
+ * + Wanting to improve your FreeRTOS skills and productivity *\r
+ * *\r
+ * then take a look at the FreeRTOS eBook *\r
+ * *\r
+ * "Using the FreeRTOS Real Time Kernel - a Practical Guide" *\r
+ * http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * A pdf reference manual is also available. Both are usually delivered *\r
+ * to your inbox within 20 minutes to two hours when purchased between 8am *\r
+ * and 8pm GMT (although please allow up to 24 hours in case of *\r
+ * exceptional circumstances). Thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ ***NOTE*** The exception to the GPL is included to allow you to distribute\r
+ a combined work that includes FreeRTOS without being obliged to provide the\r
+ source code for proprietary components outside of the FreeRTOS kernel.\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public \r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it \r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained \r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+#ifndef CIRCULAR_BUFFER_H\r
+#define CIRCULAR_BUFFER_H\r
+\r
+/* Structure that holds the state of the circular buffer. */\r
+typedef struct\r
+{\r
+ unsigned char *pucDataBuffer;\r
+ unsigned long ulBufferSizeInBytes;\r
+ unsigned char *pucNextByteToRead;\r
+ unsigned char *pucNextByteToWrite;\r
+ unsigned long ulDataSizeInBytes;\r
+ void *pvTag;\r
+} xCircularBuffer;\r
+\r
+\r
+/*\r
+ * Setup a circular buffer ready for use.\r
+ *\r
+ * pxBuffer : The xCicularBuffer structure being initialised.\r
+ *\r
+ * pucDataBuffer : The buffer to be used by the xCicularBuffer object.\r
+ *\r
+ * ulBufferSizeInBytes : The dimention of pucDataBuffer in bytes.\r
+ *\r
+ * ulDataSizeInBytes : The size of the data that is to be stored in the\r
+ * circular buffer. For example, 4 if the buffer is used to hold\r
+ * unsigned longs, 1 if the buffer is used to hold chars.\r
+ *\r
+ * pvTag : Can be used for anything, although normally used in conjunction with\r
+ * a DMA register.\r
+ */\r
+void vInitialiseCircularBuffer( xCircularBuffer *pxBuffer,\r
+ unsigned char *pucDataBuffer,\r
+ unsigned long ulBufferSizeInBytes,\r
+ unsigned long ulDataSizeInBytes,\r
+ void *pvTag\r
+ );\r
+/*\r
+ * Returns the number of bytes that are currently available within the\r
+ * buffer.\r
+ */\r
+unsigned long ulBytesInCircularBuffer( const xCircularBuffer * const pxBuffer );\r
+\r
+/*\r
+ * Obtain bytes from the circular buffer. Data may have been placed in\r
+ * the circular buffer by a DMA transfer or simply written to the buffer by\r
+ * the application code.\r
+ *\r
+ * pxBuffer : The circular buffer from which data is to be read.\r
+ *\r
+ * pucBuffer : The buffer into which the received bytes should be copied.\r
+ *\r
+ * ulWantedBytes : The number of bytes we are going to attempt to receive\r
+ * from the circular buffer.\r
+ *\r
+ * return : The actual number of bytes received from the circular buffer.\r
+ * This might be less than the number of bytes we attempted to receive.\r
+ */\r
+unsigned long ulCopyReceivedBytes( xCircularBuffer *pxBuffer, unsigned char * pucBuffer, unsigned long ulWantedBytes );\r
+\r
+#endif\r
+\r
--- /dev/null
+/******************** (C) COPYRIGHT 2009 STMicroelectronics ********************\r
+* File Name : spi_flash.c\r
+* Author : MCD Application Team\r
+* Version : V2.0.0\r
+* Date : 04/27/2009\r
+* Description : This file provides a set of functions needed to manage the\r
+* communication between SPI peripheral and SPI M25P64 FLASH.\r
+********************************************************************************\r
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.\r
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,\r
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE\r
+* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING\r
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
+*******************************************************************************/\r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "spi_flash.h"\r
+\r
+/* Private typedef -----------------------------------------------------------*/\r
+#define SPI_FLASH_PageSize 0x100\r
+\r
+/* Private define ------------------------------------------------------------*/\r
+#define WRITE 0x02 /* Write to Memory instruction */\r
+#define WRSR 0x01 /* Write Status Register instruction */\r
+#define WREN 0x06 /* Write enable instruction */\r
+\r
+#define READ 0x03 /* Read from Memory instruction */\r
+#define RDSR 0x05 /* Read Status Register instruction */\r
+#define RDID 0x9F /* Read identification */\r
+#define SE 0xD8 /* Sector Erase instruction */\r
+#define BE 0xC7 /* Bulk Erase instruction */\r
+\r
+#define WIP_Flag 0x01 /* Write In Progress (WIP) flag */\r
+\r
+#define Dummy_Byte 0xA5\r
+\r
+/* Private macro -------------------------------------------------------------*/\r
+/* Private variables ---------------------------------------------------------*/\r
+/* Private function prototypes -----------------------------------------------*/\r
+/* Private functions ---------------------------------------------------------*/\r
+\r
+/*******************************************************************************\r
+* Function Name : SPI_FLASH_Init\r
+* Description : Initializes the peripherals used by the SPI FLASH driver.\r
+* Input : None\r
+* Output : None\r
+* Return : None\r
+*******************************************************************************/\r
+void SPI_FLASH_Init(void)\r
+{\r
+ SPI_InitTypeDef SPI_InitStructure;\r
+ GPIO_InitTypeDef GPIO_InitStructure;\r
+\r
+ /* Enable SPI1 and GPIO clocks */\r
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1 | RCC_APB2Periph_GPIOA |\r
+ RCC_APB2Periph_GPIO_CS, ENABLE);\r
+\r
+ /* Configure SPI1 pins: SCK, MISO and MOSI */\r
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;\r
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;\r
+ GPIO_Init(GPIOA, &GPIO_InitStructure);\r
+\r
+ /* Configure I/O for Flash Chip select */\r
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_CS;\r
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;\r
+ GPIO_Init(GPIO_CS, &GPIO_InitStructure);\r
+\r
+ /* Deselect the FLASH: Chip Select high */\r
+ SPI_FLASH_CS_HIGH();\r
+\r
+ /* SPI1 configuration */\r
+ SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;\r
+ SPI_InitStructure.SPI_Mode = SPI_Mode_Master;\r
+ SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;\r
+ SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;\r
+ SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;\r
+ SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;\r
+ SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;\r
+ SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;\r
+ SPI_InitStructure.SPI_CRCPolynomial = 7;\r
+ SPI_Init(SPI1, &SPI_InitStructure);\r
+\r
+ /* Enable SPI1 */\r
+ SPI_Cmd(SPI1, ENABLE);\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name : SPI_FLASH_SectorErase\r
+* Description : Erases the specified FLASH sector.\r
+* Input : SectorAddr: address of the sector to erase.\r
+* Output : None\r
+* Return : None\r
+*******************************************************************************/\r
+void SPI_FLASH_SectorErase(uint32_t SectorAddr)\r
+{\r
+ /* Send write enable instruction */\r
+ SPI_FLASH_WriteEnable();\r
+\r
+ /* Sector Erase */\r
+ /* Select the FLASH: Chip Select low */\r
+ SPI_FLASH_CS_LOW();\r
+ /* Send Sector Erase instruction */\r
+ SPI_FLASH_SendByte(SE);\r
+ /* Send SectorAddr high nibble address byte */\r
+ SPI_FLASH_SendByte((SectorAddr & 0xFF0000) >> 16);\r
+ /* Send SectorAddr medium nibble address byte */\r
+ SPI_FLASH_SendByte((SectorAddr & 0xFF00) >> 8);\r
+ /* Send SectorAddr low nibble address byte */\r
+ SPI_FLASH_SendByte(SectorAddr & 0xFF);\r
+ /* Deselect the FLASH: Chip Select high */\r
+ SPI_FLASH_CS_HIGH();\r
+\r
+ /* Wait the end of Flash writing */\r
+ SPI_FLASH_WaitForWriteEnd();\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name : SPI_FLASH_BulkErase\r
+* Description : Erases the entire FLASH.\r
+* Input : None\r
+* Output : None\r
+* Return : None\r
+*******************************************************************************/\r
+void SPI_FLASH_BulkErase(void)\r
+{\r
+ /* Send write enable instruction */\r
+ SPI_FLASH_WriteEnable();\r
+\r
+ /* Bulk Erase */\r
+ /* Select the FLASH: Chip Select low */\r
+ SPI_FLASH_CS_LOW();\r
+ /* Send Bulk Erase instruction */\r
+ SPI_FLASH_SendByte(BE);\r
+ /* Deselect the FLASH: Chip Select high */\r
+ SPI_FLASH_CS_HIGH();\r
+\r
+ /* Wait the end of Flash writing */\r
+ SPI_FLASH_WaitForWriteEnd();\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name : SPI_FLASH_PageWrite\r
+* Description : Writes more than one byte to the FLASH with a single WRITE\r
+* cycle(Page WRITE sequence). The number of byte can't exceed\r
+* the FLASH page size.\r
+* Input : - pBuffer : pointer to the buffer containing the data to be\r
+* written to the FLASH.\r
+* - WriteAddr : FLASH's internal address to write to.\r
+* - NumByteToWrite : number of bytes to write to the FLASH,\r
+* must be equal or less than "SPI_FLASH_PageSize" value.\r
+* Output : None\r
+* Return : None\r
+*******************************************************************************/\r
+void SPI_FLASH_PageWrite(uint8_t* pBuffer, uint32_t WriteAddr, uint16_t NumByteToWrite)\r
+{\r
+ /* Enable the write access to the FLASH */\r
+ SPI_FLASH_WriteEnable();\r
+\r
+ /* Select the FLASH: Chip Select low */\r
+ SPI_FLASH_CS_LOW();\r
+ /* Send "Write to Memory " instruction */\r
+ SPI_FLASH_SendByte(WRITE);\r
+ /* Send WriteAddr high nibble address byte to write to */\r
+ SPI_FLASH_SendByte((WriteAddr & 0xFF0000) >> 16);\r
+ /* Send WriteAddr medium nibble address byte to write to */\r
+ SPI_FLASH_SendByte((WriteAddr & 0xFF00) >> 8);\r
+ /* Send WriteAddr low nibble address byte to write to */\r
+ SPI_FLASH_SendByte(WriteAddr & 0xFF);\r
+\r
+ /* while there is data to be written on the FLASH */\r
+ while (NumByteToWrite--)\r
+ {\r
+ /* Send the current byte */\r
+ SPI_FLASH_SendByte(*pBuffer);\r
+ /* Point on the next byte to be written */\r
+ pBuffer++;\r
+ }\r
+\r
+ /* Deselect the FLASH: Chip Select high */\r
+ SPI_FLASH_CS_HIGH();\r
+\r
+ /* Wait the end of Flash writing */\r
+ SPI_FLASH_WaitForWriteEnd();\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name : SPI_FLASH_BufferWrite\r
+* Description : Writes block of data to the FLASH. In this function, the\r
+* number of WRITE cycles are reduced, using Page WRITE sequence.\r
+* Input : - pBuffer : pointer to the buffer containing the data to be\r
+* written to the FLASH.\r
+* - WriteAddr : FLASH's internal address to write to.\r
+* - NumByteToWrite : number of bytes to write to the FLASH.\r
+* Output : None\r
+* Return : None\r
+*******************************************************************************/\r
+void SPI_FLASH_BufferWrite(uint8_t* pBuffer, uint32_t WriteAddr, uint16_t NumByteToWrite)\r
+{\r
+ uint8_t NumOfPage = 0, NumOfSingle = 0, Addr = 0, count = 0, temp = 0;\r
+\r
+ Addr = WriteAddr % SPI_FLASH_PageSize;\r
+ count = SPI_FLASH_PageSize - Addr;\r
+ NumOfPage = NumByteToWrite / SPI_FLASH_PageSize;\r
+ NumOfSingle = NumByteToWrite % SPI_FLASH_PageSize;\r
+\r
+ if (Addr == 0) /* WriteAddr is SPI_FLASH_PageSize aligned */\r
+ {\r
+ if (NumOfPage == 0) /* NumByteToWrite < SPI_FLASH_PageSize */\r
+ {\r
+ SPI_FLASH_PageWrite(pBuffer, WriteAddr, NumByteToWrite);\r
+ }\r
+ else /* NumByteToWrite > SPI_FLASH_PageSize */\r
+ {\r
+ while (NumOfPage--)\r
+ {\r
+ SPI_FLASH_PageWrite(pBuffer, WriteAddr, SPI_FLASH_PageSize);\r
+ WriteAddr += SPI_FLASH_PageSize;\r
+ pBuffer += SPI_FLASH_PageSize;\r
+ }\r
+\r
+ SPI_FLASH_PageWrite(pBuffer, WriteAddr, NumOfSingle);\r
+ }\r
+ }\r
+ else /* WriteAddr is not SPI_FLASH_PageSize aligned */\r
+ {\r
+ if (NumOfPage == 0) /* NumByteToWrite < SPI_FLASH_PageSize */\r
+ {\r
+ if (NumOfSingle > count) /* (NumByteToWrite + WriteAddr) > SPI_FLASH_PageSize */\r
+ {\r
+ temp = NumOfSingle - count;\r
+\r
+ SPI_FLASH_PageWrite(pBuffer, WriteAddr, count);\r
+ WriteAddr += count;\r
+ pBuffer += count;\r
+\r
+ SPI_FLASH_PageWrite(pBuffer, WriteAddr, temp);\r
+ }\r
+ else\r
+ {\r
+ SPI_FLASH_PageWrite(pBuffer, WriteAddr, NumByteToWrite);\r
+ }\r
+ }\r
+ else /* NumByteToWrite > SPI_FLASH_PageSize */\r
+ {\r
+ NumByteToWrite -= count;\r
+ NumOfPage = NumByteToWrite / SPI_FLASH_PageSize;\r
+ NumOfSingle = NumByteToWrite % SPI_FLASH_PageSize;\r
+\r
+ SPI_FLASH_PageWrite(pBuffer, WriteAddr, count);\r
+ WriteAddr += count;\r
+ pBuffer += count;\r
+\r
+ while (NumOfPage--)\r
+ {\r
+ SPI_FLASH_PageWrite(pBuffer, WriteAddr, SPI_FLASH_PageSize);\r
+ WriteAddr += SPI_FLASH_PageSize;\r
+ pBuffer += SPI_FLASH_PageSize;\r
+ }\r
+\r
+ if (NumOfSingle != 0)\r
+ {\r
+ SPI_FLASH_PageWrite(pBuffer, WriteAddr, NumOfSingle);\r
+ }\r
+ }\r
+ }\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name : SPI_FLASH_BufferRead\r
+* Description : Reads a block of data from the FLASH.\r
+* Input : - pBuffer : pointer to the buffer that receives the data read\r
+* from the FLASH.\r
+* - ReadAddr : FLASH's internal address to read from.\r
+* - NumByteToRead : number of bytes to read from the FLASH.\r
+* Output : None\r
+* Return : None\r
+*******************************************************************************/\r
+void SPI_FLASH_BufferRead(uint8_t* pBuffer, uint32_t ReadAddr, uint16_t NumByteToRead)\r
+{\r
+ /* Select the FLASH: Chip Select low */\r
+ SPI_FLASH_CS_LOW();\r
+\r
+ /* Send "Read from Memory " instruction */\r
+ SPI_FLASH_SendByte(READ);\r
+\r
+ /* Send ReadAddr high nibble address byte to read from */\r
+ SPI_FLASH_SendByte((ReadAddr & 0xFF0000) >> 16);\r
+ /* Send ReadAddr medium nibble address byte to read from */\r
+ SPI_FLASH_SendByte((ReadAddr& 0xFF00) >> 8);\r
+ /* Send ReadAddr low nibble address byte to read from */\r
+ SPI_FLASH_SendByte(ReadAddr & 0xFF);\r
+\r
+ while (NumByteToRead--) /* while there is data to be read */\r
+ {\r
+ /* Read a byte from the FLASH */\r
+ *pBuffer = SPI_FLASH_SendByte(Dummy_Byte);\r
+ /* Point to the next location where the byte read will be saved */\r
+ pBuffer++;\r
+ }\r
+\r
+ /* Deselect the FLASH: Chip Select high */\r
+ SPI_FLASH_CS_HIGH();\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name : SPI_FLASH_ReadID\r
+* Description : Reads FLASH identification.\r
+* Input : None\r
+* Output : None\r
+* Return : FLASH identification\r
+*******************************************************************************/\r
+uint32_t SPI_FLASH_ReadID(void)\r
+{\r
+ uint32_t Temp = 0, Temp0 = 0, Temp1 = 0, Temp2 = 0;\r
+\r
+ /* Select the FLASH: Chip Select low */\r
+ SPI_FLASH_CS_LOW();\r
+\r
+ /* Send "RDID " instruction */\r
+ SPI_FLASH_SendByte(0x9F);\r
+\r
+ /* Read a byte from the FLASH */\r
+ Temp0 = SPI_FLASH_SendByte(Dummy_Byte);\r
+\r
+ /* Read a byte from the FLASH */\r
+ Temp1 = SPI_FLASH_SendByte(Dummy_Byte);\r
+\r
+ /* Read a byte from the FLASH */\r
+ Temp2 = SPI_FLASH_SendByte(Dummy_Byte);\r
+\r
+ /* Deselect the FLASH: Chip Select high */\r
+ SPI_FLASH_CS_HIGH();\r
+\r
+ Temp = (Temp0 << 16) | (Temp1 << 8) | Temp2;\r
+\r
+ return Temp;\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name : SPI_FLASH_StartReadSequence\r
+* Description : Initiates a read data byte (READ) sequence from the Flash.\r
+* This is done by driving the /CS line low to select the device,\r
+* then the READ instruction is transmitted followed by 3 bytes\r
+* address. This function exit and keep the /CS line low, so the\r
+* Flash still being selected. With this technique the whole\r
+* content of the Flash is read with a single READ instruction.\r
+* Input : - ReadAddr : FLASH's internal address to read from.\r
+* Output : None\r
+* Return : None\r
+*******************************************************************************/\r
+void SPI_FLASH_StartReadSequence(uint32_t ReadAddr)\r
+{\r
+ /* Select the FLASH: Chip Select low */\r
+ SPI_FLASH_CS_LOW();\r
+\r
+ /* Send "Read from Memory " instruction */\r
+ SPI_FLASH_SendByte(READ);\r
+\r
+ /* Send the 24-bit address of the address to read from -----------------------*/\r
+ /* Send ReadAddr high nibble address byte */\r
+ SPI_FLASH_SendByte((ReadAddr & 0xFF0000) >> 16);\r
+ /* Send ReadAddr medium nibble address byte */\r
+ SPI_FLASH_SendByte((ReadAddr& 0xFF00) >> 8);\r
+ /* Send ReadAddr low nibble address byte */\r
+ SPI_FLASH_SendByte(ReadAddr & 0xFF);\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name : SPI_FLASH_ReadByte\r
+* Description : Reads a byte from the SPI Flash.\r
+* This function must be used only if the Start_Read_Sequence\r
+* function has been previously called.\r
+* Input : None\r
+* Output : None\r
+* Return : Byte Read from the SPI Flash.\r
+*******************************************************************************/\r
+uint8_t SPI_FLASH_ReadByte(void)\r
+{\r
+ return (SPI_FLASH_SendByte(Dummy_Byte));\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name : SPI_FLASH_SendByte\r
+* Description : Sends a byte through the SPI interface and return the byte\r
+* received from the SPI bus.\r
+* Input : byte : byte to send.\r
+* Output : None\r
+* Return : The value of the received byte.\r
+*******************************************************************************/\r
+uint8_t SPI_FLASH_SendByte(uint8_t byte)\r
+{\r
+ /* Loop while DR register in not emplty */\r
+ while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET);\r
+\r
+ /* Send byte through the SPI1 peripheral */\r
+ SPI_I2S_SendData(SPI1, byte);\r
+\r
+ /* Wait to receive a byte */\r
+ while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET);\r
+\r
+ /* Return the byte read from the SPI bus */\r
+ return SPI_I2S_ReceiveData(SPI1);\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name : SPI_FLASH_SendHalfWord\r
+* Description : Sends a Half Word through the SPI interface and return the\r
+* Half Word received from the SPI bus.\r
+* Input : Half Word : Half Word to send.\r
+* Output : None\r
+* Return : The value of the received Half Word.\r
+*******************************************************************************/\r
+uint16_t SPI_FLASH_SendHalfWord(uint16_t HalfWord)\r
+{\r
+ /* Loop while DR register in not emplty */\r
+ while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET);\r
+\r
+ /* Send Half Word through the SPI1 peripheral */\r
+ SPI_I2S_SendData(SPI1, HalfWord);\r
+\r
+ /* Wait to receive a Half Word */\r
+ while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET);\r
+\r
+ /* Return the Half Word read from the SPI bus */\r
+ return SPI_I2S_ReceiveData(SPI1);\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name : SPI_FLASH_WriteEnable\r
+* Description : Enables the write access to the FLASH.\r
+* Input : None\r
+* Output : None\r
+* Return : None\r
+*******************************************************************************/\r
+void SPI_FLASH_WriteEnable(void)\r
+{\r
+ /* Select the FLASH: Chip Select low */\r
+ SPI_FLASH_CS_LOW();\r
+\r
+ /* Send "Write Enable" instruction */\r
+ SPI_FLASH_SendByte(WREN);\r
+\r
+ /* Deselect the FLASH: Chip Select high */\r
+ SPI_FLASH_CS_HIGH();\r
+}\r
+\r
+/*******************************************************************************\r
+* Function Name : SPI_FLASH_WaitForWriteEnd\r
+* Description : Polls the status of the Write In Progress (WIP) flag in the\r
+* FLASH's status register and loop until write opertaion\r
+* has completed.\r
+* Input : None\r
+* Output : None\r
+* Return : None\r
+*******************************************************************************/\r
+void SPI_FLASH_WaitForWriteEnd(void)\r
+{\r
+ uint8_t FLASH_Status = 0;\r
+\r
+ /* Select the FLASH: Chip Select low */\r
+ SPI_FLASH_CS_LOW();\r
+\r
+ /* Send "Read Status Register" instruction */\r
+ SPI_FLASH_SendByte(RDSR);\r
+\r
+ /* Loop as long as the memory is busy with a write cycle */\r
+ do\r
+ {\r
+ /* Send a dummy byte to generate the clock needed by the FLASH\r
+ and put the value of the status register in FLASH_Status variable */\r
+ FLASH_Status = SPI_FLASH_SendByte(Dummy_Byte);\r
+\r
+ }\r
+ while ((FLASH_Status & WIP_Flag) == SET); /* Write in progress */\r
+\r
+ /* Deselect the FLASH: Chip Select high */\r
+ SPI_FLASH_CS_HIGH();\r
+}\r
+\r
+/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/\r
--- /dev/null
+/*\r
+ FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * If you are: *\r
+ * *\r
+ * + New to FreeRTOS, *\r
+ * + Wanting to learn FreeRTOS or multitasking in general quickly *\r
+ * + Looking for basic training, *\r
+ * + Wanting to improve your FreeRTOS skills and productivity *\r
+ * *\r
+ * then take a look at the FreeRTOS eBook *\r
+ * *\r
+ * "Using the FreeRTOS Real Time Kernel - a Practical Guide" *\r
+ * http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * A pdf reference manual is also available. Both are usually delivered *\r
+ * to your inbox within 20 minutes to two hours when purchased between 8am *\r
+ * and 8pm GMT (although please allow up to 24 hours in case of *\r
+ * exceptional circumstances). Thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ ***NOTE*** The exception to the GPL is included to allow you to distribute\r
+ a combined work that includes FreeRTOS without being obliged to provide the\r
+ source code for proprietary components outside of the FreeRTOS kernel.\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public \r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it \r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained \r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/*\r
+ INTERRUPT DRIVEN SERIAL PORT DRIVER.\r
+*/\r
+\r
+\r
+/******************************************************************************\r
+*** NOTE: COM0 == USART1, COM1 == USART2\r
+******************************************************************************/\r
+\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "queue.h"\r
+#include "semphr.h"\r
+\r
+/* Driver includes. */\r
+#include "CircularBuffer.h"\r
+\r
+/* Library includes. */\r
+#include "stm32f10x_lib.h"\r
+#include "stm32f10x_rcc.h"\r
+\r
+/* Driver includes. */\r
+#include "STM32_USART.h"\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The number of COM ports that can be controlled at the same time. */\r
+#define serNUM_COM_PORTS ( 2 )\r
+\r
+/* Indexes into the xCOMBufferDefinitions array for the Rx and Tx buffers. */\r
+#define serRX_BUFFER_INDEX ( 0 )\r
+#define serTX_BUFFER_INDEX ( 1 )\r
+\r
+/* A counting semaphore is used to allows tasks to block to wait for characters\r
+to be received. This constant defines the max count. Making this value higher\r
+does not change the amount of RAM used by the semaphore, so its worth making it\r
+quite high. */\r
+#define serSEMAPHORE_MAX_COUNT ( 100 )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* An Rx and a Tx buffer structure for each COM port. */\r
+static xCircularBuffer xCOMBufferDefinitions[ serNUM_COM_PORTS ][ 2 ];\r
+\r
+/* The buffers themselves. */\r
+static unsigned char ucCOM0_Rx_Buffer[ configCOM0_RX_BUFFER_LENGTH ];\r
+static unsigned char ucCOM0_Tx_Buffer[ configCOM0_TX_BUFFER_LENGTH ];\r
+static unsigned char ucCOM1_Rx_Buffer[ configCOM1_RX_BUFFER_LENGTH ];\r
+static unsigned char ucCOM1_Tx_Buffer[ configCOM1_TX_BUFFER_LENGTH ];\r
+\r
+/* Semaphores used to block tasks that are waiting for characters to be\r
+received. */\r
+static xSemaphoreHandle xCOM0RxSemaphore, xCOM1RxSemaphore;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* UART interrupt handler. */\r
+void vUARTInterruptHandler( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * See serial.h in this project for parameter descriptions.\r
+ */\r
+long lCOMPortInit( unsigned long ulPort, unsigned long ulWantedBaud )\r
+{\r
+long lReturn = pdFAIL;\r
+USART_InitTypeDef USART_InitStructure;\r
+NVIC_InitTypeDef NVIC_InitStructure;\r
+GPIO_InitTypeDef GPIO_InitStructure;\r
+\r
+ if( ulPort < serNUM_COM_PORTS )\r
+ {\r
+ /* The common (not port dependent) part of the initialisation. */\r
+ USART_InitStructure.USART_BaudRate = ulWantedBaud;\r
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;\r
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;\r
+ USART_InitStructure.USART_Parity = USART_Parity_No;\r
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;\r
+ USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;\r
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = configLIBRARY_KERNEL_INTERRUPT_PRIORITY;\r
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;\r
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;\r
+\r
+\r
+ /* Init the buffer structures with the buffer for the COM port being\r
+ initialised, and perform any non-common initialisation necessary. This\r
+ does not check to see if the COM port has already been initialised. */\r
+ if( ulPort == 0 )\r
+ {\r
+ /* Create the semaphore used to enable tasks to block to wait for\r
+ characters to be received. */\r
+ xCOM0RxSemaphore = xSemaphoreCreateCounting( serSEMAPHORE_MAX_COUNT, 0 );\r
+\r
+ vInitialiseCircularBuffer( &( xCOMBufferDefinitions[ ulPort ][ serRX_BUFFER_INDEX ] ),\r
+ ucCOM0_Rx_Buffer,\r
+ configCOM0_RX_BUFFER_LENGTH,\r
+ sizeof( unsigned char ),\r
+ NULL\r
+ );\r
+\r
+ vInitialiseCircularBuffer( &( xCOMBufferDefinitions[ ulPort ][ serTX_BUFFER_INDEX ] ),\r
+ ucCOM0_Tx_Buffer,\r
+ configCOM0_TX_BUFFER_LENGTH,\r
+ sizeof( unsigned char ),\r
+ NULL\r
+ );\r
+\r
+ /* Enable COM1 clock - the ST libraries start numbering from UART1, \r
+ making this UART 2. */\r
+ RCC_APB2PeriphClockCmd( RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE ); \r
+\r
+ /* Configure USART1 Rx (PA10) as input floating */\r
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;\r
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;\r
+ GPIO_Init( GPIOA, &GPIO_InitStructure );\r
+ \r
+ /* Configure USART1 Tx (PA9) as alternate function push-pull */\r
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;\r
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;\r
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
+ GPIO_Init( GPIOA, &GPIO_InitStructure );\r
+\r
+ USART_Init( USART1, &USART_InitStructure ); \r
+ USART_ITConfig( USART1, USART_IT_RXNE, ENABLE );\r
+ \r
+ NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQChannel;\r
+ NVIC_Init( &NVIC_InitStructure );\r
+ \r
+ USART_DMACmd( USART1, ( USART_DMAReq_Tx | USART_DMAReq_Rx ), ENABLE );\r
+ USART_Cmd( USART1, ENABLE ); \r
+ }\r
+ else\r
+ {\r
+ /* Create the semaphore used to enable tasks to block to wait for\r
+ characters to be received. */\r
+ xCOM1RxSemaphore = xSemaphoreCreateCounting( serSEMAPHORE_MAX_COUNT, 0 );\r
+\r
+ vInitialiseCircularBuffer( &( xCOMBufferDefinitions[ ulPort ][ serRX_BUFFER_INDEX ] ),\r
+ ucCOM1_Rx_Buffer,\r
+ configCOM1_RX_BUFFER_LENGTH,\r
+ sizeof( unsigned char ),\r
+ NULL\r
+ );\r
+\r
+ vInitialiseCircularBuffer( &( xCOMBufferDefinitions[ ulPort ][ serTX_BUFFER_INDEX ] ),\r
+ ucCOM1_Tx_Buffer,\r
+ configCOM1_TX_BUFFER_LENGTH,\r
+ sizeof( unsigned char ),\r
+ NULL\r
+ );\r
+\r
+ /* Enable COM0 clock - the ST libraries start numbering from 1. */\r
+ RCC_APB2PeriphClockCmd( RCC_APB1Periph_USART2 | RCC_APB2Periph_GPIOA, ENABLE ); \r
+\r
+ /* Configure USART2 Rx (PA3) as input floating */\r
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;\r
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;\r
+ GPIO_Init( GPIOA, &GPIO_InitStructure );\r
+ \r
+ /* Configure USART2 Tx (PA2) as alternate function push-pull */\r
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;\r
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;\r
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
+ GPIO_Init( GPIOA, &GPIO_InitStructure );\r
+\r
+ USART_Init( USART2, &USART_InitStructure ); \r
+ USART_ITConfig( USART2, USART_IT_RXNE, ENABLE );\r
+ \r
+ NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQChannel;\r
+ NVIC_Init( &NVIC_InitStructure );\r
+ \r
+ USART_DMACmd( USART2, ( USART_DMAReq_Tx | USART_DMAReq_Rx ), ENABLE );\r
+ USART_Cmd( USART2, ENABLE ); \r
+ } \r
+ \r
+ /* Everything is ok. */\r
+ lReturn = pdPASS;\r
+ }\r
+ \r
+ return lReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed long xUSARTGetChar( long lPort, signed char *pcRxedChar, portTickType xBlockTime )\r
+{\r
+ return pdFALSE;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSerialPutString( long lPort, const signed char * const pcString, unsigned portSHORT usStringLength )\r
+{\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed long xSerialPutChar( long lPort, signed char cOutChar, portTickType xBlockTime )\r
+{\r
+ return pdFALSE;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vUARTInterruptHandler( void )\r
+{\r
+long xHigherPriorityTaskWoken = pdFALSE;\r
+char cChar;\r
+\r
+ if( USART_GetITStatus( USART1, USART_IT_TXE ) == SET )\r
+ {\r
+ /* The interrupt was caused by the THR becoming empty. Are there any\r
+ more characters to transmit? */\r
+if( 0 )// if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )\r
+ {\r
+ /* A character was retrieved from the queue so can be sent to the\r
+ THR now. */\r
+ USART_SendData( USART1, cChar );\r
+ }\r
+ else\r
+ {\r
+ USART_ITConfig( USART1, USART_IT_TXE, DISABLE ); \r
+ } \r
+ }\r
+ \r
+ if( USART_GetITStatus( USART1, USART_IT_RXNE ) == SET )\r
+ {\r
+ cChar = USART_ReceiveData( USART1 );\r
+// xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );\r
+ } \r
+ \r
+ portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );\r
+}\r
+\r
+\r
+\r
+\r
+\r
+ \r
--- /dev/null
+/*\r
+ FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * If you are: *\r
+ * *\r
+ * + New to FreeRTOS, *\r
+ * + Wanting to learn FreeRTOS or multitasking in general quickly *\r
+ * + Looking for basic training, *\r
+ * + Wanting to improve your FreeRTOS skills and productivity *\r
+ * *\r
+ * then take a look at the FreeRTOS eBook *\r
+ * *\r
+ * "Using the FreeRTOS Real Time Kernel - a Practical Guide" *\r
+ * http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * A pdf reference manual is also available. Both are usually delivered *\r
+ * to your inbox within 20 minutes to two hours when purchased between 8am *\r
+ * and 8pm GMT (although please allow up to 24 hours in case of *\r
+ * exceptional circumstances). Thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ ***NOTE*** The exception to the GPL is included to allow you to distribute\r
+ a combined work that includes FreeRTOS without being obliged to provide the\r
+ source code for proprietary components outside of the FreeRTOS kernel.\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public \r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it \r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained \r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+#ifndef STM_32_SERIAL_COMMS_H\r
+#define STM_32_SERIAL_COMMS_H\r
+\r
+long lCOMPortInit( unsigned long ulPort, unsigned long ulWantedBaud );\r
+\r
+#endif\r
+\r
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )\r
\r
#define configUSE_MUTEXES 1\r
-#define configUSE_COUNTING_SEMAPHORES 0\r
+#define configUSE_COUNTING_SEMAPHORES 1\r
#define configUSE_ALTERNATIVE_API 0\r
#define configCHECK_FOR_STACK_OVERFLOW 2\r
#define configUSE_RECURSIVE_MUTEXES 1\r
#define configLIBRARY_KERNEL_INTERRUPT_PRIORITY 15\r
\r
/*-----------------------------------------------------------\r
- * Ethernet configuration.\r
+ * UART configuration.\r
*-----------------------------------------------------------*/\r
-\r
-/* MAC address configuration. */\r
-#define configMAC_ADDR0 0x00\r
-#define configMAC_ADDR1 0x12\r
-#define configMAC_ADDR2 0x13\r
-#define configMAC_ADDR3 0x10\r
-#define configMAC_ADDR4 0x15\r
-#define configMAC_ADDR5 0x11\r
-\r
-/* IP address configuration. */\r
-#define configIP_ADDR0 172\r
-#define configIP_ADDR1 25\r
-#define configIP_ADDR2 218\r
-#define configIP_ADDR3 202\r
-\r
-/* Netmask configuration. */\r
-#define configNET_MASK0 255\r
-#define configNET_MASK1 255\r
-#define configNET_MASK2 255\r
-#define configNET_MASK3 0\r
-\r
+#define configCOM0_RX_BUFFER_LENGTH 128\r
+#define configCOM0_TX_BUFFER_LENGTH 128\r
+#define configCOM1_RX_BUFFER_LENGTH 128\r
+#define configCOM1_TX_BUFFER_LENGTH 128\r
\r
#endif /* FREERTOS_CONFIG_H */\r
\r
+++ /dev/null
-/*\r
- FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.\r
-\r
- ***************************************************************************\r
- * *\r
- * If you are: *\r
- * *\r
- * + New to FreeRTOS, *\r
- * + Wanting to learn FreeRTOS or multitasking in general quickly *\r
- * + Looking for basic training, *\r
- * + Wanting to improve your FreeRTOS skills and productivity *\r
- * *\r
- * then take a look at the FreeRTOS eBook *\r
- * *\r
- * "Using the FreeRTOS Real Time Kernel - a Practical Guide" *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- * A pdf reference manual is also available. Both are usually delivered *\r
- * to your inbox within 20 minutes to two hours when purchased between 8am *\r
- * and 8pm GMT (although please allow up to 24 hours in case of *\r
- * exceptional circumstances). Thank you for your support! *\r
- * *\r
- ***************************************************************************\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
- ***NOTE*** The exception to the GPL is included to allow you to distribute\r
- a combined work that includes FreeRTOS without being obliged to provide the\r
- source code for proprietary components outside of the FreeRTOS kernel.\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
- more details. You should have received a copy of the GNU General Public \r
- License and the FreeRTOS license exception along with FreeRTOS; if not it \r
- can be viewed here: http://www.freertos.org/a00114.html and also obtained \r
- by writing to Richard Barry, contact details for whom are available on the\r
- FreeRTOS WEB site.\r
-\r
- 1 tab == 4 spaces!\r
-\r
- http://www.FreeRTOS.org - Documentation, latest information, license and\r
- contact details.\r
-\r
- http://www.SafeRTOS.com - A version that is certified for use in safety\r
- critical systems.\r
-\r
- http://www.OpenRTOS.com - Commercial support, development, porting,\r
- licensing and training services.\r
-*/\r
-\r
-/*-----------------------------------------------------------\r
- * Simple parallel port IO routines.\r
- *-----------------------------------------------------------*/\r
-\r
-/* FreeRTOS.org includes. */\r
-#include "FreeRTOS.h"\r
-#include "task.h"\r
-#include "partest.h"\r
-\r
-/* Standard includes. */\r
-#include <string.h>\r
-\r
-/* Library includes. */\r
-#include "stm32f10x_lib.h"\r
-\r
-#define partstNUM_LEDs 8\r
-\r
-/* Holds the current output state for each of the LEDs. */\r
-static unsigned char ucBitStates[ partstNUM_LEDs ];\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-void vParTestInitialise( void )\r
-{\r
-GPIO_InitTypeDef GPIO_InitStructure;\r
-\r
- /* Configure PE14, PD13, PD3 and PD4 output push-pull */\r
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;\r
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;\r
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;\r
- GPIO_Init( GPIOB, &GPIO_InitStructure );\r
-\r
- memset( ucBitStates, 0x00, sizeof( ucBitStates ) );\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )\r
-{\r
- if( uxLED < partstNUM_LEDs )\r
- {\r
- portENTER_CRITICAL();\r
- {\r
- if( xValue != pdFALSE )\r
- {\r
- ucBitStates[ uxLED ] = pdTRUE;\r
- }\r
- else\r
- {\r
- ucBitStates[ uxLED ] = pdFALSE;\r
- }\r
-\r
- GPIO_WriteBit( GPIOB, ( GPIO_Pin_8 << uxLED ), ucBitStates[ uxLED ] );\r
- }\r
- portEXIT_CRITICAL();\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vParTestToggleLED( unsigned portBASE_TYPE uxLED )\r
-{\r
- if( uxLED < partstNUM_LEDs )\r
- {\r
- portENTER_CRITICAL();\r
- {\r
- ucBitStates[ uxLED ] = !ucBitStates[ uxLED ];\r
- GPIO_WriteBit( GPIOB, ( GPIO_Pin_8 << uxLED ), ucBitStates[ uxLED ] );\r
- }\r
- portEXIT_CRITICAL();\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-portBASE_TYPE xGetLEDState( unsigned portBASE_TYPE uxLED )\r
-{\r
- if( uxLED < partstNUM_LEDs )\r
- {\r
- return ( portBASE_TYPE ) ucBitStates[ uxLED ];\r
- }\r
- else\r
- {\r
- return 0;\r
- }\r
-}\r
--- /dev/null
+/*\r
+ FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * If you are: *\r
+ * *\r
+ * + New to FreeRTOS, *\r
+ * + Wanting to learn FreeRTOS or multitasking in general quickly *\r
+ * + Looking for basic training, *\r
+ * + Wanting to improve your FreeRTOS skills and productivity *\r
+ * *\r
+ * then take a look at the FreeRTOS eBook *\r
+ * *\r
+ * "Using the FreeRTOS Real Time Kernel - a Practical Guide" *\r
+ * http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ * A pdf reference manual is also available. Both are usually delivered *\r
+ * to your inbox within 20 minutes to two hours when purchased between 8am *\r
+ * and 8pm GMT (although please allow up to 24 hours in case of *\r
+ * exceptional circumstances). Thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ ***NOTE*** The exception to the GPL is included to allow you to distribute\r
+ a combined work that includes FreeRTOS without being obliged to provide the\r
+ source code for proprietary components outside of the FreeRTOS kernel.\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public \r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it \r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained \r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/*-----------------------------------------------------------\r
+ * Simple parallel port IO routines.\r
+ *-----------------------------------------------------------*/\r
+\r
+/* FreeRTOS.org includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "partest.h"\r
+\r
+/* Library includes. */\r
+#include "stm32f10x_lib.h"\r
+\r
+#define partstMAX_OUTPUT_LED ( 4 )\r
+#define partstFIRST_LED GPIO_Pin_6\r
+\r
+static unsigned portSHORT usOutputValue = 0;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestInitialise( void )\r
+{\r
+GPIO_InitTypeDef GPIO_InitStructure;\r
+\r
+ /* Configure PC.06, PC.07, PC.08 and PC.09 as output push-pull */\r
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9;\r
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;\r
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;\r
+ GPIO_Init( GPIOC, &GPIO_InitStructure );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )\r
+{\r
+unsigned portSHORT usBit;\r
+\r
+ vTaskSuspendAll();\r
+ {\r
+ if( uxLED < partstMAX_OUTPUT_LED )\r
+ {\r
+ usBit = partstFIRST_LED << uxLED;\r
+\r
+ if( xValue == pdFALSE )\r
+ {\r
+ usBit ^= ( unsigned portSHORT ) 0xffff;\r
+ usOutputValue &= usBit;\r
+ }\r
+ else\r
+ {\r
+ usOutputValue |= usBit;\r
+ }\r
+\r
+ GPIO_Write( GPIOC, usOutputValue );\r
+ } \r
+ }\r
+ xTaskResumeAll();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestToggleLED( unsigned portBASE_TYPE uxLED )\r
+{\r
+unsigned portSHORT usBit;\r
+\r
+ vTaskSuspendAll();\r
+ {\r
+ if( uxLED < partstMAX_OUTPUT_LED )\r
+ {\r
+ usBit = partstFIRST_LED << uxLED;\r
+\r
+ if( usOutputValue & usBit )\r
+ {\r
+ usOutputValue &= ~usBit;\r
+ }\r
+ else\r
+ {\r
+ usOutputValue |= usBit;\r
+ }\r
+\r
+ GPIO_Write( GPIOC, usOutputValue );\r
+ }\r
+ }\r
+ xTaskResumeAll();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
--- /dev/null
+Only include one of the two ParTest source files in your build at any one time.
\ No newline at end of file
<!DOCTYPE CrossStudio_Project_File>
<solution Name="RTOSDemo" version="2">
<project Name="RTOSDemo">
- <configuration Name="Common" Target="STM32F103RB" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_fiq_stack_size="0" arm_linker_heap_size="128" arm_linker_irq_stack_size="0" arm_linker_jtag_pad_pre_dr="1" arm_linker_jtag_pad_pre_ir="5" arm_linker_stack_size="128" arm_simulator_memory_simulation_filename="$(PackagesDir)/targets/ST_STM32F10x/STM32F10xSimulatorMemory.dll" arm_simulator_memory_simulation_parameter="0x20000;0x4000" arm_target_debug_interface_type="ADIv5" arm_target_loader_parameter="8000000" c_only_additional_options="-Wall;-Wextra" c_system_include_directories="$(StudioDir)/include;$(PackagesDir)/include;$(PackagesDir)/targets/stm32/include" c_user_include_directories=".;..\\..\\Source\\include;..\\..\\Source\\portable\\GCC\\ARM_CM3;..\\Common\\Include;ST Library\\inc" link_include_startup_code="No" linker_memory_map_file="$(TargetsDir)/ST_STM32F10x/ST_STM32F103RB_MemoryMap.xml" linker_printf_width_precision_supported="No" oscillator_frequency="8MHz" project_directory="" project_type="Executable" property_groups_file_path="$(PackagesDir)/targets/ST_STM32F10x/propertyGroups.xml"/>
+ <configuration Name="Common" Target="STM32F103RB" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_fiq_stack_size="0" arm_linker_heap_size="128" arm_linker_irq_stack_size="0" arm_linker_jtag_pad_pre_dr="1" arm_linker_jtag_pad_pre_ir="5" arm_linker_stack_size="128" arm_simulator_memory_simulation_filename="$(PackagesDir)/targets/ST_STM32F10x/STM32F10xSimulatorMemory.dll" arm_simulator_memory_simulation_parameter="0x20000;0x4000" arm_target_debug_interface_type="ADIv5" arm_target_loader_parameter="8000000" c_only_additional_options="-Wall;-Wextra" c_system_include_directories="$(StudioDir)/include;$(PackagesDir)/include;$(PackagesDir)/targets/stm32/include" c_user_include_directories=".;../../Source/include/;../../Source/portable/GCC/ARM_CM3/;../Common/Include/;ST Library/inc/;./Drivers/" link_include_startup_code="No" linker_memory_map_file="$(TargetsDir)/ST_STM32F10x/ST_STM32F103RB_MemoryMap.xml" linker_printf_width_precision_supported="No" oscillator_frequency="8MHz" project_directory="" project_type="Executable" property_groups_file_path="$(PackagesDir)/targets/ST_STM32F10x/propertyGroups.xml"/>
<configuration Name="RAM" Placement="RAM" linker_section_placement_file="$(StudioDir)/targets/sram_placement.xml" target_reset_script="SRAMReset()"/>
<configuration Name="Flash" Placement="Flash" arm_target_flash_loader_file_path="$(PackagesDir)/targets/ST_STM32F10x/Release/Loader_rpc.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" linker_section_placement_file="$(StudioDir)/targets/flash_placement.xml" target_reset_script="FLASHReset()"/>
<folder Name="Source Files">
<file file_name="../Common/Minimal/PollQ.c"/>
<file file_name="../Common/Minimal/QPeek.c"/>
</folder>
- <file file_name="ParTest/ParTest.c"/>
<folder Name="ST Library">
<file file_name="ST Library/src/stm32f10x_gpio.c"/>
<file file_name="ST Library/src/stm32f10x_lib.c"/>
<file file_name="ST Library/src/stm32f10x_can.c"/>
<file file_name="ST Library/src/stm32f10x_i2c.c"/>
</folder>
- <file file_name="serial/serial.c"/>
+ <folder Name="Drivers">
+ <file file_name="Drivers/CircularBuffer.c"/>
+ <file file_name="Drivers/STM32_USART.c"/>
+ </folder>
+ <folder Name="ParTest">
+ <file file_name="ParTest/ParTest_MCBSTM32.c">
+ <configuration Name="THUMB Flash Debug" build_exclude_from_build="Yes"/>
+ </file>
+ <file file_name="ParTest/ParTest_ST_Eval.c"/>
+ </folder>
</folder>
<folder Name="System Files">
<file file_name="$(StudioDir)/source/thumb_crt0.s"/>
<Project>
<ProjectSessionItem path="RTOSDemo" name="unnamed" />
<ProjectSessionItem path="RTOSDemo;RTOSDemo" name="unnamed" />
+ <ProjectSessionItem path="RTOSDemo;RTOSDemo;Source Files" name="unnamed" />
+ <ProjectSessionItem path="RTOSDemo;RTOSDemo;Source Files;Drivers" name="unnamed" />
+ <ProjectSessionItem path="RTOSDemo;RTOSDemo;Source Files;FreeRTOS Source" name="unnamed" />
+ <ProjectSessionItem path="RTOSDemo;RTOSDemo;Source Files;ST Library" name="unnamed" />
<ProjectSessionItem path="RTOSDemo;RTOSDemo;System Files" name="unnamed" />
</Project>
<Register1>
<Watches active="0" update="Never" />
</Watch4>
<Files>
- <SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\STM32F10x_Startup.s" y="148" path="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\STM32F10x_Startup.s" left="0" selected="0" name="unnamed" top="27" />
- <SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="46" debugPath="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\main.c" y="142" path="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\main.c" left="0" selected="1" name="unnamed" top="0" />
- <SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="29" debugPath="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\FreeRTOSConfig.h" y="88" path="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\FreeRTOSConfig.h" left="0" selected="0" name="unnamed" top="63" />
- <SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\E\Dev\FreeRTOS\WorkingCopy\Source\tasks.c" y="1385" path="C:\E\Dev\FreeRTOS\WorkingCopy\Source\tasks.c" left="0" selected="0" name="unnamed" top="1365" />
- <SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\ST Library\src\stm32f10x_gpio.c" y="53" path="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\ST Library\src\stm32f10x_gpio.c" left="0" selected="0" name="unnamed" top="38" />
+ <SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\ParTest\ParTest.c" y="0" path="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\ParTest\ParTest.c" left="0" selected="0" name="unnamed" top="39" />
+ <SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\ParTest\ParTest_ST_Eval.c" y="80" path="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\ParTest\ParTest_ST_Eval.c" left="0" selected="0" name="unnamed" top="60" />
+ <SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\stm32f10x_conf.h" y="83" path="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\stm32f10x_conf.h" left="0" selected="0" name="unnamed" top="63" />
+ <SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="15" debugPath="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\main.c" y="266" path="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\main.c" left="0" selected="0" name="unnamed" top="235" />
+ <SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\STM32F10x_Startup.s" y="0" path="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\STM32F10x_Startup.s" left="0" selected="1" name="unnamed" top="0" />
</Files>
- <ARMCrossStudioWindow activeProject="RTOSDemo" autoConnectTarget="USB CrossConnect for ARM" debugSearchFileMap="" fileDialogInitialDirectory="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\serial" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Flash Debug" />
+ <ARMCrossStudioWindow activeProject="RTOSDemo" autoConnectTarget="USB CrossConnect for ARM" debugSearchFileMap="" fileDialogInitialDirectory="C:\E\Dev\FreeRTOS\WorkingCopy\Demo\CORTEX_STM32F103_GCC_Rowley\ST Library\src" fileDialogDefaultFilter="*.c" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Flash Debug" />
</session>
#define mainCHECK_DELAY_ERROR ( ( portTickType ) 500 / portTICK_RATE_MS )\r
\r
/* The LED controlled by the 'check' task. */\r
-#define mainCHECK_LED ( 7 )\r
+#define mainCHECK_LED ( 3 )\r
\r
/* Task priorities. */\r
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )\r
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )\r
#define mainFLASH_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
-#define mainLCD_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )\r
#define mainINTEGER_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
\r
-/* The WEB server has a larger stack as it utilises stack hungry string\r
-handling library calls. */\r
-#define mainBASIC_WEB_STACK_SIZE ( configMINIMAL_STACK_SIZE * 4 )\r
-\r
-/* The length of the queue used to send messages to the LCD task. */\r
-#define mainQUEUE_SIZE ( 3 )\r
-\r
-/* The period of the system clock in nano seconds. This is used to calculate\r
-the jitter time in nano seconds. */\r
-#define mainNS_PER_CLOCK ( ( unsigned long ) ( ( 1.0 / ( double ) configCPU_CLOCK_HZ ) * 1000000000.0 ) )\r
-\r
/*-----------------------------------------------------------*/\r
\r
/*\r
RCC_DeInit (); \r
\r
/* Enable HSE. */\r
- RCC_HSEConfig (RCC_HSE_ON); \r
+ RCC_HSEConfig( RCC_HSE_ON ); \r
\r
/* Wait till HSE is ready. */\r
while (RCC_GetFlagStatus(RCC_FLAG_HSERDY) == RESET);\r
\r
/* HCLK = SYSCLK. */\r
- RCC_HCLKConfig (RCC_SYSCLK_Div1); \r
+ RCC_HCLKConfig( RCC_SYSCLK_Div1 ); \r
\r
/* PCLK2 = HCLK. */\r
- RCC_PCLK2Config (RCC_HCLK_Div1); \r
+ RCC_PCLK2Config( RCC_HCLK_Div1 ); \r
\r
/* PCLK1 = HCLK/2. */\r
- RCC_PCLK1Config (RCC_HCLK_Div2); \r
+ RCC_PCLK1Config( RCC_HCLK_Div2 ); \r
\r
/* ADCCLK = PCLK2/4. */\r
- RCC_ADCCLKConfig (RCC_PCLK2_Div4); \r
+ RCC_ADCCLKConfig( RCC_PCLK2_Div4 ); \r
\r
/* Flash 2 wait state. */\r
*( volatile unsigned long * )0x40022000 = 0x01; \r
\r
/* PLLCLK = 8MHz * 9 = 72 MHz */\r
- RCC_PLLConfig (RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);\r
+ RCC_PLLConfig( RCC_PLLSource_HSE_Div1, RCC_PLLMul_9 );\r
\r
/* Enable PLL. */\r
- RCC_PLLCmd (ENABLE); \r
+ RCC_PLLCmd( ENABLE );\r
\r
/* Wait till PLL is ready. */\r
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);\r
\r
/* Initialise the IO used for the LED outputs. */\r
vParTestInitialise();\r
+\r
+ /* SPI2 Periph clock enable */\r
+ RCC_APB1PeriphClockCmd( RCC_APB1Periph_SPI2, ENABLE );\r
+\r
+ /* Initialize the SPI FLASH driver */\r
+ SPI_FLASH_Init();\r
}\r
/*-----------------------------------------------------------*/\r
\r
+++ /dev/null
-/*\r
- FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.\r
-\r
- ***************************************************************************\r
- * *\r
- * If you are: *\r
- * *\r
- * + New to FreeRTOS, *\r
- * + Wanting to learn FreeRTOS or multitasking in general quickly *\r
- * + Looking for basic training, *\r
- * + Wanting to improve your FreeRTOS skills and productivity *\r
- * *\r
- * then take a look at the FreeRTOS eBook *\r
- * *\r
- * "Using the FreeRTOS Real Time Kernel - a Practical Guide" *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- * A pdf reference manual is also available. Both are usually delivered *\r
- * to your inbox within 20 minutes to two hours when purchased between 8am *\r
- * and 8pm GMT (although please allow up to 24 hours in case of *\r
- * exceptional circumstances). Thank you for your support! *\r
- * *\r
- ***************************************************************************\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
- ***NOTE*** The exception to the GPL is included to allow you to distribute\r
- a combined work that includes FreeRTOS without being obliged to provide the\r
- source code for proprietary components outside of the FreeRTOS kernel.\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
- more details. You should have received a copy of the GNU General Public \r
- License and the FreeRTOS license exception along with FreeRTOS; if not it \r
- can be viewed here: http://www.freertos.org/a00114.html and also obtained \r
- by writing to Richard Barry, contact details for whom are available on the\r
- FreeRTOS WEB site.\r
-\r
- 1 tab == 4 spaces!\r
-\r
- http://www.FreeRTOS.org - Documentation, latest information, license and\r
- contact details.\r
-\r
- http://www.SafeRTOS.com - A version that is certified for use in safety\r
- critical systems.\r
-\r
- http://www.OpenRTOS.com - Commercial support, development, porting,\r
- licensing and training services.\r
-*/\r
-\r
-/*\r
- BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.\r
-*/\r
-\r
-/* Scheduler includes. */\r
-#include "FreeRTOS.h"\r
-#include "queue.h"\r
-#include "semphr.h"\r
-\r
-/* Library includes. */\r
-#include "stm32f10x_lib.h"\r
-\r
-/* Demo application includes. */\r
-#include "serial.h"\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Misc defines. */\r
-#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )\r
-#define serNO_BLOCK ( ( portTickType ) 0 )\r
-#define serTX_BLOCK_TIME ( 40 / portTICK_RATE_MS )\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* The queue used to hold received characters. */\r
-static xQueueHandle xRxedChars;\r
-static xQueueHandle xCharsForTx;\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* UART interrupt handler. */\r
-void vUARTInterruptHandler( void );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/*\r
- * See the serial2.h header file.\r
- */\r
-xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
-{\r
-xComPortHandle xReturn;\r
-USART_InitTypeDef USART_InitStructure;\r
-NVIC_InitTypeDef NVIC_InitStructure;\r
-GPIO_InitTypeDef GPIO_InitStructure;\r
-\r
- /* Create the queues used to hold Rx/Tx characters. */\r
- xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );\r
- xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );\r
- \r
- /* If the queue/semaphore was created correctly then setup the serial port\r
- hardware. */\r
- if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) )\r
- {\r
- /* Enable USART1 clock */\r
- RCC_APB2PeriphClockCmd( RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE ); \r
-\r
- /* Configure USART1 Rx (PA10) as input floating */\r
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;\r
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;\r
- GPIO_Init( GPIOA, &GPIO_InitStructure );\r
- \r
- /* Configure USART1 Tx (PA9) as alternate function push-pull */\r
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;\r
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;\r
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
- GPIO_Init( GPIOA, &GPIO_InitStructure );\r
-\r
- USART_InitStructure.USART_BaudRate = ulWantedBaud;\r
- USART_InitStructure.USART_WordLength = USART_WordLength_8b;\r
- USART_InitStructure.USART_StopBits = USART_StopBits_1;\r
- USART_InitStructure.USART_Parity = USART_Parity_No;\r
- USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;\r
- USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;\r
- \r
- USART_Init( USART1, &USART_InitStructure );\r
- \r
- USART_ITConfig( USART1, USART_IT_RXNE, ENABLE );\r
- \r
- NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQChannel;\r
- NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = configLIBRARY_KERNEL_INTERRUPT_PRIORITY;\r
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;\r
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;\r
- NVIC_Init( &NVIC_InitStructure );\r
- \r
- USART_Cmd( USART1, ENABLE ); \r
- }\r
- else\r
- {\r
- xReturn = ( xComPortHandle ) 0;\r
- }\r
-\r
- /* This demo file only supports a single port but we have to return\r
- something to comply with the standard demo header file. */\r
- return xReturn;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )\r
-{\r
- /* The port handle is not required as this driver only supports one port. */\r
- ( void ) pxPort;\r
-\r
- /* Get the next character from the buffer. Return false if no characters\r
- are available, or arrive before xBlockTime expires. */\r
- if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )\r
- {\r
- return pdTRUE;\r
- }\r
- else\r
- {\r
- return pdFALSE;\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )\r
-{\r
-signed portCHAR *pxNext;\r
-\r
- /* A couple of parameters that this port does not use. */\r
- ( void ) usStringLength;\r
- ( void ) pxPort;\r
-\r
- /* NOTE: This implementation does not handle the queue being full as no\r
- block time is used! */\r
-\r
- /* The port handle is not required as this driver only supports UART1. */\r
- ( void ) pxPort;\r
-\r
- /* Send each character in the string, one at a time. */\r
- pxNext = ( signed portCHAR * ) pcString;\r
- while( *pxNext )\r
- {\r
- xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );\r
- pxNext++;\r
- }\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )\r
-{\r
-signed portBASE_TYPE xReturn;\r
-\r
- /* Just to remove the compiler warning. */\r
- ( void ) pxPort;\r
-\r
- if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) == pdPASS )\r
- {\r
- xReturn = pdPASS;\r
- USART_ITConfig( USART1, USART_IT_TXE, ENABLE );\r
- }\r
- else\r
- {\r
- xReturn = pdFAIL;\r
- }\r
-\r
- return xReturn;\r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-void vUARTInterruptHandler( void )\r
-{\r
-portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
-portCHAR cChar;\r
-\r
- if( USART_GetITStatus( USART1, USART_IT_TXE ) == SET )\r
- {\r
- /* The interrupt was caused by the THR becoming empty. Are there any\r
- more characters to transmit? */\r
- if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )\r
- {\r
- /* A character was retrieved from the queue so can be sent to the\r
- THR now. */\r
- USART_SendData( USART1, cChar );\r
- }\r
- else\r
- {\r
- USART_ITConfig( USART1, USART_IT_TXE, DISABLE ); \r
- } \r
- }\r
- \r
- if( USART_GetITStatus( USART1, USART_IT_RXNE ) == SET )\r
- {\r
- cChar = USART_ReceiveData( USART1 );\r
- xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );\r
- } \r
- \r
- portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );\r
-}\r
-\r
-\r
-\r
-\r
-\r
- \r
#define _GPIO\r
#define _GPIOA\r
#define _GPIOB\r
-//#define _GPIOC\r
+#define _GPIOC\r
#define _GPIOD\r
#define _GPIOE\r
//#define _GPIOF\r
/************************************* USART **********************************/\r
#define _USART\r
#define _USART1\r
-//#define _USART2\r
+#define _USART2\r
//#define _USART3\r
//#define _UART4\r
//#define _UART5\r
projects / freertos / commitdiff