]> git.sur5r.net Git - openocd/commitdiff
nds32: support FreeRTOS
authorHsiangkai Wang <hsiangkai@gmail.com>
Mon, 10 Jun 2013 03:37:24 +0000 (11:37 +0800)
committerSpencer Oliver <spen@spen-soft.co.uk>
Fri, 13 Sep 2013 19:37:45 +0000 (19:37 +0000)
Change-Id: I117b5541fb19388c0f5c2344ee42d9151c9a222e
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1577
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
src/rtos/FreeRTOS.c
src/rtos/rtos_standard_stackings.c
src/rtos/rtos_standard_stackings.h

index 04cbdfc935ad42d82365a20a783cb315c26b02a5..321b1e12c5e62ec8a0e0cf633250e33c3b0a3677 100644 (file)
@@ -72,7 +72,19 @@ const struct FreeRTOS_params FreeRTOS_params_list[] = {
        0,                                              /* thread_stack_offset; */
        52,                                             /* thread_name_offset; */
        &rtos_standard_Cortex_M3_stacking,      /* stacking_info */
-       }
+       },
+       {
+       "nds32_v3",                     /* target_name */
+       4,                                              /* thread_count_width; */
+       4,                                              /* pointer_width; */
+       16,                                             /* list_next_offset; */
+       20,                                             /* list_width; */
+       8,                                              /* list_elem_next_offset; */
+       12,                                             /* list_elem_content_offset */
+       0,                                              /* thread_stack_offset; */
+       52,                                             /* thread_name_offset; */
+       &rtos_standard_NDS32_N1068_stacking,    /* stacking_info */
+       },
 };
 
 #define FREERTOS_NUM_PARAMS ((int)(sizeof(FreeRTOS_params_list)/sizeof(struct FreeRTOS_params)))
index cb8afd0a467eb05af0d15eaa4ab9b8ea5d552c1b..7b2eb9db2b8b2c994472fd702ea85e5875687375 100644 (file)
@@ -83,6 +83,45 @@ static const struct stack_register_offset rtos_standard_Cortex_R4_stack_offsets[
        { 0x04, 32 },           /* CSPR */
 };
 
+static const struct stack_register_offset rtos_standard_NDS32_N1068_stack_offsets[] = {
+       { 0x88, 32 },           /* R0  */
+       { 0x8C, 32 },           /* R1 */
+       { 0x14, 32 },           /* R2 */
+       { 0x18, 32 },           /* R3 */
+       { 0x1C, 32 },           /* R4 */
+       { 0x20, 32 },           /* R5 */
+       { 0x24, 32 },           /* R6 */
+       { 0x28, 32 },           /* R7 */
+       { 0x2C, 32 },           /* R8 */
+       { 0x30, 32 },           /* R9 */
+       { 0x34, 32 },           /* R10 */
+       { 0x38, 32 },           /* R11 */
+       { 0x3C, 32 },           /* R12 */
+       { 0x40, 32 },           /* R13 */
+       { 0x44, 32 },           /* R14 */
+       { 0x48, 32 },           /* R15 */
+       { 0x4C, 32 },           /* R16 */
+       { 0x50, 32 },           /* R17 */
+       { 0x54, 32 },           /* R18 */
+       { 0x58, 32 },           /* R19 */
+       { 0x5C, 32 },           /* R20 */
+       { 0x60, 32 },           /* R21 */
+       { 0x64, 32 },           /* R22 */
+       { 0x68, 32 },           /* R23 */
+       { 0x6C, 32 },           /* R24 */
+       { 0x70, 32 },           /* R25 */
+       { 0x74, 32 },           /* R26 */
+       { 0x78, 32 },           /* R27 */
+       { 0x7C, 32 },           /* R28 */
+       { 0x80, 32 },           /* R29 */
+       { 0x84, 32 },           /* R30 (LP) */
+       { 0x00, 32 },           /* R31 (SP) */
+       { 0x04, 32 },           /* PSW */
+       { 0x08, 32 },           /* IPC */
+       { 0x0C, 32 },           /* IPSW */
+       { 0x10, 32 },           /* IFC_LP */
+};
+
 const struct rtos_register_stacking rtos_standard_Cortex_M3_stacking = {
        0x40,                                   /* stack_registers_size */
        -1,                                     /* stack_growth_direction */
@@ -99,3 +138,11 @@ const struct rtos_register_stacking rtos_standard_Cortex_R4_stacking = {
        8,                                      /* stack_alignment */
        rtos_standard_Cortex_R4_stack_offsets   /* register_offsets */
 };
+
+const struct rtos_register_stacking rtos_standard_NDS32_N1068_stacking = {
+       0x90,                                   /* stack_registers_size */
+       -1,                                     /* stack_growth_direction */
+       32,                                     /* num_output_registers */
+       8,                                      /* stack_alignment */
+       rtos_standard_NDS32_N1068_stack_offsets /* register_offsets */
+};
index aa548207290fd6f5b16b42879eef9bfbc0b5ef02..b76e2bb6dfd532e307b60bc6cc497dd416c05dca 100644 (file)
@@ -29,5 +29,6 @@
 
 extern const struct rtos_register_stacking rtos_standard_Cortex_M3_stacking;
 extern const struct rtos_register_stacking rtos_standard_Cortex_R4_stacking;
+extern const struct rtos_register_stacking rtos_standard_NDS32_N1068_stacking;
 
 #endif /* ifndef INCLUDED_RTOS_STANDARD_STACKINGS_H_ */