switch (Cond) {
case CMP_EQ:
- ReplaceOPC (E, OPC_JEQ);
+ ReplaceOPC (E, OP65_JEQ);
break;
case CMP_NE:
- ReplaceOPC (E, OPC_JNE);
+ ReplaceOPC (E, OP65_JNE);
break;
case CMP_GT:
Internal ("Invalid program flow");
}
L = GenCodeLabel (S, N);
- N = NewCodeEntry (OPC_BEQ, AM_BRA, L->Name, L, E->LI);
+ N = NewCodeEntry (OP65_BEQ, AM65_BRA, L->Name, L, E->LI);
InsertCodeEntry (S, N, I);
- ReplaceOPC (E, OPC_JPL);
+ ReplaceOPC (E, OP65_JPL);
break;
case CMP_GE:
- ReplaceOPC (E, OPC_JPL);
+ ReplaceOPC (E, OP65_JPL);
break;
case CMP_LT:
- ReplaceOPC (E, OPC_JMI);
+ ReplaceOPC (E, OP65_JMI);
break;
case CMP_LE:
* jmi Target
* jeq Target
*/
- ReplaceOPC (E, OPC_JMI);
+ ReplaceOPC (E, OP65_JMI);
L = E->JumpTo;
- N = NewCodeEntry (OPC_JEQ, AM_BRA, L->Name, L, E->LI);
+ N = NewCodeEntry (OP65_JEQ, AM65_BRA, L->Name, L, E->LI);
InsertCodeEntry (S, N, I+1);
break;
Internal ("Invalid program flow");
}
L = GenCodeLabel (S, N);
- N = NewCodeEntry (OPC_BEQ, AM_BRA, L->Name, L, E->LI);
+ N = NewCodeEntry (OP65_BEQ, AM65_BRA, L->Name, L, E->LI);
InsertCodeEntry (S, N, I);
- ReplaceOPC (E, OPC_JCS);
+ ReplaceOPC (E, OP65_JCS);
break;
case CMP_UGE:
- ReplaceOPC (E, OPC_JCS);
+ ReplaceOPC (E, OP65_JCS);
break;
case CMP_ULT:
- ReplaceOPC (E, OPC_JCC);
+ ReplaceOPC (E, OP65_JCC);
break;
case CMP_ULE:
* jcc Target
* jeq Target
*/
- ReplaceOPC (E, OPC_JCC);
+ ReplaceOPC (E, OP65_JCC);
L = E->JumpTo;
- N = NewCodeEntry (OPC_JEQ, AM_BRA, L->Name, L, E->LI);
+ N = NewCodeEntry (OP65_JEQ, AM65_BRA, L->Name, L, E->LI);
InsertCodeEntry (S, N, I+1);
break;
-static int IsUnsignedCmp (int Code)
-/* Check if this is an unsigned compare */
-{
- CHECK (Code >= 0);
- return CmpSignedTab [Code] == 0;
-}
-
-
-
static int IsBitOp (const CodeEntry* E)
/* Check if E is one of the bit operations (and, or, eor) */
{
- return (E->OPC == OPC_AND || E->OPC == OPC_ORA || E->OPC == OPC_EOR);
+ return (E->OPC == OP65_AND || E->OPC == OP65_ORA || E->OPC == OP65_EOR);
}
static int IsCmpToZero (const CodeEntry* E)
/* Check if the given instrcuction is a compare to zero instruction */
{
- return (E->OPC == OPC_CMP &&
- E->AM == AM_IMM &&
+ return (E->OPC == OP65_CMP &&
+ E->AM == AM65_IMM &&
(E->Flags & CEF_NUMARG) != 0 &&
E->Num == 0);
}
static int IsSpLoad (const CodeEntry* E)
/* Return true if this is the load of A from the stack */
{
- return E->OPC == OPC_LDA && E->AM == AM_ZP_INDY && strcmp (E->Arg, "sp") == 0;
+ return E->OPC == OP65_LDA && E->AM == AM65_ZP_INDY && strcmp (E->Arg, "sp") == 0;
}
L[0] = GetCodeEntry (S, Index);
/* Check for the sequence */
- return (L[0]->OPC == OPC_LDY &&
- L[0]->AM == AM_IMM &&
+ return (L[0]->OPC == OP65_LDY &&
+ L[0]->AM == AM65_IMM &&
(L[0]->Flags & CEF_NUMARG) != 0 &&
GetCodeEntries (S, L+1, Index+1, Count-1) &&
IsSpLoad (L[1]) &&
!CodeEntryHasLabel (L[1]) &&
- L[2]->OPC == OPC_TAX &&
+ L[2]->OPC == OP65_TAX &&
!CodeEntryHasLabel (L[2]) &&
- L[3]->OPC == OPC_DEY &&
+ L[3]->OPC == OP65_DEY &&
!CodeEntryHasLabel (L[3]) &&
IsSpLoad (L[4]) &&
!CodeEntryHasLabel (L[4]));
*
*/
{
- return (L[0]->OPC == OPC_CPX &&
- L[0]->AM == AM_IMM &&
- (L[0]->Flags & CEF_NUMARG) != 0 &&
- !CodeEntryHasLabel (L[0]) &&
- (L[1]->OPC == OPC_JNE || L[1]->OPC == OPC_BNE) &&
- L[1]->JumpTo != 0 &&
- !CodeEntryHasLabel (L[1]) &&
- L[2]->OPC == OPC_CMP &&
- L[2]->AM == AM_IMM &&
- (L[2]->Flags & CEF_NUMARG) != 0 &&
- (L[3]->Info & OF_ZBRA) != 0 &&
- L[3]->JumpTo != 0 &&
+ return (L[0]->OPC == OP65_CPX &&
+ L[0]->AM == AM65_IMM &&
+ (L[0]->Flags & CEF_NUMARG) != 0 &&
+ !CodeEntryHasLabel (L[0]) &&
+ (L[1]->OPC == OP65_JNE || L[1]->OPC == OP65_BNE) &&
+ L[1]->JumpTo != 0 &&
+ !CodeEntryHasLabel (L[1]) &&
+ L[2]->OPC == OP65_CMP &&
+ L[2]->AM == AM65_IMM &&
+ (L[2]->Flags & CEF_NUMARG) != 0 &&
+ (L[3]->Info & OF_ZBRA) != 0 &&
+ L[3]->JumpTo != 0 &&
(L[1]->JumpTo->Owner == L[3] || L[1]->JumpTo == L[3]->JumpTo));
}
CodeEntry* E = GetCodeEntry (S, I);
/* Check for a boolean transformer */
- if (E->OPC == OPC_JSR &&
+ if (E->OPC == OP65_JSR &&
(Cond = FindBoolCmpCond (E->Arg)) != CMP_INV &&
(N = GetNextCodeEntry (S, I)) != 0 &&
(N->Info & OF_ZBRA) != 0) {
CodeEntry* E = GetCodeEntry (S, I);
/* Check for the sequence */
- if (E->OPC == OPC_SBC &&
- GetCodeEntries (S, L, I+1, 3) &&
- (L[0]->OPC == OPC_BCS || L[0]->OPC == OPC_JCS) &&
- L[0]->JumpTo != 0 &&
- !CodeEntryHasLabel (L[0]) &&
- L[1]->OPC == OPC_DEX &&
- !CodeEntryHasLabel (L[1]) &&
- L[0]->JumpTo->Owner == L[2] &&
+ if (E->OPC == OP65_SBC &&
+ GetCodeEntries (S, L, I+1, 3) &&
+ (L[0]->OPC == OP65_BCS || L[0]->OPC == OP65_JCS) &&
+ L[0]->JumpTo != 0 &&
+ !CodeEntryHasLabel (L[0]) &&
+ L[1]->OPC == OP65_DEX &&
+ !CodeEntryHasLabel (L[1]) &&
+ L[0]->JumpTo->Owner == L[2] &&
!RegXUsed (S, I+3)) {
/* Remove the bcs/dex */
CodeEntry* E = GetCodeEntry (S, I);
/* Check for the sequence */
- if (E->OPC == OPC_LDA &&
+ if (E->OPC == OP65_LDA &&
GetCodeEntries (S, L, I+1, 5) &&
- L[0]->OPC == OPC_SEC &&
+ L[0]->OPC == OP65_SEC &&
!CodeEntryHasLabel (L[0]) &&
- L[1]->OPC == OPC_STA &&
+ L[1]->OPC == OP65_STA &&
strcmp (L[1]->Arg, "tmp1") == 0 &&
!CodeEntryHasLabel (L[1]) &&
- L[2]->OPC == OPC_LDA &&
+ L[2]->OPC == OP65_LDA &&
!CodeEntryHasLabel (L[2]) &&
- L[3]->OPC == OPC_SBC &&
+ L[3]->OPC == OP65_SBC &&
strcmp (L[3]->Arg, "tmp1") == 0 &&
!CodeEntryHasLabel (L[3]) &&
- L[4]->OPC == OPC_STA &&
+ L[4]->OPC == OP65_STA &&
strcmp (L[4]->Arg, L[2]->Arg) == 0 &&
!CodeEntryHasLabel (L[4])) {
* op to SBC.
*/
MoveCodeEntry (S, I, I+3);
- ReplaceOPC (E, OPC_SBC);
+ ReplaceOPC (E, OP65_SBC);
/* If the sequence head had a label, move this label back to the
* head.
CodeEntry* E = GetCodeEntry (S, I);
/* Check for the sequence */
- if (E->OPC == OPC_ADC &&
- GetCodeEntries (S, L, I+1, 3) &&
- (L[0]->OPC == OPC_BCC || L[0]->OPC == OPC_JCC) &&
- L[0]->JumpTo != 0 &&
- !CodeEntryHasLabel (L[0]) &&
- L[1]->OPC == OPC_INX &&
- !CodeEntryHasLabel (L[1]) &&
- L[0]->JumpTo->Owner == L[2] &&
+ if (E->OPC == OP65_ADC &&
+ GetCodeEntries (S, L, I+1, 3) &&
+ (L[0]->OPC == OP65_BCC || L[0]->OPC == OP65_JCC) &&
+ L[0]->JumpTo != 0 &&
+ !CodeEntryHasLabel (L[0]) &&
+ L[1]->OPC == OP65_INX &&
+ !CodeEntryHasLabel (L[1]) &&
+ L[0]->JumpTo->Owner == L[2] &&
!RegXUsed (S, I+3)) {
/* Remove the bcs/dex */
CodeEntry* E = GetCodeEntry (S, I);
/* Check for the sequence */
- if (E->OPC == OPC_STX &&
+ if (E->OPC == OP65_STX &&
GetCodeEntries (S, L, I+1, 2) &&
- L[0]->OPC == OPC_STX &&
+ L[0]->OPC == OP65_STX &&
strcmp (L[0]->Arg, "tmp1") == 0 &&
!CodeEntryHasLabel (L[0]) &&
- L[1]->OPC == OPC_ORA &&
+ L[1]->OPC == OP65_ORA &&
strcmp (L[1]->Arg, "tmp1") == 0 &&
!CodeEntryHasLabel (L[1])) {
DelCodeEntries (S, I+1, 2);
/* Insert the ora instead */
- InsertCodeEntry (S, NewCodeEntry (OPC_ORA, E->AM, E->Arg, 0, E->LI), I+1);
+ InsertCodeEntry (S, NewCodeEntry (OP65_ORA, E->AM, E->Arg, 0, E->LI), I+1);
/* Remember, we had changes */
++Changes;
CodeEntry* E = GetCodeEntry (S, I);
/* Check for the sequence */
- if ((E->OPC == OPC_LDA || IsBitOp (E)) &&
+ if ((E->OPC == OP65_LDA || IsBitOp (E)) &&
GetCodeEntries (S, L, I+1, 2) &&
IsCmpToZero (L[0]) &&
!CodeEntryHasLabel (L[0]) &&
CodeEntry* E = GetCodeEntry (S, I);
/* Check for the sequence */
- if (E->OPC == OPC_LDA &&
- GetCodeEntries (S, L, I+1, 5) &&
- L[0]->OPC == OPC_LDX &&
- !CodeEntryHasLabel (L[0]) &&
+ if (E->OPC == OP65_LDA &&
+ GetCodeEntries (S, L, I+1, 5) &&
+ L[0]->OPC == OP65_LDX &&
+ !CodeEntryHasLabel (L[0]) &&
IsImmCmp16 (S, L+1)) {
if (L[1]->Num == 0 && L[3]->Num == 0) {
/* The value is zero, we may use the simple code version. */
- ReplaceOPC (L[0], OPC_ORA);
+ ReplaceOPC (L[0], OP65_ORA);
DelCodeEntries (S, I+2, 3);
} else {
/* Move the lda instruction after the first branch. This will
MoveCodeEntry (S, I, I+4);
/* We will replace the ldx/cpx by lda/cmp */
- ReplaceOPC (L[0], OPC_LDA);
- ReplaceOPC (L[1], OPC_CMP);
+ ReplaceOPC (L[0], OP65_LDA);
+ ReplaceOPC (L[1], OP65_CMP);
/* Beware: If the first LDA instruction had a label, we have
* to move this label to the top of the sequence again.
* ora (sp),y
* jne/jeq ...
*/
- ReplaceOPC (L[4], OPC_ORA);
+ ReplaceOPC (L[4], OP65_ORA);
DelCodeEntries (S, I+5, 3); /* cpx/bne/cmp */
DelCodeEntry (S, I+2); /* tax */
* jne/jeq ...
*/
DelCodeEntry (S, I+2); /* tax */
- ReplaceOPC (L[5], OPC_CMP); /* cpx -> cmp */
+ ReplaceOPC (L[5], OP65_CMP); /* cpx -> cmp */
MoveCodeEntry (S, I+4, I+2); /* cmp */
MoveCodeEntry (S, I+5, I+3); /* bne */
CodeEntry* E = GetCodeEntry (S, I);
/* Check for the sequence */
- if (E->OPC == OPC_JSR &&
+ if (E->OPC == OP65_JSR &&
(Cond = FindTosCmpCond (E->Arg)) != CMP_INV &&
(N = GetNextCodeEntry (S, I)) != 0 &&
(N->Info & OF_ZBRA) != 0 &&
}
/* Replace the subroutine call. */
- E = NewCodeEntry (OPC_JSR, AM_ABS, "tosicmp", 0, E->LI);
+ E = NewCodeEntry (OP65_JSR, AM65_ABS, "tosicmp", 0, E->LI);
InsertCodeEntry (S, E, I+1);
DelCodeEntry (S, I);
CodeEntry* E = GetCodeEntry (S, I);
/* Check for a ldx */
- if (E->OPC == OPC_LDX &&
- E->AM == AM_IMM &&
+ if (E->OPC == OP65_LDX &&
+ E->AM == AM65_IMM &&
(E->Flags & CEF_NUMARG) != 0 &&
E->Num == 0 &&
GetCodeEntries (S, L, I+1, 2) &&
- L[0]->OPC == OPC_LDA &&
+ L[0]->OPC == OP65_LDA &&
(L[0]->Use & REG_X) == 0 &&
- L[1]->OPC == OPC_JSR &&
+ L[1]->OPC == OP65_JSR &&
strcmp (L[1]->Arg, "bnega") == 0) {
/* Remove the ldx instruction */
CodeEntry* E = GetCodeEntry (S, I);
/* Check for the sequence */
- if (E->OPC == OPC_LDA &&
+ if (E->OPC == OP65_LDA &&
GetCodeEntries (S, L, I+1, 2) &&
- L[0]->OPC == OPC_JSR &&
+ L[0]->OPC == OP65_JSR &&
strcmp (L[0]->Arg, "bnega") == 0 &&
!CodeEntryHasLabel (L[0]) &&
(L[1]->Info & OF_ZBRA) != 0) {
CodeEntry* E = GetCodeEntry (S, I);
/* Check for the sequence */
- if (E->OPC == OPC_LDA &&
- E->AM == AM_ZP_INDY &&
+ if (E->OPC == OP65_LDA &&
+ E->AM == AM65_ZP_INDY &&
GetCodeEntries (S, L, I+1, 5) &&
- L[0]->OPC == OPC_TAX &&
- L[1]->OPC == OPC_DEY &&
- L[2]->OPC == OPC_LDA &&
- L[2]->AM == AM_ZP_INDY &&
+ L[0]->OPC == OP65_TAX &&
+ L[1]->OPC == OP65_DEY &&
+ L[2]->OPC == OP65_LDA &&
+ L[2]->AM == AM65_ZP_INDY &&
strcmp (L[2]->Arg, E->Arg) == 0 &&
!CodeEntryHasLabel (L[2]) &&
- L[3]->OPC == OPC_JSR &&
+ L[3]->OPC == OP65_JSR &&
strcmp (L[3]->Arg, "bnegax") == 0 &&
!CodeEntryHasLabel (L[3]) &&
(L[4]->Info & OF_ZBRA) != 0) {
/* lda --> ora */
- ReplaceOPC (L[2], OPC_ORA);
+ ReplaceOPC (L[2], OP65_ORA);
/* Invert the branch */
ReplaceOPC (L[4], GetInverseBranch (L[4]->OPC));
CodeEntry* E = GetCodeEntry (S, I);
/* Check for the sequence */
- if (E->OPC == OPC_LDA &&
+ if (E->OPC == OP65_LDA &&
GetCodeEntries (S, L, I+1, 3) &&
- L[0]->OPC == OPC_LDX &&
+ L[0]->OPC == OP65_LDX &&
!CodeEntryHasLabel (L[0]) &&
- L[1]->OPC == OPC_JSR &&
+ L[1]->OPC == OP65_JSR &&
strcmp (L[1]->Arg, "bnegax") == 0 &&
!CodeEntryHasLabel (L[1]) &&
(L[2]->Info & OF_ZBRA) != 0) {
/* ldx --> ora */
- ReplaceOPC (L[0], OPC_ORA);
+ ReplaceOPC (L[0], OP65_ORA);
/* Invert the branch */
ReplaceOPC (L[2], GetInverseBranch (L[2]->OPC));
CodeEntry* E = GetCodeEntry (S, I);
/* Check for the sequence */
- if (E->OPC == OPC_JSR &&
- E->Arg[0] == '_' &&
+ if (E->OPC == OP65_JSR &&
+ E->Arg[0] == '_' &&
GetCodeEntries (S, L, I+1, 2) &&
- L[0]->OPC == OPC_JSR &&
+ L[0]->OPC == OP65_JSR &&
strncmp (L[0]->Arg,"bnega",5) == 0 &&
!CodeEntryHasLabel (L[0]) &&
(L[1]->Info & OF_ZBRA) != 0) {
/* Insert apropriate test code */
if (ByteSized) {
/* Test bytes */
- X = NewCodeEntry (OPC_TAX, AM_IMP, 0, 0, L[0]->LI);
+ X = NewCodeEntry (OP65_TAX, AM65_IMP, 0, 0, L[0]->LI);
InsertCodeEntry (S, X, I+2);
} else {
/* Test words */
- X = NewCodeEntry (OPC_STX, AM_ZP, "tmp1", 0, L[0]->LI);
+ X = NewCodeEntry (OP65_STX, AM65_ZP, "tmp1", 0, L[0]->LI);
InsertCodeEntry (S, X, I+2);
- X = NewCodeEntry (OPC_ORA, AM_ZP, "tmp1", 0, L[0]->LI);
+ X = NewCodeEntry (OP65_ORA, AM65_ZP, "tmp1", 0, L[0]->LI);
InsertCodeEntry (S, X, I+3);
}
/* Opcode description table */
-const OPCDesc OPCTable[OPC_COUNT] = {
- { OPC_ADC, "adc", 0, REG_A, REG_A, OF_NONE },
- { OPC_AND, "and", 0, REG_A, REG_A, OF_NONE },
- { OPC_ASL, "asl", 0, REG_A, REG_A, OF_NONE },
- { OPC_BCC, "bcc", 2, REG_NONE, REG_NONE, OF_CBRA },
- { OPC_BCS, "bcs", 2, REG_NONE, REG_NONE, OF_CBRA },
- { OPC_BEQ, "beq", 2, REG_NONE, REG_NONE, OF_CBRA | OF_ZBRA | OF_FBRA },
- { OPC_BIT, "bit", 0, REG_A, REG_NONE, OF_NONE },
- { OPC_BMI, "bmi", 2, REG_NONE, REG_NONE, OF_CBRA | OF_FBRA },
- { OPC_BNE, "bne", 2, REG_NONE, REG_NONE, OF_CBRA | OF_ZBRA | OF_FBRA },
- { OPC_BPL, "bpl", 2, REG_NONE, REG_NONE, OF_CBRA | OF_FBRA },
- { OPC_BRA, "bra", 2, REG_NONE, REG_NONE, OF_UBRA },
- { OPC_BRK, "brk", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_BVC, "bvc", 2, REG_NONE, REG_NONE, OF_CBRA },
- { OPC_BVS, "bvs", 2, REG_NONE, REG_NONE, OF_CBRA },
- { OPC_CLC, "clc", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_CLD, "cld", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_CLI, "cli", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_CLV, "clv", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_CMP, "cmp", 0, REG_A, REG_NONE, OF_NONE },
- { OPC_CPX, "cpx", 0, REG_X, REG_NONE, OF_NONE },
- { OPC_CPY, "cpy", 0, REG_Y, REG_NONE, OF_NONE },
- { OPC_DEA, "dea", 1, REG_A, REG_A, OF_NONE },
- { OPC_DEC, "dec", 0, REG_NONE, REG_NONE, OF_NONE },
- { OPC_DEX, "dex", 1, REG_X, REG_X, OF_NONE },
- { OPC_DEY, "dey", 1, REG_Y, REG_Y, OF_NONE },
- { OPC_EOR, "eor", 0, REG_A, REG_A, OF_NONE },
- { OPC_INA, "ina", 1, REG_A, REG_A, OF_NONE },
- { OPC_INC, "inc", 0, REG_NONE, REG_NONE, OF_NONE },
- { OPC_INX, "inx", 1, REG_X, REG_X, OF_NONE },
- { OPC_INY, "iny", 1, REG_Y, REG_Y, OF_NONE },
- { OPC_JCC, "jcc", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA },
- { OPC_JCS, "jcs", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA },
- { OPC_JEQ, "jeq", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA | OF_ZBRA | OF_FBRA },
- { OPC_JMI, "jmi", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA | OF_FBRA },
- { OPC_JMP, "jmp", 3, REG_NONE, REG_NONE, OF_UBRA | OF_LBRA },
- { OPC_JNE, "jne", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA | OF_ZBRA | OF_FBRA },
- { OPC_JPL, "jpl", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA | OF_FBRA },
- { OPC_JSR, "jsr", 3, REG_NONE, REG_NONE, OF_NONE },
- { OPC_JVC, "jvc", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA },
- { OPC_JVS, "jvs", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA },
- { OPC_LDA, "lda", 0, REG_NONE, REG_A, OF_LOAD },
- { OPC_LDX, "ldx", 0, REG_NONE, REG_X, OF_LOAD },
- { OPC_LDY, "ldy", 0, REG_NONE, REG_Y, OF_LOAD },
- { OPC_LSR, "lsr", 0, REG_A, REG_A, OF_NONE },
- { OPC_NOP, "nop", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_ORA, "ora", 0, REG_A, REG_A, OF_NONE },
- { OPC_PHA, "pha", 1, REG_A, REG_NONE, OF_NONE },
- { OPC_PHP, "php", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_PHX, "phx", 1, REG_X, REG_NONE, OF_NONE },
- { OPC_PHY, "phy", 1, REG_Y, REG_NONE, OF_NONE },
- { OPC_PLA, "pla", 1, REG_NONE, REG_A, OF_NONE },
- { OPC_PLP, "plp", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_PLX, "plx", 1, REG_NONE, REG_X, OF_NONE },
- { OPC_PLY, "ply", 1, REG_NONE, REG_Y, OF_NONE },
- { OPC_ROL, "rol", 0, REG_A, REG_A, OF_NONE },
- { OPC_ROR, "ror", 0, REG_A, REG_A, OF_NONE },
- { OPC_RTI, "rti", 1, REG_NONE, REG_NONE, OF_RET },
- { OPC_RTS, "rts", 1, REG_NONE, REG_NONE, OF_RET },
- { OPC_SBC, "sbc", 0, REG_A, REG_A, OF_NONE },
- { OPC_SEC, "sec", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_SED, "sed", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_SEI, "sei", 1, REG_NONE, REG_NONE, OF_NONE },
- { OPC_STA, "sta", 0, REG_A, REG_NONE, OF_NONE },
- { OPC_STX, "stx", 0, REG_X, REG_NONE, OF_NONE },
- { OPC_STY, "sty", 0, REG_Y, REG_NONE, OF_NONE },
- { OPC_TAX, "tax", 1, REG_A, REG_X, OF_XFR },
- { OPC_TAY, "tay", 1, REG_A, REG_Y, OF_XFR },
- { OPC_TRB, "trb", 0, REG_A, REG_NONE, OF_NONE },
- { OPC_TSB, "tsb", 0, REG_A, REG_NONE, OF_NONE },
- { OPC_TSX, "tsx", 1, REG_NONE, REG_X, OF_XFR },
- { OPC_TXA, "txa", 1, REG_X, REG_A, OF_XFR },
- { OPC_TXS, "txs", 1, REG_X, REG_NONE, OF_XFR },
- { OPC_TYA, "tya", 1, REG_A, REG_A, OF_XFR },
+const OPCDesc OPCTable[OPCODE_COUNT] = {
+
+ /* 65XX opcodes */
+ { OP65_ADC, "adc", 0, REG_A, REG_A, OF_NONE },
+ { OP65_AND, "and", 0, REG_A, REG_A, OF_NONE },
+ { OP65_ASL, "asl", 0, REG_A, REG_A, OF_NONE },
+ { OP65_BCC, "bcc", 2, REG_NONE, REG_NONE, OF_CBRA },
+ { OP65_BCS, "bcs", 2, REG_NONE, REG_NONE, OF_CBRA },
+ { OP65_BEQ, "beq", 2, REG_NONE, REG_NONE, OF_CBRA | OF_ZBRA | OF_FBRA },
+ { OP65_BIT, "bit", 0, REG_A, REG_NONE, OF_NONE },
+ { OP65_BMI, "bmi", 2, REG_NONE, REG_NONE, OF_CBRA | OF_FBRA },
+ { OP65_BNE, "bne", 2, REG_NONE, REG_NONE, OF_CBRA | OF_ZBRA | OF_FBRA },
+ { OP65_BPL, "bpl", 2, REG_NONE, REG_NONE, OF_CBRA | OF_FBRA },
+ { OP65_BRA, "bra", 2, REG_NONE, REG_NONE, OF_UBRA },
+ { OP65_BRK, "brk", 1, REG_NONE, REG_NONE, OF_NONE },
+ { OP65_BVC, "bvc", 2, REG_NONE, REG_NONE, OF_CBRA },
+ { OP65_BVS, "bvs", 2, REG_NONE, REG_NONE, OF_CBRA },
+ { OP65_CLC, "clc", 1, REG_NONE, REG_NONE, OF_NONE },
+ { OP65_CLD, "cld", 1, REG_NONE, REG_NONE, OF_NONE },
+ { OP65_CLI, "cli", 1, REG_NONE, REG_NONE, OF_NONE },
+ { OP65_CLV, "clv", 1, REG_NONE, REG_NONE, OF_NONE },
+ { OP65_CMP, "cmp", 0, REG_A, REG_NONE, OF_NONE },
+ { OP65_CPX, "cpx", 0, REG_X, REG_NONE, OF_NONE },
+ { OP65_CPY, "cpy", 0, REG_Y, REG_NONE, OF_NONE },
+ { OP65_DEA, "dea", 1, REG_A, REG_A, OF_NONE },
+ { OP65_DEC, "dec", 0, REG_NONE, REG_NONE, OF_NONE },
+ { OP65_DEX, "dex", 1, REG_X, REG_X, OF_NONE },
+ { OP65_DEY, "dey", 1, REG_Y, REG_Y, OF_NONE },
+ { OP65_EOR, "eor", 0, REG_A, REG_A, OF_NONE },
+ { OP65_INA, "ina", 1, REG_A, REG_A, OF_NONE },
+ { OP65_INC, "inc", 0, REG_NONE, REG_NONE, OF_NONE },
+ { OP65_INX, "inx", 1, REG_X, REG_X, OF_NONE },
+ { OP65_INY, "iny", 1, REG_Y, REG_Y, OF_NONE },
+ { OP65_JCC, "jcc", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA },
+ { OP65_JCS, "jcs", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA },
+ { OP65_JEQ, "jeq", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA | OF_ZBRA | OF_FBRA },
+ { OP65_JMI, "jmi", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA | OF_FBRA },
+ { OP65_JMP, "jmp", 3, REG_NONE, REG_NONE, OF_UBRA | OF_LBRA },
+ { OP65_JNE, "jne", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA | OF_ZBRA | OF_FBRA },
+ { OP65_JPL, "jpl", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA | OF_FBRA },
+ { OP65_JSR, "jsr", 3, REG_NONE, REG_NONE, OF_CALL },
+ { OP65_JVC, "jvc", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA },
+ { OP65_JVS, "jvs", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA },
+ { OP65_LDA, "lda", 0, REG_NONE, REG_A, OF_LOAD },
+ { OP65_LDX, "ldx", 0, REG_NONE, REG_X, OF_LOAD },
+ { OP65_LDY, "ldy", 0, REG_NONE, REG_Y, OF_LOAD },
+ { OP65_LSR, "lsr", 0, REG_A, REG_A, OF_NONE },
+ { OP65_NOP, "nop", 1, REG_NONE, REG_NONE, OF_NONE },
+ { OP65_ORA, "ora", 0, REG_A, REG_A, OF_NONE },
+ { OP65_PHA, "pha", 1, REG_A, REG_NONE, OF_NONE },
+ { OP65_PHP, "php", 1, REG_NONE, REG_NONE, OF_NONE },
+ { OP65_PHX, "phx", 1, REG_X, REG_NONE, OF_NONE },
+ { OP65_PHY, "phy", 1, REG_Y, REG_NONE, OF_NONE },
+ { OP65_PLA, "pla", 1, REG_NONE, REG_A, OF_NONE },
+ { OP65_PLP, "plp", 1, REG_NONE, REG_NONE, OF_NONE },
+ { OP65_PLX, "plx", 1, REG_NONE, REG_X, OF_NONE },
+ { OP65_PLY, "ply", 1, REG_NONE, REG_Y, OF_NONE },
+ { OP65_ROL, "rol", 0, REG_A, REG_A, OF_NONE },
+ { OP65_ROR, "ror", 0, REG_A, REG_A, OF_NONE },
+ { OP65_RTI, "rti", 1, REG_NONE, REG_NONE, OF_RET },
+ { OP65_RTS, "rts", 1, REG_NONE, REG_NONE, OF_RET },
+ { OP65_SBC, "sbc", 0, REG_A, REG_A, OF_NONE },
+ { OP65_SEC, "sec", 1, REG_NONE, REG_NONE, OF_NONE },
+ { OP65_SED, "sed", 1, REG_NONE, REG_NONE, OF_NONE },
+ { OP65_SEI, "sei", 1, REG_NONE, REG_NONE, OF_NONE },
+ { OP65_STA, "sta", 0, REG_A, REG_NONE, OF_NONE },
+ { OP65_STX, "stx", 0, REG_X, REG_NONE, OF_NONE },
+ { OP65_STY, "sty", 0, REG_Y, REG_NONE, OF_NONE },
+ { OP65_TAX, "tax", 1, REG_A, REG_X, OF_XFR },
+ { OP65_TAY, "tay", 1, REG_A, REG_Y, OF_XFR },
+ { OP65_TRB, "trb", 0, REG_A, REG_NONE, OF_NONE },
+ { OP65_TSB, "tsb", 0, REG_A, REG_NONE, OF_NONE },
+ { OP65_TSX, "tsx", 1, REG_NONE, REG_X, OF_XFR },
+ { OP65_TXA, "txa", 1, REG_X, REG_A, OF_XFR },
+ { OP65_TXS, "txs", 1, REG_X, REG_NONE, OF_XFR },
+ { OP65_TYA, "tya", 1, REG_A, REG_A, OF_XFR },
};
const OPCDesc* FindOpcode (const char* M)
/* Find the given opcode and return the opcode number. If the opcode was not
- * found, return OPC_INVALID.
+ * found, return OP65_INVALID.
*/
{
unsigned I;
Mnemo[I] = '\0';
/* Search for the mnemonic in the table and return the result */
- return bsearch (Mnemo, OPCTable, OPC_COUNT, sizeof (OPCTable[0]), Compare);
+ return bsearch (Mnemo, OPCTable, OPCODE_COUNT, sizeof (OPCTable[0]), Compare);
}
/* Check the addressing mode. */
switch (AM) {
- case AM_IMP: return 1;
- case AM_ACC: return 1;
- case AM_IMM: return 2;
- case AM_ZP: return 2;
- case AM_ZPX: return 2;
- case AM_ABS: return 3;
- case AM_ABSX: return 3;
- case AM_ABSY: return 3;
- case AM_ZPX_IND: return 2;
- case AM_ZP_INDY: return 2;
- case AM_ZP_IND: return 2;
+ case AM65_IMP: return 1;
+ case AM65_ACC: return 1;
+ case AM65_IMM: return 2;
+ case AM65_ZP: return 2;
+ case AM65_ZPX: return 2;
+ case AM65_ABS: return 3;
+ case AM65_ABSX: return 3;
+ case AM65_ABSY: return 3;
+ case AM65_ZPX_IND: return 2;
+ case AM65_ZP_INDY: return 2;
+ case AM65_ZP_IND: return 2;
default:
Internal ("Invalid addressing mode");
return 0;
{
/* Check the addressing mode. */
switch (AM) {
- case AM_ACC: return REG_A;
- case AM_ZPX: return REG_X;
- case AM_ABSX: return REG_X;
- case AM_ABSY: return REG_Y;
- case AM_ZPX_IND: return REG_X;
- case AM_ZP_INDY: return REG_Y;
- default: return REG_NONE;
+ case AM65_ACC: return REG_A;
+ case AM65_ZPX: return REG_X;
+ case AM65_ABSX: return REG_X;
+ case AM65_ABSY: return REG_Y;
+ case AM65_ZPX_IND: return REG_X;
+ case AM65_ZP_INDY: return REG_Y;
+ default: return REG_NONE;
}
}
/* Return a branch that reverse the condition of the branch given in OPC */
{
switch (OPC) {
- case OPC_BCC: return OPC_BCS;
- case OPC_BCS: return OPC_BCC;
- case OPC_BEQ: return OPC_BNE;
- case OPC_BMI: return OPC_BPL;
- case OPC_BNE: return OPC_BEQ;
- case OPC_BPL: return OPC_BMI;
- case OPC_BVC: return OPC_BVS;
- case OPC_BVS: return OPC_BVC;
- case OPC_JCC: return OPC_JCS;
- case OPC_JCS: return OPC_JCC;
- case OPC_JEQ: return OPC_JNE;
- case OPC_JMI: return OPC_JPL;
- case OPC_JNE: return OPC_JEQ;
- case OPC_JPL: return OPC_JMI;
- case OPC_JVC: return OPC_JVS;
- case OPC_JVS: return OPC_JVC;
+ case OP65_BCC: return OP65_BCS;
+ case OP65_BCS: return OP65_BCC;
+ case OP65_BEQ: return OP65_BNE;
+ case OP65_BMI: return OP65_BPL;
+ case OP65_BNE: return OP65_BEQ;
+ case OP65_BPL: return OP65_BMI;
+ case OP65_BVC: return OP65_BVS;
+ case OP65_BVS: return OP65_BVC;
+ case OP65_JCC: return OP65_JCS;
+ case OP65_JCS: return OP65_JCC;
+ case OP65_JEQ: return OP65_JNE;
+ case OP65_JMI: return OP65_JPL;
+ case OP65_JNE: return OP65_JEQ;
+ case OP65_JPL: return OP65_JMI;
+ case OP65_JVC: return OP65_JVS;
+ case OP65_JVS: return OP65_JVC;
default:
Internal ("GetInverseBranch: Invalid opcode: %d", OPC);
return 0;
*/
{
switch (OPC) {
- case OPC_BCC:
- case OPC_JCC: return OPC_BCC;
- case OPC_BCS:
- case OPC_JCS: return OPC_BCS;
- case OPC_BEQ:
- case OPC_JEQ: return OPC_BEQ;
- case OPC_BMI:
- case OPC_JMI: return OPC_BMI;
- case OPC_BNE:
- case OPC_JNE: return OPC_BNE;
- case OPC_BPL:
- case OPC_JPL: return OPC_BPL;
- case OPC_BVC:
- case OPC_JVC: return OPC_BVC;
- case OPC_BVS:
- case OPC_JVS: return OPC_BVS;
- case OPC_BRA:
- case OPC_JMP: return (CPU == CPU_65C02)? OPC_BRA : OPC_JMP;
+ case OP65_BCC:
+ case OP65_JCC: return OP65_BCC;
+ case OP65_BCS:
+ case OP65_JCS: return OP65_BCS;
+ case OP65_BEQ:
+ case OP65_JEQ: return OP65_BEQ;
+ case OP65_BMI:
+ case OP65_JMI: return OP65_BMI;
+ case OP65_BNE:
+ case OP65_JNE: return OP65_BNE;
+ case OP65_BPL:
+ case OP65_JPL: return OP65_BPL;
+ case OP65_BVC:
+ case OP65_JVC: return OP65_BVC;
+ case OP65_BVS:
+ case OP65_JVS: return OP65_BVS;
+ case OP65_BRA:
+ case OP65_JMP: return (CPU == CPU_65C02)? OP65_BRA : OP65_JMP;
default:
Internal ("MakeShortBranch: Invalid opcode: %d", OPC);
return 0;
*/
{
switch (OPC) {
- case OPC_BCC:
- case OPC_JCC: return OPC_JCC;
- case OPC_BCS:
- case OPC_JCS: return OPC_JCS;
- case OPC_BEQ:
- case OPC_JEQ: return OPC_JEQ;
- case OPC_BMI:
- case OPC_JMI: return OPC_JMI;
- case OPC_BNE:
- case OPC_JNE: return OPC_JNE;
- case OPC_BPL:
- case OPC_JPL: return OPC_JPL;
- case OPC_BVC:
- case OPC_JVC: return OPC_JVC;
- case OPC_BVS:
- case OPC_JVS: return OPC_JVS;
- case OPC_BRA:
- case OPC_JMP: return OPC_JMP;
+ case OP65_BCC:
+ case OP65_JCC: return OP65_JCC;
+ case OP65_BCS:
+ case OP65_JCS: return OP65_JCS;
+ case OP65_BEQ:
+ case OP65_JEQ: return OP65_JEQ;
+ case OP65_BMI:
+ case OP65_JMI: return OP65_JMI;
+ case OP65_BNE:
+ case OP65_JNE: return OP65_JNE;
+ case OP65_BPL:
+ case OP65_JPL: return OP65_JPL;
+ case OP65_BVC:
+ case OP65_JVC: return OP65_JVC;
+ case OP65_BVS:
+ case OP65_JVS: return OP65_JVS;
+ case OP65_BRA:
+ case OP65_JMP: return OP65_JMP;
default:
Internal ("MakeLongBranch: Invalid opcode: %d", OPC);
return 0;
/* Get the condition for the conditional branch in OPC */
{
switch (OPC) {
- case OPC_BCC: return BC_CC;
- case OPC_BCS: return BC_CS;
- case OPC_BEQ: return BC_EQ;
- case OPC_BMI: return BC_MI;
- case OPC_BNE: return BC_NE;
- case OPC_BPL: return BC_PL;
- case OPC_BVC: return BC_VC;
- case OPC_BVS: return BC_VS;
- case OPC_JCC: return BC_CC;
- case OPC_JCS: return BC_CS;
- case OPC_JEQ: return BC_EQ;
- case OPC_JMI: return BC_MI;
- case OPC_JNE: return BC_NE;
- case OPC_JPL: return BC_PL;
- case OPC_JVC: return BC_VC;
- case OPC_JVS: return BC_VS;
+ case OP65_BCC: return BC_CC;
+ case OP65_BCS: return BC_CS;
+ case OP65_BEQ: return BC_EQ;
+ case OP65_BMI: return BC_MI;
+ case OP65_BNE: return BC_NE;
+ case OP65_BPL: return BC_PL;
+ case OP65_BVC: return BC_VC;
+ case OP65_BVS: return BC_VS;
+ case OP65_JCC: return BC_CC;
+ case OP65_JCS: return BC_CS;
+ case OP65_JEQ: return BC_EQ;
+ case OP65_JMI: return BC_MI;
+ case OP65_JNE: return BC_NE;
+ case OP65_JPL: return BC_PL;
+ case OP65_JVC: return BC_VC;
+ case OP65_JVS: return BC_VS;
default:
Internal ("GetBranchCond: Invalid opcode: %d", OPC);
return 0;