/* R0 keeps Flash Sequence address 1 (u32FlashSeq1) */
/* R1 keeps Flash Sequence address 2 (u32FlashSeq2) */
/* R2 keeps Flash Offset address (ofs) */
- const uint8_t fm3_flash_erase_sector_code[] = {
+ static const uint8_t fm3_flash_erase_sector_code[] = {
/* *(uint16_t*)u32FlashSeq1 = 0xAA; */
0xAA, 0x24, /* MOVS R4, #0xAA */
0x04, 0x80, /* STRH R4, [R0, #0] */
/* RAMCODE used for fm3 Flash chip erase: */
/* R0 keeps Flash Sequence address 1 (u32FlashSeq1) */
/* R1 keeps Flash Sequence address 2 (u32FlashSeq2) */
- const uint8_t fm3_flash_erase_chip_code[] = {
+ static const uint8_t fm3_flash_erase_chip_code[] = {
/* *(uint16_t*)u32FlashSeq1 = 0xAA; */
0xAA, 0x22, /* MOVS R2, #0xAA */
0x02, 0x80, /* STRH R2, [R0, #0] */
#define ERASE_REGION(num, size) (((size/256) << 16) | (num-1))
/* non-CFI compatible flashes */
-static struct non_cfi non_cfi_flashes[] = {
+static const struct non_cfi non_cfi_flashes[] = {
{
.mfr = CFI_MFR_SST,
.id = 0xd4,
{
unsigned int mask;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct non_cfi *non_cfi = non_cfi_flashes;
+ const struct non_cfi *non_cfi = non_cfi_flashes;
if (cfi_info->x16_as_x8)
mask = 0xFF;
if (res != ERROR_OK)
return res;
- struct {
- uint32_t address, value;
+ static struct {
+ const uint32_t address;
+ uint32_t value;
} ficr[] = {
{ .address = NRF51_FICR_CODEPAGESIZE },
{ .address = NRF51_FICR_CODESIZE },