* in main.c. This file implements the simply blinky style version.\r
*\r
* NOTE 2: This file only contains the source code that is specific to the\r
- * full demo. Generic functions, such FreeRTOS hook functions, and functions\r
+ * basic demo. Generic functions, such FreeRTOS hook functions, and functions\r
* required to configure the hardware, are defined in main.c.\r
******************************************************************************\r
*\r
\r
/* main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.\r
main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0. */\r
-void main_blinky( void );\r
-void main_full( void );\r
+extern void main_blinky( void );\r
+extern void main_full( void );\r
\r
/*-----------------------------------------------------------*/\r
\r
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
- <TopLine>161</TopLine>
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+ <TopLine>96</TopLine>
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<bDave2>0</bDave2>
<PathWithFileName>.\main.c</PathWithFileName>
<FilenameWithoutPath>main.c</FilenameWithoutPath>
<PathWithFileName>.\RegTest.c</PathWithFileName>
<FilenameWithoutPath>RegTest.c</FilenameWithoutPath>
</File>
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+ <bDave2>0</bDave2>
+ <PathWithFileName>.\main_full.c</PathWithFileName>
+ <FilenameWithoutPath>main_full.c</FilenameWithoutPath>
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+ <tvExp>0</tvExp>
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+ <TopLine>180</TopLine>
+ <CurrentLine>180</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>.\main_blinky.c</PathWithFileName>
+ <FilenameWithoutPath>main_blinky.c</FilenameWithoutPath>
+ </File>
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<bDave2>0</bDave2>
<PathWithFileName>..\..\Source\tasks.c</PathWithFileName>
<FilenameWithoutPath>tasks.c</FilenameWithoutPath>
<Group>
<GroupName>Common_Demo_Source</GroupName>
- <tvExp>0</tvExp>
+ <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<File>
<Focus>0</Focus>
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<PathWithFileName>..\Common\Minimal\countsem.c</PathWithFileName>
<FilenameWithoutPath>countsem.c</FilenameWithoutPath>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
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<bDave2>0</bDave2>
<PathWithFileName>..\Common\Minimal\integer.c</PathWithFileName>
<FilenameWithoutPath>integer.c</FilenameWithoutPath>
<ActiveMDIGroup>0</ActiveMDIGroup>
<MDIGroup>
<Size>100</Size>
- <ActiveTab>0</ActiveTab>
+ <ActiveTab>3</ActiveTab>
<Documents>
<Doc>
<Name>.\main.c</Name>
<ColumnNumber>0</ColumnNumber>
- <TopLine>161</TopLine>
- <CurrentLine>174</CurrentLine>
+ <TopLine>96</TopLine>
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+ <Name>.\main_full.c</Name>
+ <ColumnNumber>0</ColumnNumber>
+ <TopLine>107</TopLine>
+ <CurrentLine>129</CurrentLine>
+ </Doc>
+ <Doc>
+ <Name>.\main_blinky.c</Name>
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+ <TopLine>180</TopLine>
+ <CurrentLine>180</CurrentLine>
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+ <Name>..\..\Source\queue.c</Name>
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+ <TopLine>430</TopLine>
+ <CurrentLine>438</CurrentLine>
</Doc>
</Documents>
</MDIGroup>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
- <Optim>0</Optim>
+ <Optim>1</Optim>
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<SplitLS>0</SplitLS>
<OneElfS>0</OneElfS>
<FileType>1</FileType>
<FilePath>.\RegTest.c</FilePath>
</File>
+ <File>
+ <FileName>main_full.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\main_full.c</FilePath>
+ </File>
+ <File>
+ <FileName>main_blinky.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>.\main_blinky.c</FilePath>
+ </File>
</Files>
</Group>
<Group>
-/**************************************************************************//**\r
- * @file system_XMC4500.h\r
- * @brief CMSIS Cortex-M4 Device Peripheral Access Layer Header File\r
- * for the Infineon XMC4500 Device Series\r
- * @version V2.1\r
- * @date 20. December 2011\r
+/******************************************************************************\r
+ * @file system_XMC4500.c\r
+ * @brief Device specific initialization for the XMC4500-Series according to CMSIS\r
+ * @version V2.2\r
+ * @date 20. January 2012\r
*\r
* @note\r
- * Copyright (C) 2011 ARM Limited. All rights reserved.\r
+ * Copyright (C) 2011 Infineon Technologies AG. All rights reserved.\r
+\r
*\r
* @par\r
- * ARM Limited (ARM) is supplying this software for use with Cortex-M \r
- * processor based microcontrollers. This file can be freely distributed \r
- * within development tools that are supporting such ARM based processors. \r
+ * Infineon Technologies AG (Infineon) is supplying this software for use with Infineon\92s microcontrollers. \r
+ * This file can be freely distributed within development tools that are supporting such microcontrollers. \r
+\r
*\r
* @par\r
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
- * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+ * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
*\r
+ *\r
******************************************************************************/\r
\r
#include "System_XMC4500.h"\r
/*----------------------------------------------------------------------------\r
Clock Variable definitions\r
*----------------------------------------------------------------------------*/\r
-uint32_t SystemCoreClock = CLOCK_OSC_HP;/*!< System Clock Frequency (Core Clock)*/\r
-\r
-\r
-/*----------------------------------------------------------------------------\r
- static functions declarations\r
- *----------------------------------------------------------------------------*/\r
-static int SystemClockSetup(void);\r
-static void USBClockSetup(void);\r
+/*!< System Clock Frequency (Core Clock)*/\r
+uint32_t SystemCoreClock = CLOCK_OSC_HP;\r
\r
/*----------------------------------------------------------------------------\r
Keil pragma to prevent warnings\r
*----------------------------------------------------------------------------*/\r
+#if defined(__ARMCC_VERSION)\r
#pragma diag_suppress 177\r
-\r
+#endif\r
\r
/*\r
//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------\r
// \r
*/\r
\r
-#define SCU_CLOCKOUT_SETUP 0\r
+#define SCU_CLOCKOUT_SETUP 0 // recommended to keep disabled\r
#define SCU_CLOCKOUT_SOURCE 0x00000000\r
#define SCU_CLOCKOUT_PIN 0x00000000\r
\r
+/*----------------------------------------------------------------------------\r
+ static functions declarations\r
+ *----------------------------------------------------------------------------*/\r
+#if (SCU_CLOCK_SETUP == 1)\r
+static int SystemClockSetup(void);\r
+#endif\r
\r
-\r
+#if (SCU_USB_CLOCK_SETUP == 1)\r
+static void USBClockSetup(void);\r
+#endif\r
\r
/**\r
* @brief Setup the microcontroller system.\r
void SystemInit(void)\r
{\r
/* Setup the WDT */\r
- #if WDT_SETUP\r
- WDT->CTR &= ~WDTENB_nVal; \r
- #endif\r
+#if (WDT_SETUP == 1)\r
+WDT->CTR &= ~WDTENB_nVal; \r
+#endif\r
\r
-/* enable coprocessor FPU */\r
- #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)\r
- SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */\r
- (3UL << 11*2) ); /* set CP11 Full Access */\r
- #endif\r
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)\r
+SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */\r
+ (3UL << 11*2) ); /* set CP11 Full Access */\r
+#endif\r
\r
/* Disable branch prediction - PCON.PBS = 1 */\r
- PREF->PCON |= (PREF_PCON_PBS_Msk << PREF_PCON_PBS_Pos);\r
+PREF->PCON |= (PREF_PCON_PBS_Msk);\r
+\r
+/* Enable unaligned memory access - SCB_CCR.UNALIGN_TRP = 0 */\r
+SCB->CCR &= ~(SCB_CCR_UNALIGN_TRP_Msk);\r
\r
/* Setup the clockout */\r
- #if SCU_CLOCKOUT_SETUP\r
- SCU_CLK->EXTCLKCR |= SCU_CLOCKOUT_SOURCE;\r
- if (SCU_CLOCKOUT_PIN) {\r
- PORT0->IOCR8 = 0x00000088; /*P0.8 --> ALT1 select + HWSEL */\r
- PORT0->HWSEL &= (~PORT0_HWSEL_HW8_Msk);\r
- }\r
- else PORT1->IOCR12 = 0x88000000; /*P1.15--> ALT1 select */\r
- #endif\r
+/* README README README README README README README README README README */\r
+/*\r
+ * Please use the CLOCKOUT feature with diligence. Use this only if you know\r
+ * what you are doing.\r
+ *\r
+ * You must be aware that the settings below can potentially be in conflict\r
+ * with DAVE code generation engine preferences.\r
+ *\r
+ * Even worse, the setting below configures the ports as output ports while in\r
+ * reality, the board on which this chip is mounted may have a source driving\r
+ * the ports.\r
+ *\r
+ * So use this feature only when you are absolutely sure that the port must \r
+ * indeed be configured as an output AND you are NOT linking this startup code\r
+ * with code that was generated by DAVE code engine.\r
+ */\r
+#if (SCU_CLOCKOUT_SETUP == 1)\r
+SCU_CLK->EXTCLKCR |= SCU_CLOCKOUT_SOURCE;\r
+\r
+if (SCU_CLOCKOUT_PIN) {\r
+ PORT0->IOCR8 = 0x00000088; /*P0.8 --> ALT1 select + HWSEL */\r
+ PORT0->HWSEL &= (~PORT0_HWSEL_HW8_Msk);\r
+ }\r
+else PORT1->IOCR12 = 0x88000000; /*P1.15--> ALT1 select */\r
+#endif\r
\r
/* Setup the System clock */ \r
- #if SCU_CLOCK_SETUP\r
- SystemClockSetup();\r
- #endif\r
-\r
-/*----------------------------------------------------------------------------\r
- Clock Variable definitions\r
- *----------------------------------------------------------------------------*/\r
- SystemCoreClock = SYSTEM_FREQUENCY;/*!< System Clock Frequency (Core Clock)*/\r
+#if (SCU_CLOCK_SETUP == 1)\r
+SystemClockSetup();\r
+#endif\r
\r
/* Setup the USB PL */ \r
- #if SCU_USB_CLOCK_SETUP\r
- USBClockSetup();\r
- #endif\r
+#if (SCU_USB_CLOCK_SETUP == 1)\r
+USBClockSetup();\r
+#endif\r
\r
}\r
\r
/*----------------------------------------------------------------------------\r
Clock Variable definitions\r
*----------------------------------------------------------------------------*/\r
- SystemCoreClock = SYSTEM_FREQUENCY;/*!< System Clock Frequency (Core Clock)*/\r
+SystemCoreClock = SYSTEM_FREQUENCY;/*!< System Clock Frequency (Core Clock)*/\r
\r
}\r
\r
* @param None\r
* @retval None\r
*/\r
+#if (SCU_CLOCK_SETUP == 1)\r
static int SystemClockSetup(void)\r
{\r
/* enable PLL first */\r
- SCU_PLL->PLLCON0 &= ~(SCU_PLL_PLLCON0_VCOPWD_Msk | SCU_PLL_PLLCON0_PLLPWD_Msk);\r
+ SCU_PLL->PLLCON0 &= ~(SCU_PLL_PLLCON0_VCOPWD_Msk | \r
+ SCU_PLL_PLLCON0_PLLPWD_Msk);\r
\r
/* Enable OSC_HP */\r
if (SCU_PLL_CLOCK_INPUT == SCU_CLOCK_CRYSTAL)\r
{\r
-\r
- SCU_OSC->OSCHPCTRL = (OSC_HP_MODE<<4); /*enable the OSC_HP*/\r
- /* setup OSC WDG devider */\r
+ /* Enable the OSC_HP*/\r
+ SCU_OSC->OSCHPCTRL = (OSC_HP_MODE<<4); \r
+ /* Setup OSC WDG devider */\r
SCU_OSC->OSCHPCTRL |= (OSCHPWDGDIV<<16); \r
- /* select external OSC as PLL input */\r
+ /* Select external OSC as PLL input */\r
SCU_PLL->PLLCON2 &= ~SCU_PLL_PLLCON2_PINSEL_Msk;\r
- /* restart OSC Watchdog */\r
+ /* Restart OSC Watchdog */\r
SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_OSCRES_Msk; \r
\r
do \r
{\r
- ; /* here a timeout need to be added */\r
- }while(!((SCU_PLL->PLLSTAT) & (SCU_PLL_PLLSTAT_PLLHV_Msk | SCU_PLL_PLLSTAT_PLLLV_Msk |SCU_PLL_PLLSTAT_PLLSP_Msk))); \r
+ ; /* here a timeout need to be added */\r
+ }while(!( (SCU_PLL->PLLSTAT) & \r
+ (SCU_PLL_PLLSTAT_PLLHV_Msk | SCU_PLL_PLLSTAT_PLLLV_Msk |\r
+ SCU_PLL_PLLSTAT_PLLSP_Msk)\r
+ )\r
+ ); \r
\r
}\r
\r
/* Setup Main PLL */\r
- /* select FOFI as system clock */\r
- if(SCU_CLK->SYSCLKCR != 0X000000)SCU_CLK->SYSCLKCR = 0x00000000; /*Select FOFI*/\r
- /* Go to bypass the Main PLL */\r
- SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_VCOBYP_Msk;\r
- /* disconnect OSC_HP to PLL */\r
- SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_FINDIS_Msk;\r
- /* Setup devider settings for main PLL */\r
- SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | (PLL_K2DIV_STEP_1<<16) | (PLL_PDIV<<24));\r
- /* we may have to set OSCDISCDIS */\r
- SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_OSCDISCDIS_Msk;\r
- /* connect OSC_HP to PLL */\r
- SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_FINDIS_Msk;\r
- /* restart PLL Lock detection */\r
- SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_RESLD_Msk;\r
- /* wait for PLL Lock */\r
- while (!(SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOLOCK_Msk));\r
- /* Go back to the Main PLL */\r
- SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_VCOBYP_Msk;\r
-\r
- /*********************************************************\r
- here we need to setup the system clock divider\r
- *********************************************************/\r
+ /* Select FOFI as system clock */\r
+ if(SCU_CLK->SYSCLKCR != 0X000000)\r
+ SCU_CLK->SYSCLKCR = 0x00000000; /*Select FOFI*/\r
+\r
+ /* Go to bypass the Main PLL */\r
+ SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_VCOBYP_Msk;\r
+\r
+ /* disconnect OSC_HP to PLL */\r
+ SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_FINDIS_Msk;\r
+\r
+ /* Setup devider settings for main PLL */\r
+ SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | \r
+ (PLL_K2DIV_STEP_1<<16) | (PLL_PDIV<<24));\r
+\r
+ /* we may have to set OSCDISCDIS */\r
+ SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_OSCDISCDIS_Msk;\r
+\r
+ /* connect OSC_HP to PLL */\r
+ SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_FINDIS_Msk;\r
+\r
+ /* restart PLL Lock detection */\r
+ SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_RESLD_Msk;\r
+\r
+ /* wait for PLL Lock */\r
+ while (!(SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOLOCK_Msk));\r
+\r
+ /* Go back to the Main PLL */\r
+ SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_VCOBYP_Msk;\r
+\r
+ /*********************************************************\r
+ here we need to setup the system clock divider\r
+ *********************************************************/\r
\r
SCU_CLK->CPUCLKCR = SCU_CPUCLKCR_DIV;\r
SCU_CLK->PBCLKCR = SCU_PBCLKCR_DIV; \r
SCU_CLK->CCUCLKCR = SCU_CCUCLKCR_DIV;\r
\r
- /* Switch system clock to PLL */\r
- SCU_CLK->SYSCLKCR |= 0x00010000; \r
+ /* Switch system clock to PLL */\r
+ SCU_CLK->SYSCLKCR |= 0x00010000; \r
\r
- /*********************************************************\r
- here the ramp up of the system clock starts\r
- *********************************************************/\r
- /* Delay for next K2 step ~50µs */\r
- /********************************/\r
- SysTick->LOAD = ((1250+100) & SysTick_LOAD_RELOAD_Msk) - 1;/* set reload register */\r
- SysTick->VAL = 0; /* Load the SysTick Counter Value */\r
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |\r
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */\r
-\r
- while (SysTick->VAL >= 100); /* wait for ~50µs */\r
- SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; /* Stop SysTick Timer */\r
- /********************************/\r
-\r
- /* Setup devider settings for main PLL */\r
- SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | (PLL_K2DIV_STEP_2<<16) | (PLL_PDIV<<24));\r
-\r
- /* Delay for next K2 step ~50µs */\r
- /********************************/\r
- SysTick->LOAD = ((3000+100) & SysTick_LOAD_RELOAD_Msk) - 1;\r
- SysTick->VAL = 0; /* Load the SysTick Counter Value */\r
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |\r
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */\r
-\r
- while (SysTick->VAL >= 100); /* wait for ~50µs */\r
- SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; /* Stop SysTick Timer */\r
- /********************************/\r
-\r
- /* Setup devider settings for main PLL */\r
- SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | (PLL_K2DIV_STEP_3<<16) | (PLL_PDIV<<24));\r
-\r
- /* Delay for next K2 step ~50µs */\r
- /********************************/\r
- SysTick->LOAD = ((4800+100) & SysTick_LOAD_RELOAD_Msk) - 1;\r
- SysTick->VAL = 0; /* Load the SysTick Counter Value */\r
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |\r
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */\r
-\r
- while (SysTick->VAL >= 100); /* wait for ~50µs */\r
- SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; /* Stop SysTick Timer */\r
- /********************************/\r
-\r
- /* Setup devider settings for main PLL */\r
- SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | (PLL_K2DIV<<16) | (PLL_PDIV<<24));\r
-\r
- SCU_TRAP->TRAPCLR = SCU_TRAP_TRAPCLR_SOSCWDGT_Msk | SCU_TRAP_TRAPCLR_SVCOLCKT_Msk; /* clear request for System OCS Watchdog Trap and System VCO Lock Trap */\r
-\r
- return(1);\r
+ /*********************************************************\r
+ here the ramp up of the system clock starts\r
+ *********************************************************/\r
+ /* Delay for next K2 step ~50µs */\r
+ /********************************/\r
+ /* Set reload register */\r
+ SysTick->LOAD = ((1250+100) & SysTick_LOAD_RELOAD_Msk) - 1;\r
+\r
+ /* Load the SysTick Counter Value */\r
+ SysTick->VAL = 0; \r
+\r
+ /* Enable SysTick IRQ and SysTick Timer */\r
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |\r
+ SysTick_CTRL_ENABLE_Msk; \r
+ \r
+ /* wait for ~50µs */\r
+ while (SysTick->VAL >= 100); \r
+\r
+ /* Stop SysTick Timer */\r
+ SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; \r
+ /********************************/\r
+\r
+ /* Setup devider settings for main PLL */\r
+ SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | \r
+ (PLL_K2DIV_STEP_2<<16) | (PLL_PDIV<<24));\r
+\r
+ /* Delay for next K2 step ~50µs */\r
+ /********************************/\r
+ SysTick->LOAD = ((3000+100) & SysTick_LOAD_RELOAD_Msk) - 1;\r
+\r
+ /* Load the SysTick Counter Value */\r
+ SysTick->VAL = 0;\r
+\r
+ /* Enable SysTick IRQ and SysTick Timer */\r
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;\r
+ \r
+ /* Wait for ~50µs */\r
+ while (SysTick->VAL >= 100); \r
+\r
+ /* Stop SysTick Timer */\r
+ SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; \r
+ /********************************/\r
+\r
+ /* Setup devider settings for main PLL */\r
+ SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | \r
+ (PLL_K2DIV_STEP_3<<16) | (PLL_PDIV<<24));\r
+\r
+ /* Delay for next K2 step ~50µs */\r
+ /********************************/\r
+ SysTick->LOAD = ((4800+100) & SysTick_LOAD_RELOAD_Msk) - 1;\r
+\r
+ /* Load the SysTick Counter Value */\r
+ SysTick->VAL = 0; \r
+\r
+ /* Enable SysTick IRQ and SysTick Timer */\r
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;\r
+ \r
+ /* Wait for ~50µs */\r
+ while (SysTick->VAL >= 100); \r
+\r
+ /* Stop SysTick Timer */\r
+ SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; \r
+ /********************************/\r
+\r
+ /* Setup devider settings for main PLL */\r
+ SCU_PLL->PLLCON1 = ((PLL_K1DIV) | (PLL_NDIV<<8) | (PLL_K2DIV<<16) | \r
+ (PLL_PDIV<<24));\r
+\r
+ /* clear request for System OCS Watchdog Trap and System VCO Lock Trap */\r
+ SCU_TRAP->TRAPCLR = SCU_TRAP_TRAPCLR_SOSCWDGT_Msk | \r
+ SCU_TRAP_TRAPCLR_SVCOLCKT_Msk; \r
+\r
+ return(1);\r
\r
}\r
+#endif\r
\r
/**\r
* @brief -\r
* @param None\r
* @retval None\r
*/\r
+#if(SCU_USB_CLOCK_SETUP == 1)\r
static void USBClockSetup(void)\r
{\r
/* enable PLL first */\r
- SCU_PLL->USBPLLCON &= ~(SCU_PLL_USBPLLCON_VCOPWD_Msk | SCU_PLL_USBPLLCON_PLLPWD_Msk);\r
+ SCU_PLL->USBPLLCON &= ~(SCU_PLL_USBPLLCON_VCOPWD_Msk | \r
+ SCU_PLL_USBPLLCON_PLLPWD_Msk);\r
\r
/* check and if not already running enable OSC_HP */\r
- if(!((SCU_PLL->PLLSTAT) & (SCU_PLL_PLLSTAT_PLLHV_Msk | SCU_PLL_PLLSTAT_PLLLV_Msk |SCU_PLL_PLLSTAT_PLLSP_Msk)))\r
+ if(!((SCU_PLL->PLLSTAT) & \r
+ (SCU_PLL_PLLSTAT_PLLHV_Msk | \r
+ SCU_PLL_PLLSTAT_PLLLV_Msk |SCU_PLL_PLLSTAT_PLLSP_Msk)))\r
{\r
if (SCU_PLL_CLOCK_INPUT == SCU_CLOCK_CRYSTAL)\r
{\r
\r
do \r
{\r
- ; /* here a timeout need to be added */\r
- }while(!((SCU_PLL->PLLSTAT) & (SCU_PLL_PLLSTAT_PLLHV_Msk | SCU_PLL_PLLSTAT_PLLLV_Msk |SCU_PLL_PLLSTAT_PLLSP_Msk))); \r
+ ; /* here a timeout need to be added */\r
+ }while(!((SCU_PLL->PLLSTAT) & (SCU_PLL_PLLSTAT_PLLHV_Msk | \r
+ SCU_PLL_PLLSTAT_PLLLV_Msk |SCU_PLL_PLLSTAT_PLLSP_Msk))); \r
\r
}\r
}\r
\r
\r
/* Setup USB PLL */\r
- /* Go to bypass the Main PLL */\r
- SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_VCOBYP_Msk;\r
- /* disconnect OSC_FI to PLL */\r
- SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_FINDIS_Msk;\r
- /* Setup devider settings for main PLL */\r
- SCU_PLL->USBPLLCON = ((USBPLL_NDIV<<8) | (USBPLL_PDIV<<24));\r
- /* we may have to set OSCDISCDIS */\r
- SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_OSCDISCDIS_Msk;\r
- /* connect OSC_FI to PLL */\r
- SCU_PLL->USBPLLCON &= ~SCU_PLL_USBPLLCON_FINDIS_Msk;\r
- /* restart PLL Lock detection */\r
- SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_RESLD_Msk;\r
- /* wait for PLL Lock */\r
- while (!(SCU_PLL->USBPLLSTAT & SCU_PLL_USBPLLSTAT_VCOLOCK_Msk));\r
- \r
-}\r
-\r
-\r
+ /* Go to bypass the Main PLL */\r
+ SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_VCOBYP_Msk;\r
+ /* disconnect OSC_FI to PLL */\r
+ SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_FINDIS_Msk;\r
+ /* Setup devider settings for main PLL */\r
+ SCU_PLL->USBPLLCON = ((USBPLL_NDIV<<8) | (USBPLL_PDIV<<24));\r
+ /* we may have to set OSCDISCDIS */\r
+ SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_OSCDISCDIS_Msk;\r
+ /* connect OSC_FI to PLL */\r
+ SCU_PLL->USBPLLCON &= ~SCU_PLL_USBPLLCON_FINDIS_Msk;\r
+ /* restart PLL Lock detection */\r
+ SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_RESLD_Msk;\r
+ /* wait for PLL Lock */\r
+ while (!(SCU_PLL->USBPLLSTAT & SCU_PLL_USBPLLSTAT_VCOLOCK_Msk));\r
+ }\r
+#endif\r
licensing and training services.\r
*/\r
\r
-/*\r
- * main() creates all the demo application tasks and a software timer, then \r
- * starts the scheduler. The web documentation provides more details of the \r
- * standard demo application tasks, which provide no particular functionality, \r
- * but do provide a good example of how to use the FreeRTOS API.\r
- *\r
- * In addition to the standard demo tasks, the following tasks and tests are\r
- * defined and/or created within this file:\r
+/******************************************************************************\r
+ * This project provides two demo applications. A simple blinky style project,\r
+ * and a more comprehensive test and demo application. The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting (defined in this file) is used to\r
+ * select between the two. The simply blinky demo is implemented and described\r
+ * in main_blinky.c. The more comprehensive test and demo application is\r
+ * implemented and described in main_full.c.\r
*\r
- * "Reg test" tasks - These fill both the core and floating point registers with\r
- * known values, then check that each register maintains its expected value for\r
- * the lifetime of the task. Each task uses a different set of values. The reg\r
- * test tasks execute with a very low priority, so get preempted very\r
- * frequently. A register containing an unexpected value is indicative of an\r
- * error in the context switching mechanism.\r
- *\r
- * "Check" timer - The check software timer period is initially set to three\r
- * seconds. The callback function associated with the check software timer\r
- * checks that all the standard demo tasks, and the register check tasks, are\r
- * not only still executing, but are executing without reporting any errors. If\r
- * the check software timer discovers that a task has either stalled, or\r
- * reported an error, then it changes its own execution period from the initial\r
- * three seconds, to just 200ms. The check software timer callback function\r
- * also toggles the single LED each time it is called. This provides a visual\r
- * indication of the system status: If the LED toggles every three seconds,\r
- * then no issues have been discovered. If the LED toggles every 200ms, then\r
- * an issue has been discovered with at least one task.\r
+ * This file implements the code that is not demo specific, including the\r
+ * hardware setup and FreeRTOS hook functions.\r
*\r
* \r
* Additional code:\r
/* Kernel includes. */\r
#include "FreeRTOS.h"\r
#include "task.h"\r
-#include "timers.h"\r
-#include "semphr.h"\r
-\r
-/* Standard demo application includes. */\r
-#include "flop.h"\r
-#include "integer.h"\r
-#include "PollQ.h"\r
-#include "semtest.h"\r
-#include "dynamic.h"\r
-#include "BlockQ.h"\r
-#include "blocktim.h"\r
-#include "countsem.h"\r
-#include "GenQTest.h"\r
-#include "recmutex.h"\r
-#include "death.h"\r
\r
/* Hardware includes. */\r
#include "XMC4500.h"\r
#include "System_XMC4500.h"\r
\r
-/* Priorities for the demo application tasks. */\r
-#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2UL )\r
-#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )\r
-#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )\r
-#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL )\r
-#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
-\r
-/* To toggle the single LED */\r
-#define mainTOGGLE_LED() ( PORT3->OMR = 0x02000200 )\r
-\r
-/* A block time of zero simply means "don't block". */\r
-#define mainDONT_BLOCK ( 0UL )\r
-\r
-/* The period after which the check timer will expire, in ms, provided no errors\r
-have been reported by any of the standard demo tasks. ms are converted to the\r
-equivalent in ticks using the portTICK_RATE_MS constant. */\r
-#define mainCHECK_TIMER_PERIOD_MS ( 3000UL / portTICK_RATE_MS )\r
-\r
-/* The period at which the check timer will expire, in ms, if an error has been\r
-reported in one of the standard demo tasks. ms are converted to the equivalent\r
-in ticks using the portTICK_RATE_MS constant. */\r
-#define mainERROR_CHECK_TIMER_PERIOD_MS ( 200UL / portTICK_RATE_MS )\r
+/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,\r
+or 0 to run the more comprehensive test and demo application. */\r
+#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 1\r
\r
/*-----------------------------------------------------------*/\r
\r
*/\r
static void prvSetupHardware( void );\r
\r
-/*\r
- * The check timer callback function, as described at the top of this file.\r
- */\r
-static void prvCheckTimerCallback( xTimerHandle xTimer );\r
-\r
-/*\r
- * Register check tasks, and the tasks used to write over and check the contents\r
- * of the FPU registers, as described at the top of this file. The nature of\r
- * these files necessitates that they are written in an assembly file.\r
+/* \r
+ * main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.\r
+ * main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0. \r
*/\r
-extern void vRegTest1Task( void *pvParameters );\r
-extern void vRegTest2Task( void *pvParameters );\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* The following two variables are used to communicate the status of the\r
-register check tasks to the check software timer. If the variables keep\r
-incrementing, then the register check tasks has not discovered any errors. If\r
-a variable stops incrementing, then an error has been found. */\r
-volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;\r
+extern void main_blinky( void );\r
+extern void main_full( void );\r
\r
/*-----------------------------------------------------------*/\r
\r
int main( void )\r
{\r
-xTimerHandle xCheckTimer = NULL;\r
-\r
- /* Configure the hardware ready to run the test. */\r
+ /* Prepare the hardware to run this demo. */\r
prvSetupHardware();\r
\r
- /* Start all the other standard demo/test tasks. The have not particular\r
- functionality, but do demonstrate how to use the FreeRTOS API and test the\r
- kernel port. */\r
- vStartIntegerMathTasks( tskIDLE_PRIORITY );\r
- vStartDynamicPriorityTasks();\r
- vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
- vCreateBlockTimeTasks();\r
- vStartCountingSemaphoreTasks();\r
- vStartGenericQueueTasks( tskIDLE_PRIORITY );\r
- vStartRecursiveMutexTasks();\r
- vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
- vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
- vStartMathTasks( mainFLOP_TASK_PRIORITY );\r
- \r
- /* Create the register check tasks, as described at the top of this\r
- file */\r
- xTaskCreate( vRegTest1Task, ( signed char * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, NULL );\r
- xTaskCreate( vRegTest2Task, ( signed char * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, NULL );\r
-\r
- /* Create the software timer that performs the 'check' functionality,\r
- as described at the top of this file. */\r
- xCheckTimer = xTimerCreate( ( const signed char * ) "CheckTimer",/* A text name, purely to help debugging. */\r
- ( mainCHECK_TIMER_PERIOD_MS ), /* The timer period, in this case 3000ms (3s). */\r
- pdTRUE, /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */\r
- ( void * ) 0, /* The ID is not used, so can be set to anything. */\r
- prvCheckTimerCallback /* The callback function that inspects the status of all the other tasks. */\r
- ); \r
- \r
- if( xCheckTimer != NULL )\r
- {\r
- xTimerStart( xCheckTimer, mainDONT_BLOCK );\r
- }\r
-\r
- /* The set of tasks created by the following function call have to be \r
- created last as they keep account of the number of tasks they expect to see \r
- running. */\r
- vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
-\r
- /* Start the scheduler. */\r
- vTaskStartScheduler();\r
- \r
- /* If all is well, the scheduler will now be running, and the following line\r
- will never be reached. If the following line does execute, then there was\r
- insufficient FreeRTOS heap memory available for the idle and/or timer tasks\r
- to be created. See the memory management section on the FreeRTOS web site\r
- for more details. */\r
- for( ;; ); \r
-}\r
-/*-----------------------------------------------------------*/\r
-\r
-static void prvCheckTimerCallback( xTimerHandle xTimer )\r
-{\r
-static long lChangedTimerPeriodAlready = pdFALSE;\r
-static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;\r
-unsigned long ulErrorFound = pdFALSE;\r
-\r
- /* Check all the demo tasks (other than the flash tasks) to ensure\r
- that they are all still running, and that none have detected an error. */\r
-\r
- if( xAreMathsTaskStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
+ /* The mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting is described at the top\r
+ of this file. */\r
+ #if mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1\r
{\r
- ulErrorFound = pdTRUE;\r
+ main_blinky();\r
}\r
-\r
- if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if ( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if( xIsCreateTaskStillRunning() != pdTRUE )\r
+ #else\r
{\r
- ulErrorFound = pdTRUE;\r
+ main_full();\r
}\r
+ #endif\r
\r
- if( xArePollingQueuesStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
-\r
- if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
- \r
- /* Check that the register test 1 task is still running. */\r
- if( ulLastRegTest1Value == ulRegTest1LoopCounter )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
- ulLastRegTest1Value = ulRegTest1LoopCounter;\r
-\r
- /* Check that the register test 2 task is still running. */\r
- if( ulLastRegTest2Value == ulRegTest2LoopCounter )\r
- {\r
- ulErrorFound = pdTRUE;\r
- }\r
- ulLastRegTest2Value = ulRegTest2LoopCounter;\r
-\r
- /* Toggle the check LED to give an indication of the system status. If\r
- the LED toggles every mainCHECK_TIMER_PERIOD_MS milliseconds then\r
- everything is ok. A faster toggle indicates an error. */\r
- mainTOGGLE_LED(); \r
- \r
- /* Have any errors been latch in ulErrorFound? If so, shorten the\r
- period of the check timer to mainERROR_CHECK_TIMER_PERIOD_MS milliseconds.\r
- This will result in an increase in the rate at which mainCHECK_LED\r
- toggles. */\r
- if( ulErrorFound != pdFALSE )\r
- {\r
- if( lChangedTimerPeriodAlready == pdFALSE )\r
- {\r
- lChangedTimerPeriodAlready = pdTRUE;\r
- \r
- /* This call to xTimerChangePeriod() uses a zero block time.\r
- Functions called from inside of a timer callback function must\r
- *never* attempt to block. */\r
- xTimerChangePeriod( xTimer, ( mainERROR_CHECK_TIMER_PERIOD_MS ), mainDONT_BLOCK );\r
- }\r
- }\r
+ return 0;\r
}\r
/*-----------------------------------------------------------*/\r
\r
--- /dev/null
+/*\r
+ FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/******************************************************************************\r
+ * NOTE 1: This project provides two demo applications. A simple blinky style\r
+ * project, and a more comprehensive test and demo application. The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
+ * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
+ * in main.c. This file implements the simply blinky style version.\r
+ *\r
+ * NOTE 2: This file only contains the source code that is specific to the\r
+ * basic demo. Generic functions, such FreeRTOS hook functions, and functions\r
+ * required to configure the hardware, are defined in main.c.\r
+ ******************************************************************************\r
+ *\r
+ * main_blinky() creates one queue, and two tasks. It then starts the\r
+ * scheduler.\r
+ *\r
+ * The Queue Send Task:\r
+ * The queue send task is implemented by the prvQueueSendTask() function in\r
+ * this file. prvQueueSendTask() sits in a loop that causes it to repeatedly\r
+ * block for 200 milliseconds, before sending the value 100 to the queue that\r
+ * was created within main_blinky(). Once the value is sent, the task loops\r
+ * back around to block for another 200 milliseconds.\r
+ *\r
+ * The Queue Receive Task:\r
+ * The queue receive task is implemented by the prvQueueReceiveTask() function\r
+ * in this file. prvQueueReceiveTask() sits in a loop where it repeatedly\r
+ * blocks on attempts to read data from the queue that was created within\r
+ * main_blinky(). When data is received, the task checks the value of the\r
+ * data, and if the value equals the expected 100, toggles the LED. The 'block\r
+ * time' parameter passed to the queue receive function specifies that the\r
+ * task should be held in the Blocked state indefinitely to wait for data to\r
+ * be available on the queue. The queue receive task will only leave the\r
+ * Blocked state when the queue send task writes to the queue. As the queue\r
+ * send task writes to the queue every 200 milliseconds, the queue receive\r
+ * task leaves the Blocked state every 200 milliseconds, and therefore toggles\r
+ * the LED every 200 milliseconds.\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "semphr.h"\r
+\r
+/* Hardware includes. */\r
+#include "XMC4500.h"\r
+#include "System_XMC4500.h"\r
+\r
+/* Priorities at which the tasks are created. */\r
+#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
+#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )\r
+\r
+/* The rate at which data is sent to the queue. The 200ms value is converted\r
+to ticks using the portTICK_RATE_MS constant. */\r
+#define mainQUEUE_SEND_FREQUENCY_MS ( 200 / portTICK_RATE_MS )\r
+\r
+/* The number of items the queue can hold. This is 1 as the receive task\r
+will remove items as they are added, meaning the send task should always find\r
+the queue empty. */\r
+#define mainQUEUE_LENGTH ( 1 )\r
+\r
+/* Values passed to the two tasks just to check the task parameter\r
+functionality. */\r
+#define mainQUEUE_SEND_PARAMETER ( 0x1111UL )\r
+#define mainQUEUE_RECEIVE_PARAMETER ( 0x22UL )\r
+\r
+/* To toggle the single LED */\r
+#define mainTOGGLE_LED() ( PORT3->OMR = 0x02000200 )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The tasks as described in the comments at the top of this file.\r
+ */\r
+static void prvQueueReceiveTask( void *pvParameters );\r
+static void prvQueueSendTask( void *pvParameters );\r
+\r
+/*\r
+ * Called by main() to create the simply blinky style application if\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.\r
+ */\r
+void main_blinky( void );\r
+\r
+/*\r
+ * The hardware only has a single LED. Simply toggle it.\r
+ */\r
+extern void vMainToggleLED( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The queue used by both tasks. */\r
+static xQueueHandle xQueue = NULL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void main_blinky( void )\r
+{\r
+ /* Create the queue. */\r
+ xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( unsigned long ) );\r
+\r
+ if( xQueue != NULL )\r
+ {\r
+ /* Start the two tasks as described in the comments at the top of this\r
+ file. */\r
+ xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */\r
+ ( signed char * ) "Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */\r
+ configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */\r
+ ( void * ) mainQUEUE_RECEIVE_PARAMETER, /* The parameter passed to the task - just to check the functionality. */\r
+ mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */\r
+ NULL ); /* The task handle is not required, so NULL is passed. */\r
+\r
+ xTaskCreate( prvQueueSendTask, ( signed char * ) "TX", configMINIMAL_STACK_SIZE, ( void * ) mainQUEUE_SEND_PARAMETER, mainQUEUE_SEND_TASK_PRIORITY, NULL );\r
+\r
+ /* Start the tasks and timer running. */\r
+ vTaskStartScheduler();\r
+ }\r
+\r
+ /* If all is well, the scheduler will now be running, and the following\r
+ line will never be reached. If the following line does execute, then\r
+ there was insufficient FreeRTOS heap memory available for the idle and/or\r
+ timer tasks to be created. See the memory management section on the\r
+ FreeRTOS web site for more details. */\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvQueueSendTask( void *pvParameters )\r
+{\r
+portTickType xNextWakeTime;\r
+const unsigned long ulValueToSend = 100UL;\r
+\r
+ /* Check the task parameter is as expected. */\r
+ configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_SEND_PARAMETER );\r
+\r
+ /* Initialise xNextWakeTime - this only needs to be done once. */\r
+ xNextWakeTime = xTaskGetTickCount();\r
+\r
+ for( ;; )\r
+ {\r
+ /* Place this task in the blocked state until it is time to run again.\r
+ The block time is specified in ticks, the constant used converts ticks\r
+ to ms. While in the Blocked state this task will not consume any CPU\r
+ time. */\r
+ vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );\r
+\r
+ /* Send to the queue - causing the queue receive task to unblock and\r
+ toggle the LED. 0 is used as the block time so the sending operation\r
+ will not block - it shouldn't need to block as the queue should always\r
+ be empty at this point in the code. */\r
+ xQueueSend( xQueue, &ulValueToSend, 0U );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvQueueReceiveTask( void *pvParameters )\r
+{\r
+unsigned long ulReceivedValue;\r
+\r
+ /* Check the task parameter is as expected. */\r
+ configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_RECEIVE_PARAMETER );\r
+\r
+ for( ;; )\r
+ {\r
+ /* Wait until something arrives in the queue - this task will block\r
+ indefinitely provided INCLUDE_vTaskSuspend is set to 1 in\r
+ FreeRTOSConfig.h. */\r
+ xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );\r
+\r
+ /* To get here something must have been received from the queue, but\r
+ is it the expected value? If it is, toggle the LED. */\r
+ if( ulReceivedValue == 100UL )\r
+ {\r
+ mainTOGGLE_LED();\r
+ ulReceivedValue = 0U;\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/******************************************************************************\r
+ * NOTE 1: This project provides two demo applications. A simple blinky style\r
+ * project, and a more comprehensive test and demo application. The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
+ * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
+ * in main.c. This file implements the comprehensive test and demo version.\r
+ *\r
+ * NOTE 2: This file only contains the source code that is specific to the\r
+ * full demo. Generic functions, such FreeRTOS hook functions, and functions\r
+ * required to configure the hardware, are defined in main.c.\r
+ ******************************************************************************\r
+ *\r
+ * main_full() creates all the demo application tasks and a software timer, then\r
+ * starts the scheduler. The web documentation provides more details of the \r
+ * standard demo application tasks, which provide no particular functionality, \r
+ * but do provide a good example of how to use the FreeRTOS API.\r
+ *\r
+ * In addition to the standard demo tasks, the following tasks and tests are\r
+ * defined and/or created within this file:\r
+ *\r
+ * "Reg test" tasks - These fill both the core and floating point registers with\r
+ * known values, then check that each register maintains its expected value for\r
+ * the lifetime of the task. Each task uses a different set of values. The reg\r
+ * test tasks execute with a very low priority, so get preempted very\r
+ * frequently. A register containing an unexpected value is indicative of an\r
+ * error in the context switching mechanism.\r
+ *\r
+ * "Check" timer - The check software timer period is initially set to three\r
+ * seconds. The callback function associated with the check software timer\r
+ * checks that all the standard demo tasks, and the register check tasks, are\r
+ * not only still executing, but are executing without reporting any errors. If\r
+ * the check software timer discovers that a task has either stalled, or\r
+ * reported an error, then it changes its own execution period from the initial\r
+ * three seconds, to just 200ms. The check software timer callback function\r
+ * also toggles the single LED each time it is called. This provides a visual\r
+ * indication of the system status: If the LED toggles every three seconds,\r
+ * then no issues have been discovered. If the LED toggles every 200ms, then\r
+ * an issue has been discovered with at least one task.\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "timers.h"\r
+#include "semphr.h"\r
+\r
+/* Standard demo application includes. */\r
+#include "flop.h"\r
+#include "integer.h"\r
+#include "PollQ.h"\r
+#include "semtest.h"\r
+#include "dynamic.h"\r
+#include "BlockQ.h"\r
+#include "blocktim.h"\r
+#include "countsem.h"\r
+#include "GenQTest.h"\r
+#include "recmutex.h"\r
+#include "death.h"\r
+\r
+/* Hardware includes. */\r
+#include "XMC4500.h"\r
+#include "System_XMC4500.h"\r
+\r
+/* Priorities for the demo application tasks. */\r
+#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2UL )\r
+#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )\r
+#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )\r
+#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL )\r
+#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
+\r
+/* To toggle the single LED */\r
+#define mainTOGGLE_LED() ( PORT3->OMR = 0x02000200 )\r
+\r
+/* A block time of zero simply means "don't block". */\r
+#define mainDONT_BLOCK ( 0UL )\r
+\r
+/* The period after which the check timer will expire, in ms, provided no errors\r
+have been reported by any of the standard demo tasks. ms are converted to the\r
+equivalent in ticks using the portTICK_RATE_MS constant. */\r
+#define mainCHECK_TIMER_PERIOD_MS ( 3000UL / portTICK_RATE_MS )\r
+\r
+/* The period at which the check timer will expire, in ms, if an error has been\r
+reported in one of the standard demo tasks. ms are converted to the equivalent\r
+in ticks using the portTICK_RATE_MS constant. */\r
+#define mainERROR_CHECK_TIMER_PERIOD_MS ( 200UL / portTICK_RATE_MS )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The check timer callback function, as described at the top of this file.\r
+ */\r
+static void prvCheckTimerCallback( xTimerHandle xTimer );\r
+\r
+/*\r
+ * Register check tasks, and the tasks used to write over and check the contents\r
+ * of the FPU registers, as described at the top of this file. The nature of\r
+ * these files necessitates that they are written in an assembly file.\r
+ */\r
+extern void vRegTest1Task( void *pvParameters );\r
+extern void vRegTest2Task( void *pvParameters );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The following two variables are used to communicate the status of the\r
+register check tasks to the check software timer. If the variables keep\r
+incrementing, then the register check tasks has not discovered any errors. If\r
+a variable stops incrementing, then an error has been found. */\r
+volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void main_full( void )\r
+{\r
+xTimerHandle xCheckTimer = NULL;\r
+\r
+ /* Start all the other standard demo/test tasks. The have not particular\r
+ functionality, but do demonstrate how to use the FreeRTOS API and test the\r
+ kernel port. */\r
+ vStartIntegerMathTasks( tskIDLE_PRIORITY );\r
+ vStartDynamicPriorityTasks();\r
+ vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+ vCreateBlockTimeTasks();\r
+ vStartCountingSemaphoreTasks();\r
+ vStartGenericQueueTasks( tskIDLE_PRIORITY );\r
+ vStartRecursiveMutexTasks();\r
+ vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
+ vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
+ vStartMathTasks( mainFLOP_TASK_PRIORITY );\r
+ \r
+ /* Create the register check tasks, as described at the top of this\r
+ file */\r
+ xTaskCreate( vRegTest1Task, ( signed char * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, NULL );\r
+ xTaskCreate( vRegTest2Task, ( signed char * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, NULL );\r
+\r
+ /* Create the software timer that performs the 'check' functionality,\r
+ as described at the top of this file. */\r
+ xCheckTimer = xTimerCreate( ( const signed char * ) "CheckTimer",/* A text name, purely to help debugging. */\r
+ ( mainCHECK_TIMER_PERIOD_MS ), /* The timer period, in this case 3000ms (3s). */\r
+ pdTRUE, /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */\r
+ ( void * ) 0, /* The ID is not used, so can be set to anything. */\r
+ prvCheckTimerCallback /* The callback function that inspects the status of all the other tasks. */\r
+ ); \r
+ \r
+ if( xCheckTimer != NULL )\r
+ {\r
+ xTimerStart( xCheckTimer, mainDONT_BLOCK );\r
+ }\r
+\r
+ /* The set of tasks created by the following function call have to be \r
+ created last as they keep account of the number of tasks they expect to see \r
+ running. */\r
+ vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
+\r
+ /* Start the scheduler. */\r
+ vTaskStartScheduler();\r
+ \r
+ /* If all is well, the scheduler will now be running, and the following line\r
+ will never be reached. If the following line does execute, then there was\r
+ insufficient FreeRTOS heap memory available for the idle and/or timer tasks\r
+ to be created. See the memory management section on the FreeRTOS web site\r
+ for more details. */\r
+ for( ;; ); \r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvCheckTimerCallback( xTimerHandle xTimer )\r
+{\r
+static long lChangedTimerPeriodAlready = pdFALSE;\r
+static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;\r
+unsigned long ulErrorFound = pdFALSE;\r
+\r
+ /* Check all the demo tasks (other than the flash tasks) to ensure\r
+ that they are all still running, and that none have detected an error. */\r
+\r
+ if( xAreMathsTaskStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if ( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xIsCreateTaskStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xArePollingQueuesStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+ \r
+ /* Check that the register test 1 task is still running. */\r
+ if( ulLastRegTest1Value == ulRegTest1LoopCounter )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+ ulLastRegTest1Value = ulRegTest1LoopCounter;\r
+\r
+ /* Check that the register test 2 task is still running. */\r
+ if( ulLastRegTest2Value == ulRegTest2LoopCounter )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+ ulLastRegTest2Value = ulRegTest2LoopCounter;\r
+\r
+ /* Toggle the check LED to give an indication of the system status. If\r
+ the LED toggles every mainCHECK_TIMER_PERIOD_MS milliseconds then\r
+ everything is ok. A faster toggle indicates an error. */\r
+ mainTOGGLE_LED(); \r
+ \r
+ /* Have any errors been latch in ulErrorFound? If so, shorten the\r
+ period of the check timer to mainERROR_CHECK_TIMER_PERIOD_MS milliseconds.\r
+ This will result in an increase in the rate at which mainCHECK_LED\r
+ toggles. */\r
+ if( ulErrorFound != pdFALSE )\r
+ {\r
+ if( lChangedTimerPeriodAlready == pdFALSE )\r
+ {\r
+ lChangedTimerPeriodAlready = pdTRUE;\r
+ \r
+ /* This call to xTimerChangePeriod() uses a zero block time.\r
+ Functions called from inside of a timer callback function must\r
+ *never* attempt to block. */\r
+ xTimerChangePeriod( xTimer, ( mainERROR_CHECK_TIMER_PERIOD_MS ), mainDONT_BLOCK );\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
; * @file startup_XMC4500.s\r
; * @brief CMSIS Cortex-M4 Core Device Startup File for\r
; * Infineon XMC4500 Device Series\r
-; * @version V1.02\r
-; * @date 6. December 2011\r
+; * @version V1.03\r
+; * @date 16. Jan. 2012\r
; *\r
; * @note\r
; * Copyright (C) 2009-2011 ARM Limited. All rights reserved.\r
;* ================== START OF VECTOR TABLE DEFINITION ====================== */
;* Vector Table - This gets programed into VTOR register */
AREA RESET, DATA, READONLY\r
- EXPORT __cs3_interrupt_vector_cortex_m\r
- EXPORT __cs3_interrupt_vector_cortex_m_End\r
- EXPORT __cs3_interrupt_vector_cortex_m_Size\r
+ EXPORT __Vectors\r
+ EXPORT __Vectors_End\r
+ EXPORT __Vectors_Size\r
\r
\r
-__cs3_interrupt_vector_cortex_m
+__Vectors
DCD __initial_sp ;* Top of Stack */
- DCD Reset_Handler ;* Reset Handler */
+ DCD Reset_Handler ;* Reset Handler */
DCD NMI_Handler ;* NMI Handler */
DCD HardFault_Handler ;* Hard Fault Handler */
DCD MemManage_Handler ;* MPU Fault Handler */
DCD ERU1_3_IRQHandler ;* Handler name for SR ERU1_3 */
DCD 0 ;* Not Available */
DCD 0 ;* Not Available */
- DCD 0 ;* Not Available */
+ DCD 0 ;* Not Available */
DCD PMU0_0_IRQHandler ;* Handler name for SR PMU0_0 */
- DCD 0 ;* Not Available */
+ DCD 0 ;* Not Available */
DCD VADC0_C0_0_IRQHandler ;* Handler name for SR VADC0_C0_0 */
DCD VADC0_C0_1_IRQHandler ;* Handler name for SR VADC0_C0_1 */
DCD VADC0_C0_2_IRQHandler ;* Handler name for SR VADC0_C0_1 */
DCD 0 ;* Not Available */
DCD GPDMA1_0_IRQHandler ;* Handler name for SR GPDMA1_0 */
DCD 0 ;* Not Available */
-__cs3_interrupt_vector_cortex_m_End\r
+__Vectors_End\r
\r
-__cs3_interrupt_vector_cortex_m_Size EQU __cs3_interrupt_vector_cortex_m_End - __cs3_interrupt_vector_cortex_m
+__Vectors_Size EQU __Vectors_End - __Vectors
;* ================== END OF VECTOR TABLE DEFINITION ======================= */
Reset_Handler PROC\r
EXPORT Reset_Handler [WEAK]\r
IMPORT SystemInit \r
- IMPORT __main\r
+ IMPORT __main\r
\r
- ;* Remap vector table
- LDR R0, =__cs3_interrupt_vector_cortex_m
- LDR R1, =0xE000ED08 ;*VTOR register\r
- STR R0,[R1]\r
+ ; Remap vector table
+ LDR R0, =__Vectors
+ LDR R1, =0xE000ED08 ;*VTOR register\r
+ STR R0,[R1]
+
+ ; switch off branch prediction required in A11 step to use cached memory
+ LDR R0,=0x58004000 ;PREF_PCON
+ LDR R1,[R0]
+ ORR R1,R1,#0x00010000
+ STR R1,[R0]\r
\r
- ;enable un-aligned memory access \r
- LDR R1, =0xE000ED14 \r
- LDR.W R0,[R1,#0x0]\r
- BIC R0,R0,#0x8\r
- STR.W R0,[R1,#0x0]\r
+ ; Clear existing parity errors if any required in A11 step
+ LDR R0,=0x50004150 ;SCU_GCU_PEFLAG
+ LDR R1,=0xFFFFFFFF
+ STR R1,[R0]
+
+ ; Disable parity required in A11 step
+ LDR R0,=0x5000413C ; SCU_GCU_PEEN
+ MOV R1,#0
+ STR R1,[R0]
+
+ ;enable un-aligned memory access \r
+ LDR R1, =0xE000ED14 \r
+ LDR.W R0,[R1,#0x0]\r
+ BIC R0,R0,#0x8\r
+ STR.W R0,[R1,#0x0]\r
\r
\r
- ;* C routines are likely to be called. Setup the stack now \r
- LDR SP,=__initial_sp\r
+ ;* C routines are likely to be called. Setup the stack now \r
+ LDR SP,=__initial_sp\r
\r
- LDR R0, = SystemInit
- BLX R0
-
+ LDR R0, = SystemInit
+ BLX R0
+
\r
- ;* Reset stack pointer before zipping off to user application
- LDR SP,=__initial_sp
- \r
- LDR R0, =__main
- BX R0\r
-\r
- ENDP\r
-\r
+ ;* Reset stack pointer before zipping off to user application
+ LDR SP,=__initial_sp\r
+ LDR R0, =__main
+ BX R0\r
+\r
+ ENDP\r
;* ========== START OF EXCEPTION HANDLER DEFINITION ======================== */
;* ============= START OF INTERRUPT HANDLER DEFINITION ====================== */
;* IRQ Handlers */
- EXPORT SCU_0_IRQHandler [WEAK]
- EXPORT ERU0_0_IRQHandler [WEAK]
- EXPORT ERU0_1_IRQHandler [WEAK]
- EXPORT ERU0_2_IRQHandler [WEAK]
- EXPORT ERU0_3_IRQHandler [WEAK]
- EXPORT ERU1_0_IRQHandler [WEAK]
- EXPORT ERU1_1_IRQHandler [WEAK]
- EXPORT ERU1_2_IRQHandler [WEAK]
- EXPORT ERU1_3_IRQHandler [WEAK]
- EXPORT PMU0_0_IRQHandler [WEAK]
- EXPORT VADC0_C0_0_IRQHandler [WEAK]
- EXPORT VADC0_C0_1_IRQHandler [WEAK]
- EXPORT VADC0_C0_2_IRQHandler [WEAK]
- EXPORT VADC0_C0_3_IRQHandler [WEAK]
- EXPORT VADC0_G0_0_IRQHandler [WEAK]
- EXPORT VADC0_G0_1_IRQHandler [WEAK]
- EXPORT VADC0_G0_2_IRQHandler [WEAK]
- EXPORT VADC0_G0_3_IRQHandler [WEAK]
- EXPORT VADC0_G1_0_IRQHandler [WEAK]
- EXPORT VADC0_G1_1_IRQHandler [WEAK]
- EXPORT VADC0_G1_2_IRQHandler [WEAK]
- EXPORT VADC0_G1_3_IRQHandler [WEAK]
- EXPORT VADC0_G2_0_IRQHandler [WEAK]
- EXPORT VADC0_G2_1_IRQHandler [WEAK]
- EXPORT VADC0_G2_2_IRQHandler [WEAK]
- EXPORT VADC0_G2_3_IRQHandler [WEAK]
- EXPORT VADC0_G3_0_IRQHandler [WEAK]
- EXPORT VADC0_G3_1_IRQHandler [WEAK]
- EXPORT VADC0_G3_2_IRQHandler [WEAK]
- EXPORT VADC0_G3_3_IRQHandler [WEAK]
- EXPORT DSD0_0_IRQHandler [WEAK]
- EXPORT DSD0_1_IRQHandler [WEAK]
- EXPORT DSD0_2_IRQHandler [WEAK]
- EXPORT DSD0_3_IRQHandler [WEAK]
- EXPORT DSD0_4_IRQHandler [WEAK]
- EXPORT DSD0_5_IRQHandler [WEAK]
- EXPORT DSD0_6_IRQHandler [WEAK]
- EXPORT DSD0_7_IRQHandler [WEAK]
- EXPORT DAC0_0_IRQHandler [WEAK]
- EXPORT DAC0_1_IRQHandler [WEAK]
- EXPORT CCU40_0_IRQHandler [WEAK]
- EXPORT CCU40_1_IRQHandler [WEAK]
- EXPORT CCU40_2_IRQHandler [WEAK]
- EXPORT CCU40_3_IRQHandler [WEAK]
- EXPORT CCU41_0_IRQHandler [WEAK]
- EXPORT CCU41_1_IRQHandler [WEAK]
- EXPORT CCU41_2_IRQHandler [WEAK]
- EXPORT CCU41_3_IRQHandler [WEAK]
- EXPORT CCU42_0_IRQHandler [WEAK]
- EXPORT CCU42_1_IRQHandler [WEAK]
- EXPORT CCU42_2_IRQHandler [WEAK]
- EXPORT CCU42_3_IRQHandler [WEAK]
- EXPORT CCU43_0_IRQHandler [WEAK]
- EXPORT CCU43_1_IRQHandler [WEAK]
- EXPORT CCU43_2_IRQHandler [WEAK]
- EXPORT CCU43_3_IRQHandler [WEAK]
- EXPORT CCU80_0_IRQHandler [WEAK]
- EXPORT CCU80_1_IRQHandler [WEAK]
- EXPORT CCU80_2_IRQHandler [WEAK]
- EXPORT CCU80_3_IRQHandler [WEAK]
- EXPORT CCU81_0_IRQHandler [WEAK]
- EXPORT CCU81_1_IRQHandler [WEAK]
- EXPORT CCU81_2_IRQHandler [WEAK]
- EXPORT CCU81_3_IRQHandler [WEAK]
- EXPORT POSIF0_0_IRQHandler [WEAK]
- EXPORT POSIF0_1_IRQHandler [WEAK]
- EXPORT POSIF1_0_IRQHandler [WEAK]
- EXPORT POSIF1_1_IRQHandler [WEAK]
- EXPORT CAN0_0_IRQHandler [WEAK]
- EXPORT CAN0_1_IRQHandler [WEAK]
- EXPORT CAN0_2_IRQHandler [WEAK]
- EXPORT CAN0_3_IRQHandler [WEAK]
- EXPORT CAN0_4_IRQHandler [WEAK]
- EXPORT CAN0_5_IRQHandler [WEAK]
- EXPORT CAN0_6_IRQHandler [WEAK]
- EXPORT CAN0_7_IRQHandler [WEAK]
- EXPORT USIC0_0_IRQHandler [WEAK]
- EXPORT USIC0_1_IRQHandler [WEAK]
- EXPORT USIC0_2_IRQHandler [WEAK]
- EXPORT USIC0_3_IRQHandler [WEAK]
- EXPORT USIC0_4_IRQHandler [WEAK]
- EXPORT USIC0_5_IRQHandler [WEAK]
- EXPORT USIC1_0_IRQHandler [WEAK]
- EXPORT USIC1_1_IRQHandler [WEAK]
- EXPORT USIC1_2_IRQHandler [WEAK]
- EXPORT USIC1_3_IRQHandler [WEAK]
- EXPORT USIC1_4_IRQHandler [WEAK]
- EXPORT USIC1_5_IRQHandler [WEAK]
- EXPORT USIC2_0_IRQHandler [WEAK]
- EXPORT USIC2_1_IRQHandler [WEAK]
- EXPORT USIC2_2_IRQHandler [WEAK]
- EXPORT USIC2_3_IRQHandler [WEAK]
- EXPORT USIC2_4_IRQHandler [WEAK]
- EXPORT USIC2_5_IRQHandler [WEAK]
- EXPORT LEDTS0_0_IRQHandler [WEAK]
- EXPORT FCE0_0_IRQHandler [WEAK]
- EXPORT GPDMA0_0_IRQHandler [WEAK]
- EXPORT SDMMC0_0_IRQHandler [WEAK]
- EXPORT USB0_0_IRQHandler [WEAK]
- EXPORT ETH0_0_IRQHandler [WEAK]
- EXPORT GPDMA1_0_IRQHandler [WEAK]\r
+ EXPORT SCU_0_IRQHandler [WEAK]
+ EXPORT ERU0_0_IRQHandler [WEAK]
+ EXPORT ERU0_1_IRQHandler [WEAK]
+ EXPORT ERU0_2_IRQHandler [WEAK]
+ EXPORT ERU0_3_IRQHandler [WEAK]
+ EXPORT ERU1_0_IRQHandler [WEAK]
+ EXPORT ERU1_1_IRQHandler [WEAK]
+ EXPORT ERU1_2_IRQHandler [WEAK]
+ EXPORT ERU1_3_IRQHandler [WEAK]
+ EXPORT PMU0_0_IRQHandler [WEAK]
+ EXPORT VADC0_C0_0_IRQHandler [WEAK]
+ EXPORT VADC0_C0_1_IRQHandler [WEAK]
+ EXPORT VADC0_C0_2_IRQHandler [WEAK]
+ EXPORT VADC0_C0_3_IRQHandler [WEAK]
+ EXPORT VADC0_G0_0_IRQHandler [WEAK]
+ EXPORT VADC0_G0_1_IRQHandler [WEAK]
+ EXPORT VADC0_G0_2_IRQHandler [WEAK]
+ EXPORT VADC0_G0_3_IRQHandler [WEAK]
+ EXPORT VADC0_G1_0_IRQHandler [WEAK]
+ EXPORT VADC0_G1_1_IRQHandler [WEAK]
+ EXPORT VADC0_G1_2_IRQHandler [WEAK]
+ EXPORT VADC0_G1_3_IRQHandler [WEAK]
+ EXPORT VADC0_G2_0_IRQHandler [WEAK]
+ EXPORT VADC0_G2_1_IRQHandler [WEAK]
+ EXPORT VADC0_G2_2_IRQHandler [WEAK]
+ EXPORT VADC0_G2_3_IRQHandler [WEAK]
+ EXPORT VADC0_G3_0_IRQHandler [WEAK]
+ EXPORT VADC0_G3_1_IRQHandler [WEAK]
+ EXPORT VADC0_G3_2_IRQHandler [WEAK]
+ EXPORT VADC0_G3_3_IRQHandler [WEAK]
+ EXPORT DSD0_0_IRQHandler [WEAK]
+ EXPORT DSD0_1_IRQHandler [WEAK]
+ EXPORT DSD0_2_IRQHandler [WEAK]
+ EXPORT DSD0_3_IRQHandler [WEAK]
+ EXPORT DSD0_4_IRQHandler [WEAK]
+ EXPORT DSD0_5_IRQHandler [WEAK]
+ EXPORT DSD0_6_IRQHandler [WEAK]
+ EXPORT DSD0_7_IRQHandler [WEAK]
+ EXPORT DAC0_0_IRQHandler [WEAK]
+ EXPORT DAC0_1_IRQHandler [WEAK]
+ EXPORT CCU40_0_IRQHandler [WEAK]
+ EXPORT CCU40_1_IRQHandler [WEAK]
+ EXPORT CCU40_2_IRQHandler [WEAK]
+ EXPORT CCU40_3_IRQHandler [WEAK]
+ EXPORT CCU41_0_IRQHandler [WEAK]
+ EXPORT CCU41_1_IRQHandler [WEAK]
+ EXPORT CCU41_2_IRQHandler [WEAK]
+ EXPORT CCU41_3_IRQHandler [WEAK]
+ EXPORT CCU42_0_IRQHandler [WEAK]
+ EXPORT CCU42_1_IRQHandler [WEAK]
+ EXPORT CCU42_2_IRQHandler [WEAK]
+ EXPORT CCU42_3_IRQHandler [WEAK]
+ EXPORT CCU43_0_IRQHandler [WEAK]
+ EXPORT CCU43_1_IRQHandler [WEAK]
+ EXPORT CCU43_2_IRQHandler [WEAK]
+ EXPORT CCU43_3_IRQHandler [WEAK]
+ EXPORT CCU80_0_IRQHandler [WEAK]
+ EXPORT CCU80_1_IRQHandler [WEAK]
+ EXPORT CCU80_2_IRQHandler [WEAK]
+ EXPORT CCU80_3_IRQHandler [WEAK]
+ EXPORT CCU81_0_IRQHandler [WEAK]
+ EXPORT CCU81_1_IRQHandler [WEAK]
+ EXPORT CCU81_2_IRQHandler [WEAK]
+ EXPORT CCU81_3_IRQHandler [WEAK]
+ EXPORT POSIF0_0_IRQHandler [WEAK]
+ EXPORT POSIF0_1_IRQHandler [WEAK]
+ EXPORT POSIF1_0_IRQHandler [WEAK]
+ EXPORT POSIF1_1_IRQHandler [WEAK]
+ EXPORT CAN0_0_IRQHandler [WEAK]
+ EXPORT CAN0_1_IRQHandler [WEAK]
+ EXPORT CAN0_2_IRQHandler [WEAK]
+ EXPORT CAN0_3_IRQHandler [WEAK]
+ EXPORT CAN0_4_IRQHandler [WEAK]
+ EXPORT CAN0_5_IRQHandler [WEAK]
+ EXPORT CAN0_6_IRQHandler [WEAK]
+ EXPORT CAN0_7_IRQHandler [WEAK]
+ EXPORT USIC0_0_IRQHandler [WEAK]
+ EXPORT USIC0_1_IRQHandler [WEAK]
+ EXPORT USIC0_2_IRQHandler [WEAK]
+ EXPORT USIC0_3_IRQHandler [WEAK]
+ EXPORT USIC0_4_IRQHandler [WEAK]
+ EXPORT USIC0_5_IRQHandler [WEAK]
+ EXPORT USIC1_0_IRQHandler [WEAK]
+ EXPORT USIC1_1_IRQHandler [WEAK]
+ EXPORT USIC1_2_IRQHandler [WEAK]
+ EXPORT USIC1_3_IRQHandler [WEAK]
+ EXPORT USIC1_4_IRQHandler [WEAK]
+ EXPORT USIC1_5_IRQHandler [WEAK]
+ EXPORT USIC2_0_IRQHandler [WEAK]
+ EXPORT USIC2_1_IRQHandler [WEAK]
+ EXPORT USIC2_2_IRQHandler [WEAK]
+ EXPORT USIC2_3_IRQHandler [WEAK]
+ EXPORT USIC2_4_IRQHandler [WEAK]
+ EXPORT USIC2_5_IRQHandler [WEAK]
+ EXPORT LEDTS0_0_IRQHandler [WEAK]
+ EXPORT FCE0_0_IRQHandler [WEAK]
+ EXPORT GPDMA0_0_IRQHandler [WEAK]
+ EXPORT SDMMC0_0_IRQHandler [WEAK]
+ EXPORT USB0_0_IRQHandler [WEAK]
+ EXPORT ETH0_0_IRQHandler [WEAK]
+ EXPORT GPDMA1_0_IRQHandler [WEAK]\r
\r
SCU_0_IRQHandler
;* ============= END OF INTERRUPT HANDLER DEFINITION ======================== */
;* Definition of the default weak SystemInit_DAVE3 function.
-;* This function will be called by the CMSIS SystemInit function.
-;* If DAVE3 requires an extended SystemInit it will create its own SystemInit_DAVE3
-;* which will overule this weak definition
+;* This function will be called by the CMSIS SystemInit function.
+;* If DAVE3 requires an extended SystemInit it will create its own SystemInit_DAVE3
+;* which will overule this weak definition
;*SystemInit_DAVE3
-;* NOP
-;* BX LR
+;* NOP
+;* BX LR
;*******************************************************************************\r
; User Stack and Heap initialization\r
projects / freertos / commitdiff