]> git.sur5r.net Git - openocd/commitdiff
arm: fix arm reg regression
authorSpencer Oliver <spen@spen-soft.co.uk>
Tue, 23 Apr 2013 11:15:07 +0000 (12:15 +0100)
committerFreddie Chopin <freddie.chopin@gmail.com>
Sun, 28 Apr 2013 07:35:41 +0000 (07:35 +0000)
Seems commit fc2abe63fd3cea7497da7be2955d333bd3f800b9 caused a regression
in that the arm reg cmd no longer worked. The issue was caused because we
changed the value of ARM_MODE_THREAD which was being checked in arm_init_arch_info.

Change-Id: Id571d4ab336d1b0e2b93363147af245d24b65ca5
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1362
Tested-by: jenkins
Reviewed-by: Luca Bruno <lucab@debian.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
src/target/arm11.c
src/target/arm7_9_common.c
src/target/xscale.c

index 26e8116f64ee400e141c7d0b96504bf6fe6ad13f..2e0fd2381129cd2ef510ae0589d414327e632fc9 100644 (file)
@@ -1094,6 +1094,7 @@ static int arm11_target_create(struct target *target, Jim_Interp *interp)
        if (!arm11)
                return ERROR_FAIL;
 
+       arm11->arm.core_type = ARM_MODE_ANY;
        arm_init_arch_info(target, &arm11->arm);
 
        arm11->jtag_info.tap = target->tap;
index faeed0d24de157cd07df3e282a037b6808d0f4ae..07beef51d4dd46d1c9405f501ae83be04e60e8fa 100644 (file)
@@ -2806,6 +2806,7 @@ int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9)
        arm7_9->dcc_downloads = false;
 
        arm->arch_info = arm7_9;
+       arm->core_type = ARM_MODE_ANY;
        arm->read_core_reg = arm7_9_read_core_reg;
        arm->write_core_reg = arm7_9_write_core_reg;
        arm->full_context = arm7_9_full_context;
index 5e9c598234234280d933cd75e224d21ef9cdcee0..3fe8f013c2efd336527a302efbc942d4d8139b12 100644 (file)
@@ -2997,6 +2997,7 @@ static int xscale_init_arch_info(struct target *target,
 
        /* prepare ARMv4/5 specific information */
        arm->arch_info = xscale;
+       arm->core_type = ARM_MODE_ANY;
        arm->read_core_reg = xscale_read_core_reg;
        arm->write_core_reg = xscale_write_core_reg;
        arm->full_context = xscale_full_context;