Get reg test tasks working correctly.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@247 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/main.c b/Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/main.c
index 0263442848cf161ac316fca21fc8aec0b96d9c74..c331c9df0f31e0978bab8923007450691b2e4d1a 100644 (file)
--- a/Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/main.c
+++ b/Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/main.c
@@ -66,7 +66,6 @@
  *\r
  */\r
 \r
-\r
 /* Scheduler includes. */\r
 #include "FreeRTOS.h"\r
 #include "task.h"\r
@@ -139,6 +138,9 @@ static void prvSetupHardware( void );
 discover an unexpected value. */\r
 static unsigned portBASE_TYPE xRegTestStatus = pdPASS;\r
 \r
+/* Counters used to ensure the regtest tasks are still running. */\r
+static unsigned portLONG ulRegTest1Counter = 0UL, ulRegTest2Counter = 0UL;\r
+\r
 /*-----------------------------------------------------------*/\r
 \r
 int main( void )\r
@@ -189,6 +191,7 @@ int main( void )
 static portSHORT prvCheckOtherTasksAreStillRunning( void )\r
 {\r
 portBASE_TYPE lReturn = pdPASS;\r
+static unsigned portLONG ulLastRegTest1Counter= 0UL, ulLastRegTest2Counter = 0UL;\r
 \r
        /* The demo tasks maintain a count that increments every cycle of the task\r
        provided that the task has never encountered an error.  This function \r
@@ -252,6 +255,25 @@ portBASE_TYPE lReturn = pdPASS;
                lReturn = pdFAIL;\r
        }\r
 \r
+       /* Are the register test tasks still looping? */\r
+       if( ulLastRegTest1Counter == ulRegTest1Counter )\r
+       {\r
+               lReturn = pdFAIL;\r
+       }\r
+       else\r
+       {\r
+               ulLastRegTest1Counter = ulRegTest1Counter;\r
+       }\r
+\r
+       if( ulLastRegTest2Counter == ulRegTest2Counter )\r
+       {\r
+               lReturn = pdFAIL;\r
+       }\r
+       else\r
+       {\r
+               ulLastRegTest2Counter = ulRegTest2Counter;\r
+       }\r
+\r
        return lReturn;\r
 }\r
 /*-----------------------------------------------------------*/\r
@@ -310,6 +332,24 @@ static void prvSetupHardware( void )
 }\r
 /*-----------------------------------------------------------*/\r
 \r
+static void prvRegTest1Pass( void )\r
+{\r
+       ulRegTest1Counter++;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvRegTest2Pass( void )\r
+{\r
+       ulRegTest2Counter++;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvRegTestFail( void )\r
+{\r
+       xRegTestStatus = pdFAIL;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
 static void prvRegTestTask1( void *pvParameters )\r
 {\r
        /* The first register test task as described at the top of this file.  The\r
@@ -321,20 +361,12 @@ static void prvRegTestTask1( void *pvParameters )
        (\r
                "RegTest1Start:                                 \n\t" \\r
                "                                                               \n\t" \\r
-               "       li              0, 101                          \n\t" \\r
-               "       mtspr   27, 0   #SSR1           \n\t" \\r
-               "       li              0, 201                          \n\t" \\r
-               "       mtspr   990, 0  #SSR2           \n\t" \\r
                "       li              0, 301                          \n\t" \\r
                "       mtspr   256, 0  #USPRG0         \n\t" \\r
-               "       li              0, 401                          \n\t" \\r
-               "       mtspr   9, 0    #CTR            \n\t" \\r
                "       li              0, 501                          \n\t" \\r
                "       mtspr   8, 0    #LR                     \n\t" \\r
-               "       li              0, 601                          \n\t" \\r
+               "       li              0, 4                            \n\t" \\r
                "       mtspr   1, 0    #XER            \n\t" \\r
-               "       li              0, 701                          \n\t" \\r
-               "       mtcr    0                                       \n\t" \\r
                "                                                               \n\t" \\r
                "       li              0, 1                            \n\t" \\r
                "       li              2, 2                            \n\t" \\r
@@ -372,97 +404,85 @@ static void prvRegTestTask1( void *pvParameters )
                "       nop                                                     \n\t" \\r
                "                                                               \n\t" \\r
                "       cmpwi   0, 1                            \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   2, 2                            \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   3, 3                            \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   4, 4                            \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   5, 5                            \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   6, 6                            \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   7, 7                            \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   8, 8                            \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   9, 9                            \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   10, 10                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   11, 11                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   12, 12                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   13, 13                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   14, 14                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   15, 15                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   16, 16                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   17, 17                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   18, 18                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   19, 19                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   20, 20                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   21, 21                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   22, 22                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   23, 23                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   24, 24                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   25, 25                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   26, 26                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   27, 27                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   28, 28                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   29, 29                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   30, 30                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       cmpwi   31, 31                          \n\t" \\r
-               "       bne             RegTest1Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "                                                               \n\t" \\r
-               "       mfspr   0, 27   #SSR1           \n\t" \\r
-               "       cmpwi   0, 101                          \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
-               "       mfspr   0, 990  #SSR2           \n\t" \\r
-               "       cmpwi   0, 201                          \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
                "       mfspr   0, 256  #USPRG0         \n\t" \\r
                "       cmpwi   0, 301                          \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
-               "       mfspr   0, 9    #CTR            \n\t" \\r
-               "       cmpwi   0, 401                          \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       mfspr   0, 8    #LR                     \n\t" \\r
                "       cmpwi   0, 501                          \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "       mfspr   0, 1    #XER            \n\t" \\r
-               "       cmpwi   0, 601                          \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
-               "       mfcr    0                                       \n\t" \\r
-               "       cmpwi   0, 701                          \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       cmpwi   0, 4                            \n\t" \\r
+               "       bne     RegTest1Fail                    \n\t" \\r
                "                                                               \n\t" \\r
+               "       bl prvRegTest1Pass                      \n\t" \\r
                "       b RegTest1Start                         \n\t" \\r
                "                                                               \n\t" \\r
                "RegTest1Fail:                                  \n\t" \\r
                "                                                               \n\t" \\r
-               "       xor             0, 0, 0                         \n\t" \\r
-               "       stw             0, xRegTestStatus( 0 ) \n\t" \\r
                "                                                               \n\t" \\r
+               "       bl prvRegTestFail                       \n\t" \\r
                "       b RegTest1Start                         \n\t" \\r
        );\r
 }\r
@@ -477,20 +497,12 @@ static void prvRegTestTask2( void *pvParameters )
        (\r
                "RegTest2Start:                                 \n\t" \\r
                "                                                               \n\t" \\r
-               "       li              0, 100                          \n\t" \\r
-               "       mtspr   27, 0   #SSR1           \n\t" \\r
-               "       li              0, 200                          \n\t" \\r
-               "       mtspr   990, 0  #SSR2           \n\t" \\r
                "       li              0, 300                          \n\t" \\r
                "       mtspr   256, 0  #USPRG0         \n\t" \\r
-               "       li              0, 400                          \n\t" \\r
-               "       mtspr   9, 0    #CTR            \n\t" \\r
                "       li              0, 500                          \n\t" \\r
                "       mtspr   8, 0    #LR                     \n\t" \\r
-               "       li              0, 600                          \n\t" \\r
+               "       li              0, 4                            \n\t" \\r
                "       mtspr   1, 0    #XER            \n\t" \\r
-               "       li              0, 700                          \n\t" \\r
-               "       mtcr    0                                       \n\t" \\r
                "                                                               \n\t" \\r
                "       li              0, 11                           \n\t" \\r
                "       li              2, 12                           \n\t" \\r
@@ -525,97 +537,85 @@ static void prvRegTestTask2( void *pvParameters )
                "       li              31,     131                             \n\t" \\r
                "                                                               \n\t" \\r
                "       cmpwi   0, 11                           \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   2, 12                           \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   3, 13                           \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   4, 14                           \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   5, 15                           \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   6, 16                           \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   7, 17                           \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   8, 18                           \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   9, 19                           \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   10, 110                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   11, 111                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   12, 112                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   13, 113                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   14, 114                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   15, 115                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   16, 116                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   17, 117                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   18, 118                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   19, 119                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   20, 120                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   21, 121                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   22, 122                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   23, 123                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   24, 124                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   25, 125                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   26, 126                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   27, 127                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   28, 128                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   29, 129                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   30, 130                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       cmpwi   31, 131                         \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "                                                               \n\t" \\r
-               "       mfspr   0, 27   #SSR1           \n\t" \\r
-               "       cmpwi   0, 100                          \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
-               "       mfspr   0, 990  #SSR2           \n\t" \\r
-               "       cmpwi   0, 200                          \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
                "       mfspr   0, 256  #USPRG0         \n\t" \\r
                "       cmpwi   0, 300                          \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
-               "       mfspr   0, 9    #CTR            \n\t" \\r
-               "       cmpwi   0, 400                          \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       mfspr   0, 8    #LR                     \n\t" \\r
                "       cmpwi   0, 500                          \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "       mfspr   0, 1    #XER            \n\t" \\r
-               "       cmpwi   0, 600                          \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
-               "       mfcr    0                                       \n\t" \\r
-               "       cmpwi   0, 700                          \n\t" \\r
-               "       bne             RegTest2Fail            \n\t" \\r
+               "       cmpwi   0, 4                            \n\t" \\r
+               "       bne     RegTest2Fail                    \n\t" \\r
                "                                                               \n\t" \\r
+               "       bl prvRegTest2Pass                      \n\t" \\r
                "       b RegTest2Start                         \n\t" \\r
                "                                                               \n\t" \\r
                "RegTest2Fail:                                  \n\t" \\r
                "                                                               \n\t" \\r
-               "       xor             0, 0, 0                         \n\t" \\r
-               "       stw             0, xRegTestStatus( 0 ) \n\t" \\r
                "                                                               \n\t" \\r
+               "       bl prvRegTestFail                       \n\t" \\r
                "       b RegTest2Start                         \n\t" \\r
        );\r
 }\r
@@ -627,6 +627,14 @@ handle needs to be used to determine the offending task. */
 void vApplicationStackOverflowHook( xTaskHandle xTask, signed portCHAR *pcTaskName );\r
 void vApplicationStackOverflowHook( xTaskHandle xTask, signed portCHAR *pcTaskName )\r
 {\r
+       /* The following three calls are simply to stop compiler warnings about the\r
+       functions not being used - they are called from the inline assembly. */\r
+       prvRegTest1Pass();\r
+       prvRegTest2Pass();\r
+       prvRegTestFail();\r
+\r
        for( ;; );\r
 }\r
 \r
+\r
+\r

diff --git a/Demo/PPC405_Xilinx_Virtex4_GCC/__xps/rtosdemo_compiler.opt b/Demo/PPC405_Xilinx_Virtex4_GCC/__xps/rtosdemo_compiler.opt
index 0060ac77d1ea2be791790d758ffcb8f47fad2289..42e94113dad5dbb2d6ebed4cdc31d11e6bb17849 100644 (file)
--- a/Demo/PPC405_Xilinx_Virtex4_GCC/__xps/rtosdemo_compiler.opt
+++ b/Demo/PPC405_Xilinx_Virtex4_GCC/__xps/rtosdemo_compiler.opt
@@ -1,5 +1,5 @@
 ppc405_0\r
-RTOSDEMO_SOURCES = RTOSDemo/main.c RTOSDemo/serial/serial.c RTOSDemo/partest/partest.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/GCC/PPC405_Xilinx/port.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/tasks.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/list.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/queue.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/MemMang/heap_2.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/GCC/PPC405_Xilinx/portasm.s C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/flash.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/blocktim.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/dynamic.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/flop.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/GenQTest.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/integer.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/QPeek.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/semtest.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/BlockQ.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/death.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/comtest.c \r
+RTOSDEMO_SOURCES = RTOSDemo/main.c RTOSDemo/serial/serial.c RTOSDemo/partest/partest.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/GCC/PPC405_Xilinx/port.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/tasks.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/list.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/queue.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/MemMang/heap_2.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/flash.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/blocktim.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/dynamic.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/flop.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/GenQTest.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/integer.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/QPeek.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/semtest.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/BlockQ.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/death.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/comtest.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/GCC/PPC405_Xilinx/portasm.S \r
 RTOSDEMO_HEADERS = RTOSDemo/FreeRTOSConfig.h \r
 RTOSDEMO_CC = powerpc-eabi-gcc\r
 RTOSDEMO_CC_SIZE = powerpc-eabi-size\r

diff --git a/Demo/PPC405_Xilinx_Virtex4_GCC/__xps/system.gui b/Demo/PPC405_Xilinx_Virtex4_GCC/__xps/system.gui
index 722bf15dd832253b49327321a23d60dd2c835d3e..5165ee1ef2daebcd9b8d16b37ce25e2484bdab5b 100644 (file)
--- a/Demo/PPC405_Xilinx_Virtex4_GCC/__xps/system.gui
+++ b/Demo/PPC405_Xilinx_Virtex4_GCC/__xps/system.gui
@@ -1 +1 @@
-guiSettings=FILTER=0;BUS_FLAT_VIEW=false;BUS_TREE_VIEW_HEADER=Name,Net,Direction,Range,Class,Sensitivity,Description,Frequency,Reset Polarity,IP Type,IP Version,IP Classification,Bus Connection,Mastership,Bus Standard,Address,Base Address,High Address,Size,Lock,ICache,DCache;BUS_TREE_VIEW_HEADER_MAP=0,15,16,17,18,19,20,21,12,13,14,1,2,4,5,3,7,8,9,10,11,6;BUS_TREE_VIEW_HIDDEN_SECTION=15,16,17,18,19,20,21,13,14,1,2,4,5,3,7,8,11,6;BUS_EXPANDED_NODE=;BUS_TREE_VERTICAL_SCROLL=0;BUS_TREE_HORIZONTAL_SCROLL=0;\r
+guiSettings=FILTER=0;BUS_FLAT_VIEW=false;BUS_TREE_VIEW_HEADER=Name,Net,Direction,Range,Class,Sensitivity,Description,Frequency,Reset Polarity,IP Type,IP Version,IP Classification,Bus Connection,Mastership,Bus Standard,Address,Base Address,High Address,Size,Lock,ICache,DCache;BUS_TREE_VIEW_HEADER_MAP=0,15,16,17,18,19,20,21,12,13,14,1,2,4,5,3,7,8,9,10,11,6;BUS_TREE_VIEW_HIDDEN_SECTION=15,16,17,18,19,20,21,13,14,1,2,4,5,3,7,8,11,6;BUS_EXPANDED_NODE=RS232_Uart;BUS_TREE_VERTICAL_SCROLL=0;BUS_TREE_HORIZONTAL_SCROLL=0;\r

diff --git a/Demo/PPC405_Xilinx_Virtex4_GCC/system.xmp b/Demo/PPC405_Xilinx_Virtex4_GCC/system.xmp
index 19ed0b94ece4832ed0207e5b6182e2b2e0034c42..da90991780643cbd6ae954476c12da5bdf9c541e 100644 (file)
--- a/Demo/PPC405_Xilinx_Virtex4_GCC/system.xmp
+++ b/Demo/PPC405_Xilinx_Virtex4_GCC/system.xmp
@@ -45,7 +45,6 @@ Source: C:/E/Dev/FreeRTOS/WorkingCopy2/Source/tasks.c
 Source: C:/E/Dev/FreeRTOS/WorkingCopy2/Source/list.c\r
 Source: C:/E/Dev/FreeRTOS/WorkingCopy2/Source/queue.c\r
 Source: C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/MemMang/heap_2.c\r
-Source: C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/GCC/PPC405_Xilinx/portasm.s\r
 Source: C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/flash.c\r
 Source: C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/blocktim.c\r
 Source: C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/dynamic.c\r
@@ -57,6 +56,7 @@ Source: C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/semtest.c
 Source: C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/BlockQ.c\r
 Source: C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/death.c\r
 Source: C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/comtest.c\r
+Source: C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/GCC/PPC405_Xilinx/portasm.S\r
 Header: RTOSDemo/FreeRTOSConfig.h\r
 DefaultInit: EXECUTABLE\r
 InitBram: 0\r

diff --git a/Demo/PPC405_Xilinx_Virtex4_GCC/system_incl.make b/Demo/PPC405_Xilinx_Virtex4_GCC/system_incl.make
index 078a3d30df26685a56229e38ca5daf28df284928..dd7adf630171a9bee96e44f6f4202079fc7d67c2 100644 (file)
--- a/Demo/PPC405_Xilinx_Virtex4_GCC/system_incl.make
+++ b/Demo/PPC405_Xilinx_Virtex4_GCC/system_incl.make
@@ -109,7 +109,7 @@ FPGA_IMP_DEPENDENCY = $(BMM_FILE) $(POSTSYN_NETLIST) $(UCF_FILE) $(BITGEN_UT_FIL
 # SOFTWARE APPLICATION RTOSDEMO\r
 #################################################################\r
 \r
-RTOSDEMO_SOURCES = RTOSDemo/main.c RTOSDemo/serial/serial.c RTOSDemo/partest/partest.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/GCC/PPC405_Xilinx/port.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/tasks.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/list.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/queue.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/MemMang/heap_2.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/GCC/PPC405_Xilinx/portasm.s C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/flash.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/blocktim.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/dynamic.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/flop.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/GenQTest.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/integer.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/QPeek.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/semtest.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/BlockQ.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/death.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/comtest.c \r
+RTOSDEMO_SOURCES = RTOSDemo/main.c RTOSDemo/serial/serial.c RTOSDemo/partest/partest.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/GCC/PPC405_Xilinx/port.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/tasks.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/list.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/queue.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/MemMang/heap_2.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/flash.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/blocktim.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/dynamic.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/flop.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/GenQTest.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/integer.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/QPeek.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/semtest.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/BlockQ.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/death.c C:/E/Dev/FreeRTOS/WorkingCopy2/Demo/Common/Minimal/comtest.c C:/E/Dev/FreeRTOS/WorkingCopy2/Source/portable/GCC/PPC405_Xilinx/portasm.S \r
 \r
 RTOSDEMO_HEADERS = RTOSDemo/FreeRTOSConfig.h \r
 \r