]> git.sur5r.net Git - openocd/commitdiff
moves handling of problems with resetting into the halted state
authoroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Tue, 5 Aug 2008 06:18:26 +0000 (06:18 +0000)
committeroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Tue, 5 Aug 2008 06:18:26 +0000 (06:18 +0000)
into the target implementation.

Also target_process_reset() is now simpler and has error handling,
e.g. if assert reset fails, then target_process_reset() will propagate
that error.

cmd_ctx was passed in to examine(), which is wrong - removed that.

git-svn-id: svn://svn.berlios.de/openocd/trunk@887 b42882b7-edfa-0310-969c-e2dbd0fdcd60

12 files changed:
src/target/arm11.c
src/target/arm11.h
src/target/arm7_9_common.c
src/target/arm7tdmi.c
src/target/arm7tdmi.h
src/target/arm9tdmi.c
src/target/arm9tdmi.h
src/target/cortex_m3.c
src/target/feroceon.c
src/target/mips_m4k.c
src/target/target.c
src/target/target.h

index da779b08e069f61abbdd7cf3bfe02d1b065668b6..11f6d9cc4c8ada922d608b1dcfda553c3ec735e9 100644 (file)
@@ -1378,7 +1378,7 @@ int arm11_init_target(struct command_context_s *cmd_ctx, struct target_s *target
 }
 
 /* talk to the target and set things up */
-int arm11_examine(struct command_context_s *cmd_ctx, struct target_s *target)
+int arm11_examine(struct target_s *target)
 {
     FNC_INFO;
 
index 8b05b2e1c9688577b2b5a638235ae49ed3ee2fa5..ccc9c09fc2222423eccd41b386707f7b2a229366 100644 (file)
@@ -188,7 +188,7 @@ int arm11_target_request_data(struct target_s *target, u32 size, u8 *buffer);
 int arm11_halt(struct target_s *target);
 int arm11_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
 int arm11_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
-int arm11_examine(struct command_context_s *cmd_ctx, struct target_s *target);
+int arm11_examine(struct target_s *target);
 
 /* target reset control */
 int arm11_assert_reset(struct target_s *target);
index 0531cad6cdd7eb7e6cf9a9410316d2363cace709..117e9cb1d772364b9d655dc4715da9bd7980c89a 100644 (file)
@@ -821,12 +821,26 @@ int arm7_9_assert_reset(target_t *target)
 
 int arm7_9_deassert_reset(target_t *target)
 {
+       int retval=ERROR_OK;
        LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
 
        /* deassert reset lines */
        jtag_add_reset(0, 0);
 
-       return ERROR_OK;
+       if ((jtag_reset_config & RESET_SRST_PULLS_TRST)!=0)
+       {
+               /* set up embedded ice registers again */
+               if ((retval=target->type->examine(target))!=ERROR_OK)
+                       return retval;
+               
+               if (target->reset_halt)
+               {
+                       /* halt the CPU as embedded ice was not set up in reset */
+                       if ((retval=target->type->halt(target))!=ERROR_OK)
+                               return retval;
+               }
+       }
+       return retval;
 }
 
 int arm7_9_clear_halt(target_t *target)
@@ -961,6 +975,12 @@ int arm7_9_soft_reset_halt(struct target_s *target)
 
 int arm7_9_halt(target_t *target)
 {
+       if ((target->state==TARGET_RESET)&&((jtag_reset_config & RESET_SRST_PULLS_TRST)!=0))
+       {
+               LOG_WARNING("arm7/9 can't halt a target in reset if srst pulls trst - halting after reset");
+               return ERROR_OK;
+       }
+
        armv4_5_common_t *armv4_5 = target->arch_info;
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
        reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
index ff398887d640a418e895d3c51bf3b2a1f739a49d..41771ab183e2b3a050b373d180237a949c81c000 100644 (file)
@@ -708,7 +708,7 @@ void arm7tdmi_build_reg_cache(target_t *target)
        armv4_5->core_cache = (*cache_p);
 }
 
-int arm7tdmi_examine(struct command_context_s *cmd_ctx, struct target_s *target)
+int arm7tdmi_examine(struct target_s *target)
 {
        int retval;
        armv4_5_common_t *armv4_5 = target->arch_info;
index 95b79385a94ed8ef5a46a3e2d1259ad426b313e4..a9b41da2ffa2c520c66ae79ac9dccfbcf49e33e9 100644 (file)
@@ -40,7 +40,7 @@ typedef struct arm7tdmi_common_s
 int arm7tdmi_register_commands(struct command_context_s *cmd_ctx);
 int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, int chain_pos, char *variant);
 int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int arm7tdmi_examine(struct command_context_s *cmd_ctx, struct target_s *target);
+int arm7tdmi_examine(struct target_s *target);
 
 
 #endif /* ARM7TDMI_H */
index a4d18dd57b58d7ddbe1ec31474a789dfad6050ba..adb21f79b464e8c2605bca6b74e422402727d594 100644 (file)
@@ -850,7 +850,7 @@ void arm9tdmi_build_reg_cache(target_t *target)
 }
 
 
-int arm9tdmi_examine(struct command_context_s *cmd_ctx, struct target_s *target)
+int arm9tdmi_examine(struct target_s *target)
 {
        /* get pointers to arch-specific information */
        int retval;
index 9656792530c6e486d8de6c16219e8db83d2a32e4..249a9287425f5e474f7ac1c9f6f0e15cc6815fb3 100644 (file)
@@ -56,7 +56,7 @@ enum arm9tdmi_vector
 };
 
 extern int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int arm9tdmi_examine(struct command_context_s *cmd_ctx, struct target_s *target);
+int arm9tdmi_examine(struct target_s *target);
 extern int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, int chain_pos, char *variant);
 extern int arm9tdmi_register_commands(struct command_context_s *cmd_ctx);
 
index e3ed4cfbb81dcbaf0875246844241b99b6364b41..e305c01899e17076a9684ad65dd2c128d2a70ec7 100644 (file)
@@ -51,7 +51,7 @@ int cortex_m3_quit();
 int cortex_m3_load_core_reg_u32(target_t *target, enum armv7m_regtype type, u32 num, u32 *value);
 int cortex_m3_store_core_reg_u32(target_t *target, enum armv7m_regtype type, u32 num, u32 value);
 int cortex_m3_target_request_data(target_t *target, u32 size, u8 *buffer);
-int cortex_m3_examine(struct command_context_s *cmd_ctx, struct target_s *target);
+int cortex_m3_examine(struct target_s *target);
 
 #ifdef ARMV7_GDB_HACKS
 extern u8 armv7m_gdb_dummy_cpsr_value[];
@@ -1307,7 +1307,7 @@ int cortex_m3_init_target(struct command_context_s *cmd_ctx, struct target_s *ta
        return ERROR_OK;
 }
 
-int cortex_m3_examine(struct command_context_s *cmd_ctx, struct target_s *target)
+int cortex_m3_examine(struct target_s *target)
 {
        int retval;
        u32 cpuid, fpcr, dwtcr, ictr;
index c87320ae8cf1fce3c03eae2d24e8e9c4d08c8796..8178e556b1a0bb9ad6ea1f73406b113e6435162d 100644 (file)
@@ -54,7 +54,7 @@
 #include <stdlib.h>
 #include <string.h>
 
-int feroceon_examine(struct command_context_s *cmd_ctx, struct target_s *target);
+int feroceon_examine(struct target_s *target);
 int feroceon_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
 int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer);
 int feroceon_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
@@ -694,13 +694,13 @@ int feroceon_target_command(struct command_context_s *cmd_ctx, char *cmd, char *
 }
 
 
-int feroceon_examine(struct command_context_s *cmd_ctx, struct target_s *target)
+int feroceon_examine(struct target_s *target)
 {
        armv4_5_common_t *armv4_5;
        arm7_9_common_t *arm7_9;
        int retval;
 
-       retval = arm9tdmi_examine(cmd_ctx, target);
+       retval = arm9tdmi_examine(target);
        if (retval!=ERROR_OK)
                return retval;
                        
index 8695a6269b6cac3ed550b2ffc6d49809f7570fec..e89ee844cd9587bef4fb91691ffc1bccb80a41ed 100644 (file)
@@ -46,7 +46,7 @@ int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *tar
 int mips_m4k_quit();
 int mips_m4k_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
 
-int mips_m4k_examine(struct command_context_s *cmd_ctx, struct target_s *target);
+int mips_m4k_examine(struct target_s *target);
 int mips_m4k_assert_reset(target_t *target);
 int mips_m4k_deassert_reset(target_t *target);
 
@@ -610,7 +610,7 @@ int mips_m4k_target_command(struct command_context_s *cmd_ctx, char *cmd, char *
        return ERROR_OK;
 }
 
-int mips_m4k_examine(struct command_context_s *cmd_ctx, struct target_s *target)
+int mips_m4k_examine(struct target_s *target)
 {
        int retval;
        mips32_common_t *mips32 = target->arch_info;
index 02016e774c0aa503884614dd2768b7436e57b75b..5bd16622f8d0a64da9042d7aa7a57623241a1330 100644 (file)
@@ -290,7 +290,7 @@ int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mo
         *
         * For the "reset halt/init" case we must only set up the registers here.
         */
-       if ((retval = target_examine(cmd_ctx)) != ERROR_OK)
+       if ((retval = target_examine()) != ERROR_OK)
                return retval;
 
        keep_alive(); /* we might be running on a very slow JTAG clk */
@@ -303,14 +303,10 @@ int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mo
                 */
                target_free_all_working_areas_restore(target, 0);
                target->reset_halt=((reset_mode==RESET_HALT)||(reset_mode==RESET_INIT));
-               target->type->assert_reset(target);
+               if ((retval = target->type->assert_reset(target))!=ERROR_OK)
+                       return retval;
                target = target->next;
        }
-       if ((retval = jtag_execute_queue()) != ERROR_OK)
-       {
-               LOG_WARNING("JTAG communication failed asserting reset.");
-               retval = ERROR_OK;
-       }
 
        /* request target halt if necessary, and schedule further action */
        target = targets;
@@ -318,23 +314,24 @@ int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mo
        {
                if (reset_mode!=RESET_RUN)
                {
-                       if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
-                               target_halt(target);
+                       if ((retval = target_halt(target))!=ERROR_OK)
+                               return retval;
                }
                target = target->next;
        }
 
-       if ((retval = jtag_execute_queue()) != ERROR_OK)
+       target = targets;
+       while (target)
        {
-               LOG_WARNING("JTAG communication failed while reset was asserted. Consider using srst_only for reset_config.");
-               retval = ERROR_OK;
+               if ((retval = target->type->deassert_reset(target))!=ERROR_OK)
+                       return retval;
+               target = target->next;
        }
 
        target = targets;
        while (target)
        {
-               target->type->deassert_reset(target);
-               /* We can fail to bring the target into the halted state  */
+               /* We can fail to bring the target into the halted state, try after reset has been deasserted  */
                if (target->reset_halt)
                {
                        /* wait up to 1 second for halt. */
@@ -342,25 +339,14 @@ int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mo
                        if (target->state != TARGET_HALTED)
                        {
                                LOG_WARNING("Failed to reset target into halted mode - issuing halt");
-                               target->type->halt(target);
+                               if ((retval = target->type->halt(target))!=ERROR_OK)
+                                       return retval;
                        }
                }
 
                target = target->next;
        }
 
-       if ((retval = jtag_execute_queue()) != ERROR_OK)
-       {
-               LOG_WARNING("JTAG communication failed while deasserting reset.");
-               retval = ERROR_OK;
-       }
-
-       if (jtag_reset_config & RESET_SRST_PULLS_TRST)
-       {
-               /* If TRST was asserted we need to set up registers again */
-               if ((retval = target_examine(cmd_ctx)) != ERROR_OK)
-                       return retval;
-       }
 
        LOG_DEBUG("Waiting for halted stated as appropriate");
 
@@ -397,7 +383,7 @@ static int default_mmu(struct target_s *target, int *enabled)
        return ERROR_OK;
 }
 
-static int default_examine(struct command_context_s *cmd_ctx, struct target_s *target)
+static int default_examine(struct target_s *target)
 {
        target->type->examined = 1;
        return ERROR_OK;
@@ -415,7 +401,7 @@ int target_examine(struct command_context_s *cmd_ctx)
        target_t *target = targets;
        while (target)
        {
-               if ((retval = target->type->examine(cmd_ctx, target))!=ERROR_OK)
+               if ((retval = target->type->examine(target))!=ERROR_OK)
                        return retval;
                target = target->next;
        }
index 5d1e5773ce7d961a8613222422a20f68a1943efe..8673ddc03c638a8629242d84f3373cedeeca2e99 100644 (file)
@@ -182,7 +182,7 @@ typedef struct target_type_s
         * 
         * invoked every time after the jtag chain has been validated/examined
         */
-       int (*examine)(struct command_context_s *cmd_ctx, struct target_s *target);
+       int (*examine)(struct target_s *target);
        /* Set up structures for target.
         *  
         * It is illegal to talk to the target at this stage as this fn is invoked
@@ -250,7 +250,7 @@ typedef struct target_timer_callback_s
 extern int target_register_commands(struct command_context_s *cmd_ctx);
 extern int target_register_user_commands(struct command_context_s *cmd_ctx);
 extern int target_init(struct command_context_s *cmd_ctx);
-extern int target_examine(struct command_context_s *cmd_ctx);
+extern int target_examine();
 extern int handle_target(void *priv);
 extern int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mode reset_mode);