First task starting.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@435 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/Source/portable/GCC/ColdFire_V2/mcf5xxx.S b/Source/portable/GCC/ColdFire_V2/mcf5xxx.S
deleted file mode 100644 (file)
index 4722bc8..0000000
--- a/Source/portable/GCC/ColdFire_V2/mcf5xxx.S
+++ /dev/null
@@ -1,52 +0,0 @@
-\r
-/*\r
- * File:    mcf5xxx.s\r
- * Purpose: Lowest level routines for all ColdFire processors.\r
- *\r
- * Notes:\r
- *\r
- * Function copied from mcf5xxx.S provided by FreeScale.\r
- */\r
-\r
-    .global french_cheese\r
-\r
-    .text\r
-\r
-/********************************************************************/\r
-/*\r
- * This routines changes the IPL to the value passed into the routine.\r
- * It also returns the old IPL value back.\r
- * Calling convention from C:\r
- *   old_ipl = asm_set_ipl(new_ipl);\r
- * For the Diab Data C compiler, it passes return value thru D0.\r
- * Note that only the least significant three bits of the passed\r
- * value are used.\r
- */\r
-\r
-portSET_IPL:\r
-    link    A6,#-8\r
-    movem.l D6-D7,(SP)\r
-\r
-    move.w  SR,D7       /* current sr    */\r
-\r
-    move.l  D7,D0       /* prepare return value  */\r
-    andi.l  #0x0700,D0  /* mask out IPL  */\r
-    lsr.l   #8,D0       /* IPL   */\r
-\r
-    move.l  8(A6),D6    /* get argument  */\r
-    andi.l  #0x07,D6        /* least significant three bits  */\r
-    lsl.l   #8,D6       /* move over to make mask    */\r
-\r
-    andi.l  #0x0000F8FF,D7  /* zero out current IPL  */\r
-    or.l    D6,D7           /* place new IPL in sr   */\r
-    move.w  D7,SR\r
-\r
-    movem.l (SP),D6-D7\r
-    lea     8(SP),SP\r
-    unlk    A6\r
-    rts\r
-\r
-/********************************************************************/\r
-    .end\r
-\r
-\r

diff --git a/Source/portable/GCC/ColdFire_V2/mcf5xxx_lo.S b/Source/portable/GCC/ColdFire_V2/mcf5xxx_lo.S
deleted file mode 100644 (file)
index ee7cf13..0000000
--- a/Source/portable/GCC/ColdFire_V2/mcf5xxx_lo.S
+++ /dev/null
@@ -1,402 +0,0 @@
-\r
-/*\r
- * File:    mcf5xxx.s\r
- * Purpose: Lowest level routines for all ColdFire processors.\r
- *\r
- * Notes:\r
- *\r
- * File provided by FreeScale.\r
- */\r
-\r
-    .global french_cheese\r
-\r
-    .text\r
-\r
-/********************************************************************\r
- * This routine is the lowest-level exception handler.\r
- */\r
- /*\r
-asm_exception_handler:\r
-_asm_exception_handler:\r
-    lea     -16(SP),SP\r
-    movem.l D0-D1/A0-A1,(SP)\r
-    lea     16(SP),A1\r
-    move.l  A1,-(SP)\r
-    jsr     mcf5xxx_exception_handler\r
-    lea     4(SP),SP\r
-    movem.l (SP),D0-D1/A0-A1\r
-    lea     16(SP),SP\r
-    rte\r
-\r
-/********************************************************************/\r
-/*\r
- * This routines changes the IPL to the value passed into the routine.\r
- * It also returns the old IPL value back.\r
- * Calling convention from C:\r
- *   old_ipl = asm_set_ipl(new_ipl);\r
- * For the Diab Data C compiler, it passes return value thru D0.\r
- * Note that only the least significant three bits of the passed\r
- * value are used.\r
- */\r
-\r
-french_cheese:\r
-    link    A6,#-8\r
-    movem.l D6-D7,(SP)\r
-\r
-    move.w  SR,D7       /* current sr    */\r
-\r
-    move.l  D7,D0       /* prepare return value  */\r
-    andi.l  #0x0700,D0  /* mask out IPL  */\r
-    lsr.l   #8,D0       /* IPL   */\r
-\r
-    move.l  8(A6),D6    /* get argument  */\r
-    andi.l  #0x07,D6        /* least significant three bits  */\r
-    lsl.l   #8,D6       /* move over to make mask    */\r
-\r
-    andi.l  #0x0000F8FF,D7  /* zero out current IPL  */\r
-    or.l    D6,D7           /* place new IPL in sr   */\r
-    move.w  D7,SR\r
-\r
-    movem.l (SP),D6-D7\r
-    lea     8(SP),SP\r
-    unlk    A6\r
-    rts\r
-\r
-/********************************************************************/\r
-    .end\r
-\r
-\r
-\r
-\r
-#if 0\r
-\r
-/*\r
- * File:    mcf5xxx.s\r
- * Purpose: Lowest level routines for all ColdFire processors.\r
- *\r
- * Notes:\r
- *\r
- */\r
-\r
-#define mcf5xxx_exception_handler   _mcf5xxx_exception_handler\r
-\r
-    .extern mcf5xxx_exception_handler\r
-\r
-    //.global asm_exception_handler\r
-    //.global _asm_exception_handler\r
-    .global asm_set_ipl\r
-    .global _asm_set_ipl\r
-    .global mcf5xxx_exe_wdebug\r
-    .global _mcf5xxx_exe_wdebug\r
-    //.global mcf5xxx_wr_cacr\r
-    //.global _mcf5xxx_wr_cacr\r
-    .global mcf5xxx_wr_asid\r
-    .global _mcf5xxx_wr_asid\r
-    .global mcf5xxx_wr_acr0\r
-    .global _mcf5xxx_wr_acr0\r
-    .global mcf5xxx_wr_acr1\r
-    .global _mcf5xxx_wr_acr1\r
-    .global mcf5xxx_wr_acr2\r
-    .global _mcf5xxx_wr_acr2\r
-    .global mcf5xxx_wr_acr3\r
-    .global _mcf5xxx_wr_acr3\r
-    .global mcf5xxx_wr_mmubar\r
-    .global _mcf5xxx_wr_mmubar\r
-    .global mcf5xxx_wr_other_a7\r
-    .global _mcf5xxx_wr_other_a7\r
-   // .global mcf5xxx_wr_vbr\r
-   // .global _mcf5xxx_wr_vbr\r
-    .global mcf5xxx_wr_macsr\r
-    .global _mcf5xxx_wr_macsr\r
-    .global mcf5xxx_wr_mask\r
-    .global _mcf5xxx_wr_mask\r
-    .global mcf5xxx_wr_acc0\r
-    .global _mcf5xxx_wr_acc0\r
-    .global mcf5xxx_wr_accext01\r
-    .global _mcf5xxx_wr_accext01\r
-    .global mcf5xxx_wr_accext23\r
-    .global _mcf5xxx_wr_accext23\r
-    .global mcf5xxx_wr_acc1\r
-    .global _mcf5xxx_wr_acc1\r
-    .global mcf5xxx_wr_acc2\r
-    .global _mcf5xxx_wr_acc2\r
-    .global mcf5xxx_wr_acc3\r
-    .global _mcf5xxx_wr_acc3\r
-    .global mcf5xxx_wr_sr\r
-    .global _mcf5xxx_wr_sr\r
-    .global mcf5xxx_wr_pc\r
-    .global _mcf5xxx_wr_pc\r
-    .global mcf5xxx_wr_rombar0\r
-    .global _mcf5xxx_wr_rombar0\r
-    .global mcf5xxx_wr_rombar1\r
-    .global _mcf5xxx_wr_rombar1\r
-    .global mcf5xxx_wr_rambar0\r
-    .global _mcf5xxx_wr_rambar0\r
-    .global mcf5xxx_wr_rambar1\r
-    .global _mcf5xxx_wr_rambar1\r
-    .global mcf5xxx_wr_mpcr\r
-    .global _mcf5xxx_wr_mpcr\r
-    .global mcf5xxx_wr_secmbar\r
-    .global _mcf5xxx_wr_secmbar\r
-    .global mcf5xxx_wr_mbar\r
-    .global _mcf5xxx_wr_mbar\r
-\r
-    .text\r
-\r
-/********************************************************************\r
- * This routine is the lowest-level exception handler.\r
- */\r
- /*\r
-asm_exception_handler:\r
-_asm_exception_handler:\r
-    lea     -16(SP),SP\r
-    movem.l D0-D1/A0-A1,(SP)\r
-    lea     16(SP),A1\r
-    move.l  A1,-(SP)\r
-    jsr     mcf5xxx_exception_handler\r
-    lea     4(SP),SP\r
-    movem.l (SP),D0-D1/A0-A1\r
-    lea     16(SP),SP\r
-    rte\r
-\r
-/********************************************************************/\r
-/*\r
- * This routines changes the IPL to the value passed into the routine.\r
- * It also returns the old IPL value back.\r
- * Calling convention from C:\r
- *   old_ipl = asm_set_ipl(new_ipl);\r
- * For the Diab Data C compiler, it passes return value thru D0.\r
- * Note that only the least significant three bits of the passed\r
- * value are used.\r
- */\r
-\r
-asm_set_ipl:\r
-_asm_set_ipl:\r
-    link    A6,#-8\r
-    movem.l D6-D7,(SP)\r
-\r
-    move.w  SR,D7       /* current sr    */\r
-\r
-    move.l  D7,D0       /* prepare return value  */\r
-    andi.l  #0x0700,D0  /* mask out IPL  */\r
-    lsr.l   #8,D0       /* IPL   */\r
-\r
-    move.l  8(A6),D6    /* get argument  */\r
-    andi.l  #0x07,D6        /* least significant three bits  */\r
-    lsl.l   #8,D6       /* move over to make mask    */\r
-\r
-    andi.l  #0x0000F8FF,D7  /* zero out current IPL  */\r
-    or.l    D6,D7           /* place new IPL in sr   */\r
-    move.w  D7,SR\r
-\r
-    movem.l (SP),D6-D7\r
-    lea     8(SP),SP\r
-    unlk    A6\r
-    rts\r
-\r
-/********************************************************************/\r
-/*\r
- * These routines execute special ColdFire instructions\r
- */\r
-\r
-mcf5xxx_exe_wdebug:\r
-_mcf5xxx_exe_wdebug:\r
-    move.l   4(sp),a0\r
-    wdebug.l (a0)\r
-    rts\r
-\r
-/********************************************************************/\r
-/*\r
- * These routines write to the special purpose registers in the ColdFire\r
- * core.  Since these registers are write-only in the supervisor model,\r
- * no corresponding read routines exist.\r
- */\r
-\r
-mcf5xxx_wr_sr:\r
-_mcf5xxx_wr_sr:\r
-    move.l  4(SP),D0\r
-    move.w  D0,SR\r
-    rts\r
-/*\r
-mcf5xxx_wr_cacr:\r
-_mcf5xxx_wr_cacr:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0002      /* movec d0,cacr */\r
-/*\r
-    nop\r
-    rts\r
-*/\r
-mcf5xxx_wr_asid:\r
-_mcf5xxx_wr_asid:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0003      /* movec d0,asid */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_acr0:\r
-_mcf5xxx_wr_acr0:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0004      /* movec d0,ACR0 */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_acr1:\r
-_mcf5xxx_wr_acr1:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0005      /* movec d0,ACR1 */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_acr2:\r
-_mcf5xxx_wr_acr2:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0006      /* movec d0,ACR2 */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_acr3:\r
-_mcf5xxx_wr_acr3:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0007      /* movec d0,ACR3 */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_mmubar:\r
-_mcf5xxx_wr_mmubar:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0008      /* movec d0,MBAR */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_other_a7:\r
-_mcf5xxx_wr_other_a7:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0800      /* movec d0,OTHER_A7 */\r
-    nop\r
-    rts\r
-\r
-/*\r
-mcf5xxx_wr_vbr:\r
-_mcf5xxx_wr_vbr:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0801      /* movec d0,VBR */\r
-    /*\r
-    nop\r
-    rts\r
-*/\r
-mcf5xxx_wr_macsr:\r
-_mcf5xxx_wr_macsr:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0804      /* movec d0,MACSR */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_mask:\r
-_mcf5xxx_wr_mask:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0805      /* movec d0,MASK */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_acc0:\r
-_mcf5xxx_wr_acc0:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0806      /* movec d0,ACC0 */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_accext01:\r
-_mcf5xxx_wr_accext01:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0807      /* movec d0,ACCEXT01 */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_accext23:\r
-_mcf5xxx_wr_accext23:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0808      /* movec d0,ACCEXT23 */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_acc1:\r
-_mcf5xxx_wr_acc1:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0809      /* movec d0,ACC1 */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_acc2:\r
-_mcf5xxx_wr_acc2:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b080A      /* movec d0,ACC2 */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_acc3:\r
-_mcf5xxx_wr_acc3:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b080B      /* movec d0,ACC3 */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_pc:\r
-_mcf5xxx_wr_pc:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b080F      /* movec d0,PC */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_rombar0:\r
-_mcf5xxx_wr_rombar0:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0C00      /* movec d0,ROMBAR0 */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_rombar1:\r
-_mcf5xxx_wr_rombar1:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0C01      /* movec d0,ROMBAR1 */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_rambar0:\r
-_mcf5xxx_wr_rambar0:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0C04      /* movec d0,RAMBAR0 */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_rambar1:\r
-_mcf5xxx_wr_rambar1:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0C05      /* movec d0,RAMBAR1 */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_mpcr:\r
-_mcf5xxx_wr_mpcr:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0C0C      /* movec d0,MPCR */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_secmbar:\r
-_mcf5xxx_wr_secmbar:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0C0E      /* movec d0,MBAR1   */\r
-    nop\r
-    rts\r
-\r
-mcf5xxx_wr_mbar:\r
-_mcf5xxx_wr_mbar:\r
-    move.l  4(SP),D0\r
-    .long   0x4e7b0C0F      /* movec d0,MBAR0   */\r
-    nop\r
-    rts\r
-\r
-/********************************************************************/\r
-    .end\r
-\r
-#endif\r

diff --git a/Source/portable/GCC/ColdFire_V2/port.c b/Source/portable/GCC/ColdFire_V2/port.c
index 37ffb3a9f7c3ed205fa68b72695c1bd4eebb6de8..315562165c0c856476525da7bb2788d933aa1ce2 100644 (file)
--- a/Source/portable/GCC/ColdFire_V2/port.c
+++ b/Source/portable/GCC/ColdFire_V2/port.c
@@ -52,18 +52,92 @@
 #include "FreeRTOS.h"\r
 #include "task.h"\r
 \r
+#define portINITIAL_FORMAT_VECTOR              ( ( portSTACK_TYPE ) 0x4000 )\r
+\r
+/* Supervisor mode set. */\r
+#define portINITIAL_STATUS_REGISTER            ( ( portSTACK_TYPE ) 0x2000)\r
+\r
 static unsigned portLONG ulCriticalNesting = 0x9999UL;\r
 \r
 \r
 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
 {\r
-    return NULL;\r
+       *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = (portSTACK_TYPE) 0xDEADBEEF;\r
+       pxTopOfStack--;\r
+\r
+       /* Exception stack frame starts with the return address. */\r
+       *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portINITIAL_FORMAT_VECTOR << 16UL ) | ( portINITIAL_STATUS_REGISTER );\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0x0; /*FP*/\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0xA5A5A5A5;\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0xA4A4A4A4;\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0xA3A3A3A3;\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0xA2A2A2A2;\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0xA1A1A1A1;\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0xA0A0A0A0;\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0xD7D7D7D7;\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0xD6D6D6D6;\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0xD5D5D5D5;\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0xD4D4D4D4;\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0xD3D3D3D3;\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0xD2D2D2D2;\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0xD1D1D1D1;\r
+       pxTopOfStack--;\r
+\r
+       *pxTopOfStack = ( portSTACK_TYPE ) 0xD0D0D0D0;\r
+\r
+    return pxTopOfStack;\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
 portBASE_TYPE xPortStartScheduler( void )\r
 {\r
        ulCriticalNesting = 0UL;\r
+\r
+       vApplicationSetupInterrupts();\r
+\r
+       asm volatile(\r
+                                       "move.l         pxCurrentTCB, %sp                               \n\t"\\r
+                                       "move.l         (%sp), %sp                                              \n\t"\\r
+                                       "movem.l        (%sp), %d0-%fp                                  \n\t"\\r
+                                       "lea.l          %sp@(60), %sp                                   \n\t"\\r
+                                       "rte                                                                                "\r
+                               );\r
+\r
+       return pdFALSE;\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r

diff --git a/Source/portable/GCC/ColdFire_V2/portasm.S b/Source/portable/GCC/ColdFire_V2/portasm.S
index 4722bc819dbfbc2197313eb6a46eef25b2ab6ef0..aee34d3c8b3041540e14fdc5aea28c261ca60d82 100644 (file)
--- a/Source/portable/GCC/ColdFire_V2/portasm.S
+++ b/Source/portable/GCC/ColdFire_V2/portasm.S
@@ -8,7 +8,7 @@
  * Function copied from mcf5xxx.S provided by FreeScale.\r
  */\r
 \r
-    .global french_cheese\r
+    .global ulPortSetIPL\r
 \r
     .text\r
 \r
@@ -23,7 +23,7 @@
  * value are used.\r
  */\r
 \r
-portSET_IPL:\r
+ulPortSetIPL:\r
     link    A6,#-8\r
     movem.l D6-D7,(SP)\r
 \r

diff --git a/Source/portable/GCC/ColdFire_V2/portmacro.h b/Source/portable/GCC/ColdFire_V2/portmacro.h
index 46e6e4785044814b660891082e8d8384c247cffa..3cd00193d44a975e0960c306b8163ce47cf46a37 100644 (file)
--- a/Source/portable/GCC/ColdFire_V2/portmacro.h
+++ b/Source/portable/GCC/ColdFire_V2/portmacro.h
@@ -19,7 +19,7 @@
 \r
        A special exception to the GPL can be applied should you wish to distribute\r
        a combined work that includes FreeRTOS.org, without being obliged to provide\r
-       the source code for any proprietary components.  See the licensing section \r
+       the source code for any proprietary components.  See the licensing section\r
        of http://www.FreeRTOS.org for full details of how and when the exception\r
        can be applied.\r
 \r
@@ -37,28 +37,25 @@
        Please ensure to read the configuration and relevant port sections of the\r
        online documentation.\r
 \r
-       http://www.FreeRTOS.org - Documentation, latest information, license and \r
+       http://www.FreeRTOS.org - Documentation, latest information, license and\r
        contact details.\r
 \r
-       http://www.SafeRTOS.com - A version that is certified for use in safety \r
+       http://www.SafeRTOS.com - A version that is certified for use in safety\r
        critical systems.\r
 \r
-       http://www.OpenRTOS.com - Commercial support, development, porting, \r
+       http://www.OpenRTOS.com - Commercial support, development, porting,\r
        licensing and training services.\r
 */\r
 \r
 #ifndef PORTMACRO_H\r
 #define PORTMACRO_H\r
 \r
-/* System include files */\r
-#include <plib.h>\r
-\r
 #ifdef __cplusplus\r
 extern "C" {\r
 #endif\r
 \r
 /*-----------------------------------------------------------\r
- * Port specific definitions.  \r
+ * Port specific definitions.\r
  *\r
  * The settings in this file configure FreeRTOS correctly for the\r
  * given hardware and compiler.\r
@@ -88,15 +85,15 @@ extern "C" {
 /* Hardware specifics. */\r
 #define portBYTE_ALIGNMENT                     4\r
 #define portSTACK_GROWTH                       -4\r
-#define portTICK_RATE_MS                       ( ( portTickType ) 1000 / configTICK_RATE_HZ )          \r
+#define portTICK_RATE_MS                       ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
 /*-----------------------------------------------------------*/\r
-\r
-#define portDISABLE_INTERRUPTS()\r
-#define portENABLE_INTERRUPTS()\r
+unsigned portLONG ulPortSetIPL( unsigned portLONG );\r
+#define portDISABLE_INTERRUPTS()       ulPortSetIPL( configKERNEL_INTERRUPT_PRIORITY )\r
+#define portENABLE_INTERRUPTS()                ulPortSetIPL( 0 )\r
 \r
 \r
-extern void vTaskEnterCritical( void );\r
-extern void vTaskExitCritical( void );\r
+extern void vPortEnterCritical( void );\r
+extern void vPortExitCritical( void );\r
 #define portENTER_CRITICAL()           vPortEnterCritical()\r
 #define portEXIT_CRITICAL()                    vPortExitCritical()\r
 \r