/*\r
* Return the list item at the head of the list.\r
*\r
- * \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY\r
+ * \page listGET_NEXT listGET_NEXT\r
* \ingroup LinkedList\r
*/\r
#define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext )\r
*----------------------------------------------------------*/\r
\r
#define tskKERNEL_VERSION_NUMBER "V8.0.0 release candidate 1"\r
+#define tskKERNEL_VERSION_MAJOR 8\r
+#define tskKERNEL_VERSION_MINOR 0\r
+#define tskKERNEL_VERSION_BUILD 0\r
\r
/**\r
* task. h\r
#error configMAX_API_CALL_INTERRUPT_PRIORITY must be greater than ( configUNIQUE_INTERRUPT_PRIORITIES / 2 )\r
#endif\r
\r
+#ifndef configCLEAR_TICK_INTERRUPT\r
+ #define configCLEAR_TICK_INTERRUPT()\r
+#endif\r
+\r
/* A critical section is exited when the critical section nesting count reaches\r
this value. */\r
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
/* Constants required to setup the initial task context. */\r
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
-#define portINTERRUPT_ENABLE_BIT ( 0x80UL )\r
#define portTHUMB_MODE_ADDRESS ( 0x01UL )\r
\r
/* Used by portASSERT_IF_INTERRUPT_PRIORITY_INVALID() when ensuring the binary\r
\r
/* Ensure all interrupt priorities are active again. */\r
portCLEAR_INTERRUPT_MASK();\r
+ configCLEAR_TICK_INTERRUPT();\r
}\r
/*-----------------------------------------------------------*/\r
\r
CMP R1, #0\r
\r
; Restore the floating point context, if any\r
- LDMFDNE SP!, {R0}\r
+ POPNE {R0}\r
VPOPNE {D16-D31}\r
VPOPNE {D0-D15}\r
VMSRNE FPSCR, R0\r
\r
; Call the interrupt handler\r
PUSH {r0-r3, lr}\r
- BL vApplicationIRQHandler\r
+ LDR r1, =vApplicationIRQHandler\r
+ BLX r1\r
POP {r0-r3, lr}\r
ADD sp, sp, r2\r
\r
; vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD\r
; instructions, or 8 byte aligned stack allocated data. LR does not need\r
; saving as a new LR will be loaded by portRESTORE_CONTEXT anyway.\r
- BL vTaskSwitchContext\r
+ LDR r0, =vTaskSwitchContext\r
+ BLX r0\r
\r
; Restore the context of, and branch to, the task selected to execute next.\r
portRESTORE_CONTEXT\r
#error configMAX_API_CALL_INTERRUPT_PRIORITY must be greater than ( configUNIQUE_INTERRUPT_PRIORITIES / 2 )\r
#endif\r
\r
+#ifndef configCLEAR_TICK_INTERRUPT\r
+ #define configCLEAR_TICK_INTERRUPT()\r
+#endif\r
+\r
/* The number of bits to shift for an interrupt priority is dependent on the\r
number of bits implemented by the interrupt controller. */\r
#if configUNIQUE_INTERRUPT_PRIORITIES == 16\r
/* Constants required to setup the initial task context. */\r
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
-#define portINTERRUPT_ENABLE_BIT ( 0x80UL )\r
#define portTHUMB_MODE_ADDRESS ( 0x01UL )\r
\r
/* Masks all bits in the APSR other than the mode bits. */\r
\r
/* Ensure all interrupt priorities are active again. */\r
portCLEAR_INTERRUPT_MASK();\r
+ configCLEAR_TICK_INTERRUPT();\r
}\r
/*-----------------------------------------------------------*/\r
\r
\r
; Call the interrupt handler\r
PUSH {r0-r3, lr}\r
- BL vApplicationIRQHandler\r
+ LDR r1, =vApplicationIRQHandler\r
+ BLX r1\r
POP {r0-r3, lr}\r
ADD sp, sp, r2\r
\r
; vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD\r
; instructions, or 8 byte aligned stack allocated data. LR does not need\r
; saving as a new LR will be loaded by portRESTORE_CONTEXT anyway.\r
- BL vTaskSwitchContext\r
+ LDR r0, =vTaskSwitchContext\r
+ BLX r0\r
\r
; Restore the context of, and branch to, the task selected to execute next.\r
portRESTORE_CONTEXT\r
CMP R1, #0\r
\r
; Restore the floating point context, if any\r
- LDMFDNE SP!, {R0}\r
+ POPNE {R0}\r
VPOPNE {D16-D31}\r
VPOPNE {D0-D15}\r
VMSRNE FPSCR, R0\r
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();\r
\r
uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();\r
- xReturn = xTickCount;\r
+ {\r
+ xReturn = xTickCount;\r
+ }\r
portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );\r
\r
return xReturn;\r