-/******************** (C) COPYRIGHT 2007 STMicroelectronics ********************\r
-* File Name : stm32f10x_spi.h\r
-* Author : MCD Application Team\r
-* Date First Issued : 09/29/2006\r
-* Description : This file contains all the functions prototypes for the\r
-* SPI firmware library.\r
-********************************************************************************\r
-* History:\r
-* 04/02/2007: V0.2\r
-* 02/05/2007: V0.1\r
-* 09/29/2006: V0.01\r
-********************************************************************************\r
-* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
-* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.\r
-* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,\r
-* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE\r
-* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING\r
-* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
-*******************************************************************************/\r
+/**\r
+ ******************************************************************************\r
+ * @file stm32f10x_spi.h\r
+ * @author MCD Application Team\r
+ * @version V3.0.0\r
+ * @date 04/06/2009\r
+ * @brief This file contains all the functions prototypes for the SPI firmware\r
+ * library.\r
+ ******************************************************************************\r
+ * @copy\r
+ *\r
+ * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
+ * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE\r
+ * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY\r
+ * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING\r
+ * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE\r
+ * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
+ *\r
+ * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>\r
+ */\r
\r
/* Define to prevent recursive inclusion -------------------------------------*/\r
#ifndef __STM32F10x_SPI_H\r
#define __STM32F10x_SPI_H\r
\r
/* Includes ------------------------------------------------------------------*/\r
+//#include "stm32f10x.h"\r
#include "stm32f10x_map.h"\r
\r
-/* Exported types ------------------------------------------------------------*/\r
-/* SPI Init structure definition */\r
-typedef struct\r
-{\r
- u16 SPI_Direction;\r
- u16 SPI_Mode;\r
- u16 SPI_DataSize;\r
- u16 SPI_CPOL;\r
- u16 SPI_CPHA;\r
- u16 SPI_NSS;\r
- u16 SPI_BaudRatePrescaler;\r
- u16 SPI_FirstBit;\r
- u16 SPI_CRCPolynomial;\r
-}SPI_InitTypeDef;\r
+#define uint16_t unsigned short\r
+#define uint8_t unsigned char\r
+#define uint32_t unsigned long\r
\r
-/* Exported constants --------------------------------------------------------*/\r
-/* SPI data direction mode */\r
-#define SPI_Direction_2Lines_FullDuplex ((u16)0x0000)\r
-#define SPI_Direction_2Lines_RxOnly ((u16)0x0400)\r
-#define SPI_Direction_1Line_Rx ((u16)0x8000)\r
-#define SPI_Direction_1Line_Tx ((u16)0xC000)\r
+#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)\r
+#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00)\r
+#define SPI3 ((SPI_TypeDef *) SPI3_BASE)\r
+#define GPIO_Remap_SPI3 ( 1UL << 28UL )\r
+/** @addtogroup StdPeriph_Driver\r
+ * @{\r
+ */\r
\r
-#define IS_SPI_DIRECTION_MODE(MODE) ((MODE == SPI_Direction_2Lines_FullDuplex) || \\r
- (MODE == SPI_Direction_2Lines_RxOnly) || \\r
- (MODE == SPI_Direction_1Line_Rx) || \\r
- (MODE == SPI_Direction_1Line_Tx))\r
+/** @addtogroup SPI\r
+ * @{\r
+ */\r
\r
-/* SPI master/slave mode */\r
-#define SPI_Mode_Master ((u16)0x0104)\r
-#define SPI_Mode_Slave ((u16)0x0000)\r
+/** @defgroup SPI_Exported_Types\r
+ * @{\r
+ */\r
\r
-#define IS_SPI_MODE(MODE) ((MODE == SPI_Mode_Master) || \\r
- (MODE == SPI_Mode_Slave))\r
+/**\r
+ * @brief SPI Init structure definition\r
+ */\r
\r
-/* SPI data size */\r
-#define SPI_DataSize_16b ((u16)0x0800)\r
-#define SPI_DataSize_8b ((u16)0x0000)\r
-\r
-#define IS_SPI_DATASIZE(DATASIZE) ((DATASIZE == SPI_DataSize_16b) || \\r
- (DATASIZE == SPI_DataSize_8b))\r
-\r
-/* SPI Clock Polarity */\r
-#define SPI_CPOL_Low ((u16)0x0000)\r
-#define SPI_CPOL_High ((u16)0x0002)\r
-\r
-#define IS_SPI_CPOL(CPOL) ((CPOL == SPI_CPOL_Low) || \\r
- (CPOL == SPI_CPOL_High))\r
-\r
-/* SPI Clock Phase */\r
-#define SPI_CPHA_1Edge ((u16)0x0000)\r
-#define SPI_CPHA_2Edge ((u16)0x0001)\r
-\r
-#define IS_SPI_CPHA(CPHA) ((CPHA == SPI_CPHA_1Edge) || \\r
- (CPHA == SPI_CPHA_2Edge))\r
-\r
-/* SPI Slave Select management */\r
-#define SPI_NSS_Soft ((u16)0x0200)\r
-#define SPI_NSS_Hard ((u16)0x0000)\r
-\r
-#define IS_SPI_NSS(NSS) ((NSS == SPI_NSS_Soft) || \\r
- (NSS == SPI_NSS_Hard))\r
-\r
-/* SPI BaudRate Prescaler */\r
-#define SPI_BaudRatePrescaler_2 ((u16)0x0000)\r
-#define SPI_BaudRatePrescaler_4 ((u16)0x0008)\r
-#define SPI_BaudRatePrescaler_8 ((u16)0x0010)\r
-#define SPI_BaudRatePrescaler_16 ((u16)0x0018)\r
-#define SPI_BaudRatePrescaler_32 ((u16)0x0020)\r
-#define SPI_BaudRatePrescaler_64 ((u16)0x0028)\r
-#define SPI_BaudRatePrescaler_128 ((u16)0x0030)\r
-#define SPI_BaudRatePrescaler_256 ((u16)0x0038)\r
-\r
-#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) ((PRESCALER == SPI_BaudRatePrescaler_2) || \\r
- (PRESCALER == SPI_BaudRatePrescaler_4) || \\r
- (PRESCALER == SPI_BaudRatePrescaler_8) || \\r
- (PRESCALER == SPI_BaudRatePrescaler_16) || \\r
- (PRESCALER == SPI_BaudRatePrescaler_32) || \\r
- (PRESCALER == SPI_BaudRatePrescaler_64) || \\r
- (PRESCALER == SPI_BaudRatePrescaler_128) || \\r
- (PRESCALER == SPI_BaudRatePrescaler_256))\r
-\r
-/* SPI MSB/LSB transmission */\r
-#define SPI_FirstBit_MSB ((u16)0x0000)\r
-#define SPI_FirstBit_LSB ((u16)0x0080)\r
-\r
-#define IS_SPI_FIRST_BIT(BIT) ((BIT == SPI_FirstBit_MSB) || \\r
- (BIT == SPI_FirstBit_LSB))\r
-\r
-/* SPI DMA transfer requests */\r
-#define SPI_DMAReq_Tx ((u16)0x0002)\r
-#define SPI_DMAReq_Rx ((u16)0x0001)\r
-\r
-#define IS_SPI_DMA_REQ(REQ) (((REQ & (u16)0xFFFC) == 0x00) && (REQ != 0x00))\r
-\r
-/* SPI NSS internal software mangement */\r
-#define SPI_NSSInternalSoft_Set ((u16)0x0100)\r
-#define SPI_NSSInternalSoft_Reset ((u16)0xFEFF)\r
-\r
-#define IS_SPI_NSS_INTERNAL(INTERNAL) ((INTERNAL == SPI_NSSInternalSoft_Set) || \\r
- (INTERNAL == SPI_NSSInternalSoft_Reset))\r
-\r
-/* SPI CRC Transmit/Receive */\r
-#define SPI_CRC_Tx ((u8)0x00)\r
-#define SPI_CRC_Rx ((u8)0x01)\r
-\r
-#define IS_SPI_CRC(CRC) ((CRC == SPI_CRC_Tx) || (CRC == SPI_CRC_Rx))\r
-\r
-/* SPI direction transmit/receive */\r
-#define SPI_Direction_Rx ((u16)0xBFFF)\r
-#define SPI_Direction_Tx ((u16)0x4000)\r
-\r
-#define IS_SPI_DIRECTION(DIRECTION) ((DIRECTION == SPI_Direction_Rx) || \\r
- (DIRECTION == SPI_Direction_Tx))\r
-\r
-/* SPI interrupts definition */\r
-#define SPI_IT_TXE ((u8)0x71)\r
-#define SPI_IT_RXNE ((u8)0x60)\r
-#define SPI_IT_ERR ((u8)0x50)\r
-\r
-#define IS_SPI_CONFIG_IT(IT) ((IT == SPI_IT_TXE) || (IT == SPI_IT_RXNE) || \\r
- (IT == SPI_IT_ERR))\r
+typedef struct\r
+{\r
+ uint16_t SPI_Direction;\r
+ uint16_t SPI_Mode;\r
+ uint16_t SPI_DataSize;\r
+ uint16_t SPI_CPOL;\r
+ uint16_t SPI_CPHA;\r
+ uint16_t SPI_NSS;\r
+ uint16_t SPI_BaudRatePrescaler;\r
+ uint16_t SPI_FirstBit;\r
+ uint16_t SPI_CRCPolynomial;\r
+}SPI_InitTypeDef;\r
\r
-#define SPI_IT_OVR ((u8)0x56)\r
-#define SPI_IT_MODF ((u8)0x55)\r
-#define SPI_IT_CRCERR ((u8)0x54)\r
+/**\r
+ * @brief I2S Init structure definition\r
+ */\r
\r
-#define IS_SPI_CLEAR_IT(IT) ((IT == SPI_IT_OVR) || (IT == SPI_IT_MODF) || \\r
- (IT == SPI_IT_CRCERR))\r
-\r
-#define IS_SPI_GET_IT(IT) ((IT == SPI_IT_TXE) || (IT == SPI_IT_RXNE) || \\r
- (IT == SPI_IT_OVR) || (IT == SPI_IT_MODF) || \\r
- (IT == SPI_IT_CRCERR))\r
-\r
-/* SPI flags definition */\r
-#define SPI_FLAG_RXNE ((u16)0x0001)\r
-#define SPI_FLAG_TXE ((u16)0x0002)\r
-#define SPI_FLAG_CRCERR ((u16)0x0010)\r
-#define SPI_FLAG_MODF ((u16)0x0020)\r
-#define SPI_FLAG_OVR ((u16)0x0040)\r
-#define SPI_FLAG_BSY ((u16)0x0080)\r
-\r
-#define IS_SPI_CLEAR_FLAG(FLAG) (((FLAG & (u16)0xFF8F) == 0x00) && (FLAG != 0x00))\r
-#define IS_SPI_GET_FLAG(FLAG) ((FLAG == SPI_FLAG_BSY) || (FLAG == SPI_FLAG_OVR) || \\r
- (FLAG == SPI_FLAG_MODF) || (FLAG == SPI_FLAG_CRCERR) || \\r
- (FLAG == SPI_FLAG_TXE) || (FLAG == SPI_FLAG_RXNE))\r
-\r
-/* SPI CRC polynomial --------------------------------------------------------*/\r
-#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (POLYNOMIAL >= 0x1)\r
-\r
-/* Exported macro ------------------------------------------------------------*/\r
-/* Exported functions ------------------------------------------------------- */\r
-void SPI_DeInit(SPI_TypeDef* SPIx);\r
+typedef struct\r
+{\r
+ uint16_t I2S_Mode;\r
+ uint16_t I2S_Standard;\r
+ uint16_t I2S_DataFormat;\r
+ uint16_t I2S_MCLKOutput;\r
+ uint16_t I2S_AudioFreq;\r
+ uint16_t I2S_CPOL;\r
+}I2S_InitTypeDef;\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_Exported_Constants\r
+ * @{\r
+ */\r
+\r
+#define IS_SPI_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == SPI1_BASE) || \\r
+ ((*(uint32_t*)&(PERIPH)) == SPI2_BASE) || \\r
+ ((*(uint32_t*)&(PERIPH)) == SPI3_BASE))\r
+#define IS_SPI_23_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == SPI2_BASE) || \\r
+ ((*(uint32_t*)&(PERIPH)) == SPI3_BASE))\r
+\r
+/** @defgroup SPI_data_direction_mode\r
+ * @{\r
+ */\r
+\r
+#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)\r
+#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)\r
+#define SPI_Direction_1Line_Rx ((uint16_t)0x8000)\r
+#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)\r
+#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \\r
+ ((MODE) == SPI_Direction_2Lines_RxOnly) || \\r
+ ((MODE) == SPI_Direction_1Line_Rx) || \\r
+ ((MODE) == SPI_Direction_1Line_Tx))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_master_slave_mode\r
+ * @{\r
+ */\r
+\r
+#define SPI_Mode_Master ((uint16_t)0x0104)\r
+#define SPI_Mode_Slave ((uint16_t)0x0000)\r
+#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \\r
+ ((MODE) == SPI_Mode_Slave))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_data_size\r
+ * @{\r
+ */\r
+\r
+#define SPI_DataSize_16b ((uint16_t)0x0800)\r
+#define SPI_DataSize_8b ((uint16_t)0x0000)\r
+#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \\r
+ ((DATASIZE) == SPI_DataSize_8b))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_Clock_Polarity\r
+ * @{\r
+ */\r
+\r
+#define SPI_CPOL_Low ((uint16_t)0x0000)\r
+#define SPI_CPOL_High ((uint16_t)0x0002)\r
+#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \\r
+ ((CPOL) == SPI_CPOL_High))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_Clock_Phase\r
+ * @{\r
+ */\r
+\r
+#define SPI_CPHA_1Edge ((uint16_t)0x0000)\r
+#define SPI_CPHA_2Edge ((uint16_t)0x0001)\r
+#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \\r
+ ((CPHA) == SPI_CPHA_2Edge))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_Slave_Select_management\r
+ * @{\r
+ */\r
+\r
+#define SPI_NSS_Soft ((uint16_t)0x0200)\r
+#define SPI_NSS_Hard ((uint16_t)0x0000)\r
+#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \\r
+ ((NSS) == SPI_NSS_Hard))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_BaudRate_Prescaler_\r
+ * @{\r
+ */\r
+\r
+#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)\r
+#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)\r
+#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)\r
+#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)\r
+#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)\r
+#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)\r
+#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)\r
+#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)\r
+#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \\r
+ ((PRESCALER) == SPI_BaudRatePrescaler_4) || \\r
+ ((PRESCALER) == SPI_BaudRatePrescaler_8) || \\r
+ ((PRESCALER) == SPI_BaudRatePrescaler_16) || \\r
+ ((PRESCALER) == SPI_BaudRatePrescaler_32) || \\r
+ ((PRESCALER) == SPI_BaudRatePrescaler_64) || \\r
+ ((PRESCALER) == SPI_BaudRatePrescaler_128) || \\r
+ ((PRESCALER) == SPI_BaudRatePrescaler_256))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_MSB_LSB_transmission\r
+ * @{\r
+ */\r
+\r
+#define SPI_FirstBit_MSB ((uint16_t)0x0000)\r
+#define SPI_FirstBit_LSB ((uint16_t)0x0080)\r
+#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \\r
+ ((BIT) == SPI_FirstBit_LSB))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2S_Mode\r
+ * @{\r
+ */\r
+\r
+#define I2S_Mode_SlaveTx ((uint16_t)0x0000)\r
+#define I2S_Mode_SlaveRx ((uint16_t)0x0100)\r
+#define I2S_Mode_MasterTx ((uint16_t)0x0200)\r
+#define I2S_Mode_MasterRx ((uint16_t)0x0300)\r
+#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \\r
+ ((MODE) == I2S_Mode_SlaveRx) || \\r
+ ((MODE) == I2S_Mode_MasterTx) || \\r
+ ((MODE) == I2S_Mode_MasterRx) )\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2S_Standard\r
+ * @{\r
+ */\r
+\r
+#define I2S_Standard_Phillips ((uint16_t)0x0000)\r
+#define I2S_Standard_MSB ((uint16_t)0x0010)\r
+#define I2S_Standard_LSB ((uint16_t)0x0020)\r
+#define I2S_Standard_PCMShort ((uint16_t)0x0030)\r
+#define I2S_Standard_PCMLong ((uint16_t)0x00B0)\r
+#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \\r
+ ((STANDARD) == I2S_Standard_MSB) || \\r
+ ((STANDARD) == I2S_Standard_LSB) || \\r
+ ((STANDARD) == I2S_Standard_PCMShort) || \\r
+ ((STANDARD) == I2S_Standard_PCMLong))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2S_Data_Format\r
+ * @{\r
+ */\r
+\r
+#define I2S_DataFormat_16b ((uint16_t)0x0000)\r
+#define I2S_DataFormat_16bextended ((uint16_t)0x0001)\r
+#define I2S_DataFormat_24b ((uint16_t)0x0003)\r
+#define I2S_DataFormat_32b ((uint16_t)0x0005)\r
+#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \\r
+ ((FORMAT) == I2S_DataFormat_16bextended) || \\r
+ ((FORMAT) == I2S_DataFormat_24b) || \\r
+ ((FORMAT) == I2S_DataFormat_32b))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2S_MCLK_Output\r
+ * @{\r
+ */\r
+\r
+#define I2S_MCLKOutput_Enable ((uint16_t)0x0200)\r
+#define I2S_MCLKOutput_Disable ((uint16_t)0x0000)\r
+#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \\r
+ ((OUTPUT) == I2S_MCLKOutput_Disable))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2S_Audio_Frequency\r
+ * @{\r
+ */\r
+\r
+#define I2S_AudioFreq_48k ((uint16_t)48000)\r
+#define I2S_AudioFreq_44k ((uint16_t)44100)\r
+#define I2S_AudioFreq_22k ((uint16_t)22050)\r
+#define I2S_AudioFreq_16k ((uint16_t)16000)\r
+#define I2S_AudioFreq_8k ((uint16_t)8000)\r
+#define I2S_AudioFreq_Default ((uint16_t)2)\r
+#define IS_I2S_AUDIO_FREQ(FREQ) (((FREQ) == I2S_AudioFreq_48k) || \\r
+ ((FREQ) == I2S_AudioFreq_44k) || \\r
+ ((FREQ) == I2S_AudioFreq_22k) || \\r
+ ((FREQ) == I2S_AudioFreq_16k) || \\r
+ ((FREQ) == I2S_AudioFreq_8k) || \\r
+ ((FREQ) == I2S_AudioFreq_Default))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup I2S_Clock_Polarity\r
+ * @{\r
+ */\r
+\r
+#define I2S_CPOL_Low ((uint16_t)0x0000)\r
+#define I2S_CPOL_High ((uint16_t)0x0008)\r
+#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \\r
+ ((CPOL) == I2S_CPOL_High))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_I2S_DMA_transfer_requests\r
+ * @{\r
+ */\r
+\r
+#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)\r
+#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)\r
+#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_NSS_internal_software_mangement\r
+ * @{\r
+ */\r
+\r
+#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)\r
+#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)\r
+#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \\r
+ ((INTERNAL) == SPI_NSSInternalSoft_Reset))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_CRC_Transmit_Receive\r
+ * @{\r
+ */\r
+\r
+#define SPI_CRC_Tx ((uint8_t)0x00)\r
+#define SPI_CRC_Rx ((uint8_t)0x01)\r
+#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_direction_transmit_receive\r
+ * @{\r
+ */\r
+\r
+#define SPI_Direction_Rx ((uint16_t)0xBFFF)\r
+#define SPI_Direction_Tx ((uint16_t)0x4000)\r
+#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \\r
+ ((DIRECTION) == SPI_Direction_Tx))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_I2S_interrupts_definition\r
+ * @{\r
+ */\r
+\r
+#define SPI_I2S_IT_TXE ((uint8_t)0x71)\r
+#define SPI_I2S_IT_RXNE ((uint8_t)0x60)\r
+#define SPI_I2S_IT_ERR ((uint8_t)0x50)\r
+#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \\r
+ ((IT) == SPI_I2S_IT_RXNE) || \\r
+ ((IT) == SPI_I2S_IT_ERR))\r
+#define SPI_I2S_IT_OVR ((uint8_t)0x56)\r
+#define SPI_IT_MODF ((uint8_t)0x55)\r
+#define SPI_IT_CRCERR ((uint8_t)0x54)\r
+#define I2S_IT_UDR ((uint8_t)0x53)\r
+#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))\r
+#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \\r
+ ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \\r
+ ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_I2S_flags_definition\r
+ * @{\r
+ */\r
+\r
+#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)\r
+#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)\r
+#define I2S_FLAG_CHSIDE ((uint16_t)0x0004)\r
+#define I2S_FLAG_UDR ((uint16_t)0x0008)\r
+#define SPI_FLAG_CRCERR ((uint16_t)0x0010)\r
+#define SPI_FLAG_MODF ((uint16_t)0x0020)\r
+#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)\r
+#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)\r
+#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))\r
+#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \\r
+ ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \\r
+ ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \\r
+ ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_CRC_polynomial\r
+ * @{\r
+ */\r
+\r
+#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_Exported_Macros\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @defgroup SPI_Exported_Functions\r
+ * @{\r
+ */\r
+\r
+void SPI_I2S_DeInit(SPI_TypeDef* SPIx);\r
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);\r
+void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);\r
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);\r
+void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);\r
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);\r
-void SPI_ITConfig(SPI_TypeDef* SPIx, u8 SPI_IT, FunctionalState NewState);\r
-void SPI_DMACmd(SPI_TypeDef* SPIx, u16 SPI_DMAReq, FunctionalState NewState);\r
-void SPI_SendData(SPI_TypeDef* SPIx, u16 Data);\r
-u16 SPI_ReceiveData(SPI_TypeDef* SPIx);\r
-void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, u16 SPI_NSSInternalSoft);\r
+void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);\r
+void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);\r
+void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);\r
+void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);\r
+uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);\r
+void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);\r
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);\r
-void SPI_DataSizeConfig(SPI_TypeDef* SPIx, u16 SPI_DataSize);\r
+void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);\r
void SPI_TransmitCRC(SPI_TypeDef* SPIx);\r
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);\r
-u16 SPI_GetCRC(SPI_TypeDef* SPIx, u8 SPI_CRC);\r
-u16 SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);\r
-void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, u16 SPI_Direction);\r
-FlagStatus SPI_GetFlagStatus(SPI_TypeDef* SPIx, u16 SPI_FLAG);\r
-void SPI_ClearFlag(SPI_TypeDef* SPIx, u16 SPI_FLAG);\r
-ITStatus SPI_GetITStatus(SPI_TypeDef* SPIx, u8 SPI_IT);\r
-void SPI_ClearITPendingBit(SPI_TypeDef* SPIx, u8 SPI_IT);\r
+uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);\r
+uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);\r
+void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);\r
+FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);\r
+void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);\r
+ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);\r
+void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);\r
\r
#endif /*__STM32F10x_SPI_H */\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
\r
-/******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****/\r
+/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/\r
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