--- /dev/null
+/*\r
+ FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+/*-----------------------------------------------------------\r
+ * Implementation of functions defined in portable.h for the ARM CM4F port.\r
+ *----------------------------------------------------------*/\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+#ifndef __VFP_FP__\r
+ #error This port can only be used when the project options are configured to enable hardware floating point support.\r
+#endif\r
+\r
+/* Constants required to manipulate the NVIC. */\r
+#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long * ) 0xe000e010 )\r
+#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long * ) 0xe000e014 )\r
+#define portNVIC_INT_CTRL ( ( volatile unsigned long * ) 0xe000ed04 )\r
+#define portNVIC_SYSPRI2 ( ( volatile unsigned long * ) 0xe000ed20 )\r
+#define portNVIC_SYSTICK_CLK 0x00000004\r
+#define portNVIC_SYSTICK_INT 0x00000002\r
+#define portNVIC_SYSTICK_ENABLE 0x00000001\r
+#define portNVIC_PENDSVSET 0x10000000\r
+#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
+#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
+\r
+/* Constants required to manipulate the VFP. */\r
+#define portFPCCR ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */\r
+#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )\r
+\r
+/* Constants required to set up the initial stack. */\r
+#define portINITIAL_XPSR ( 0x01000000 )\r
+#define portINITIAL_EXEC_RETURN ( 0xfffffffd )\r
+\r
+/* The priority used by the kernel is assigned to a variable to make access\r
+from inline assembler easier. */\r
+const unsigned long ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;\r
+\r
+/* Each task maintains its own interrupt status in the critical nesting\r
+variable. */\r
+static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
+\r
+/*\r
+ * Setup the timer to generate the tick interrupts.\r
+ */\r
+static void prvSetupTimerInterrupt( void );\r
+\r
+/*\r
+ * Exception handlers.\r
+ */\r
+void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
+void xPortSysTickHandler( void );\r
+void vPortSVCHandler( void ) __attribute__ (( naked ));\r
+\r
+/*\r
+ * Start first task is a separate function so it can be tested in isolation.\r
+ */\r
+static void vPortStartFirstTask( void ) __attribute__ (( naked ));\r
+\r
+/*\r
+ * Function to enable the VFP.\r
+ */\r
+ static void vPortEnableVFP( void ) __attribute__ (( naked ));\r
+\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * See header file for description.\r
+ */\r
+portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+{\r
+ /* Simulate the stack frame as it would be created by a context switch\r
+ interrupt. */\r
+\r
+ /* Offset added to account for the way the MCU uses the stack on entry/exit\r
+ of interrupts, and to ensure alignment. */\r
+ pxTopOfStack -= 2;\r
+\r
+ *pxTopOfStack = portINITIAL_XPSR; /* xPSR */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = 0; /* LR */\r
+\r
+ /* Save code space by skipping register initialisation. */\r
+ pxTopOfStack -= 5; /* R12, R3, R2 and R1. */\r
+ *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+\r
+ /* A save method is being used that requiers each task to maintain its\r
+ own exec return value. */\r
+ pxTopOfStack--;\r
+ *pxTopOfStack = portINITIAL_EXEC_RETURN;\r
+\r
+ pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
+\r
+ return pxTopOfStack;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortSVCHandler( void )\r
+{\r
+ __asm volatile (\r
+ " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */\r
+ " ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */\r
+ " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
+ " ldmia r0!, {r4-r11, r14} \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */\r
+ " msr psp, r0 \n" /* Restore the task stack pointer. */\r
+ " mov r0, #0 \n"\r
+ " msr basepri, r0 \n"\r
+ " bx r14 \n"\r
+ " \n"\r
+ " .align 2 \n"\r
+ "pxCurrentTCBConst2: .word pxCurrentTCB \n"\r
+ );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void vPortStartFirstTask( void )\r
+{\r
+ __asm volatile(\r
+ " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */\r
+ " ldr r0, [r0] \n"\r
+ " ldr r0, [r0] \n"\r
+ " msr msp, r0 \n" /* Set the msp back to the start of the stack. */\r
+ " cpsie i \n" /* Globally enable interrupts. */\r
+ " svc 0 \n" /* System call to start first task. */\r
+ " nop \n"\r
+ );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * See header file for description.\r
+ */\r
+portBASE_TYPE xPortStartScheduler( void )\r
+{\r
+ /* Make PendSV and SysTick the lowest priority interrupts. */\r
+ *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
+ *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
+\r
+ /* Start the timer that generates the tick ISR. Interrupts are disabled\r
+ here already. */\r
+ prvSetupTimerInterrupt();\r
+\r
+ /* Initialise the critical nesting count ready for the first task. */\r
+ uxCriticalNesting = 0;\r
+\r
+ /* Ensure the VFP is enabled - it should be anyway. */\r
+ vPortEnableVFP();\r
+\r
+ /* Lazy save always. */\r
+ *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;\r
+\r
+ /* Start the first task. */\r
+ vPortStartFirstTask();\r
+\r
+ /* Should not get here! */\r
+ return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEndScheduler( void )\r
+{\r
+ /* It is unlikely that the CM4F port will require this function as there\r
+ is nothing to return to. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortYieldFromISR( void )\r
+{\r
+ /* Set a PendSV to request a context switch. */\r
+ *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEnterCritical( void )\r
+{\r
+ portDISABLE_INTERRUPTS();\r
+ uxCriticalNesting++;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortExitCritical( void )\r
+{\r
+ uxCriticalNesting--;\r
+ if( uxCriticalNesting == 0 )\r
+ {\r
+ portENABLE_INTERRUPTS();\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void xPortPendSVHandler( void )\r
+{\r
+ /* This is a naked function. */\r
+\r
+ __asm volatile\r
+ (\r
+ " mrs r0, psp \n"\r
+ " \n"\r
+ " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */\r
+ " ldr r2, [r3] \n"\r
+ " \n"\r
+ " tst r14, #0x10 \n" /* Is the task using the FPU context? If so, push high vfp registers. */\r
+ " it eq \n"\r
+ " vstmdbeq r0!, {s16-s31} \n"\r
+ " \n"\r
+ " stmdb r0!, {r4-r11, r14} \n" /* Save the core registers. */\r
+ " \n"\r
+ " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */\r
+ " \n"\r
+ " stmdb sp!, {r3, r14} \n"\r
+ " mov r0, %0 \n"\r
+ " msr basepri, r0 \n"\r
+ " bl vTaskSwitchContext \n"\r
+ " mov r0, #0 \n"\r
+ " msr basepri, r0 \n"\r
+ " ldmia sp!, {r3, r14} \n"\r
+ " \n"\r
+ " ldr r1, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
+ " ldr r0, [r1] \n"\r
+ " \n"\r
+ " ldmia r0!, {r4-r11, r14} \n" /* Pop the core registers. */\r
+ " \n"\r
+ " tst r14, #0x10 \n" /* Is the task using the FPU context? If so, pop the high vfp registers too. */\r
+ " it eq \n"\r
+ " vldmiaeq r0!, {s16-s31} \n"\r
+ " \n"\r
+ " msr psp, r0 \n"\r
+ " bx r14 \n"\r
+ " \n"\r
+ " .align 2 \n"\r
+ "pxCurrentTCBConst: .word pxCurrentTCB \n"\r
+ ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
+ );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void xPortSysTickHandler( void )\r
+{\r
+unsigned long ulDummy;\r
+\r
+ /* If using preemption, also force a context switch. */\r
+ #if configUSE_PREEMPTION == 1\r
+ *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
+ #endif\r
+\r
+ ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
+ {\r
+ vTaskIncrementTick();\r
+ }\r
+ portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Setup the systick timer to generate the tick interrupts at the required\r
+ * frequency.\r
+ */\r
+void prvSetupTimerInterrupt( void )\r
+{\r
+ /* Configure SysTick to interrupt at the requested rate. */\r
+ *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
+ *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/* This is a naked function. */\r
+static void vPortEnableVFP( void )\r
+{\r
+ __asm volatile\r
+ (\r
+ " ldr.w r0, =0xE000ED88 \n" /* The FPU enable bits are in the CPACR. */\r
+ " ldr r1, [r0] \n"\r
+ " \n"\r
+ " orr r1, r1, #( 0xf << 20 ) \n" /* Enable CP10 and CP11 coprocessors, then save back. */\r
+ " str r1, [r0] \n"\r
+ " bx r14 "\r
+ );\r
+}\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+ \r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+\r
+#ifndef PORTMACRO_H\r
+#define PORTMACRO_H\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/*-----------------------------------------------------------\r
+ * Port specific definitions. \r
+ *\r
+ * The settings in this file configure FreeRTOS correctly for the\r
+ * given hardware and compiler.\r
+ *\r
+ * These settings should not be altered.\r
+ *-----------------------------------------------------------\r
+ */\r
+\r
+/* Type definitions. */\r
+#define portCHAR char\r
+#define portFLOAT float\r
+#define portDOUBLE double\r
+#define portLONG long\r
+#define portSHORT short\r
+#define portSTACK_TYPE unsigned portLONG\r
+#define portBASE_TYPE long\r
+\r
+#if( configUSE_16_BIT_TICKS == 1 )\r
+ typedef unsigned portSHORT portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffff\r
+#else\r
+ typedef unsigned portLONG portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+#endif\r
+/*-----------------------------------------------------------*/ \r
+\r
+/* Architecture specifics. */\r
+#define portSTACK_GROWTH ( -1 )\r
+#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portBYTE_ALIGNMENT 8\r
+/*-----------------------------------------------------------*/ \r
+\r
+\r
+/* Scheduler utilities. */\r
+extern void vPortYieldFromISR( void );\r
+\r
+#define portYIELD() vPortYieldFromISR()\r
+\r
+#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR()\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
+/* Critical section management. */\r
+\r
+/* \r
+ * Set basepri to portMAX_SYSCALL_INTERRUPT_PRIORITY without effecting other\r
+ * registers. r0 is clobbered.\r
+ */ \r
+#define portSET_INTERRUPT_MASK() \\r
+ __asm volatile \\r
+ ( \\r
+ " mov r0, %0 \n" \\r
+ " msr basepri, r0 \n" \\r
+ ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY):"r0" \\r
+ )\r
+ \r
+/*\r
+ * Set basepri back to 0 without effective other registers.\r
+ * r0 is clobbered.\r
+ */\r
+#define portCLEAR_INTERRUPT_MASK() \\r
+ __asm volatile \\r
+ ( \\r
+ " mov r0, #0 \n" \\r
+ " msr basepri, r0 \n" \\r
+ :::"r0" \\r
+ )\r
+\r
+#define portSET_INTERRUPT_MASK_FROM_ISR() 0;portSET_INTERRUPT_MASK()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) portCLEAR_INTERRUPT_MASK();(void)x\r
+\r
+\r
+extern void vPortEnterCritical( void );\r
+extern void vPortExitCritical( void );\r
+\r
+#define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK()\r
+#define portENABLE_INTERRUPTS() portCLEAR_INTERRUPT_MASK()\r
+#define portENTER_CRITICAL() vPortEnterCritical()\r
+#define portEXIT_CRITICAL() vPortExitCritical()\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Task function macros as described on the FreeRTOS.org WEB site. */\r
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+\r
+#define portNOP()\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* PORTMACRO_H */\r
+\r
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