]> git.sur5r.net Git - openocd/commitdiff
aarch64: use correct instruction for software breakpoints
authorMatthias Welwarsky <matthias.welwarsky@sysgo.com>
Fri, 16 Sep 2016 11:46:08 +0000 (13:46 +0200)
committerMatthias Welwarsky <matthias.welwarsky@sysgo.com>
Fri, 10 Feb 2017 13:01:39 +0000 (14:01 +0100)
External debuggers need to use HLT, not BRK. HLT generates a halting
debug event while BRK generates a debug exception for self-hosted
debugging.

Change-Id: I24024b83668107f73a14cc75d951134917269e5c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
src/target/aarch64.c
src/target/armv8_dpm.c
src/target/armv8_opcodes.h

index b1534e3630be773fa565f71db6a03c0997de834f..d38e0428443d9a1042216191d770ffac1a56cc2e 100644 (file)
@@ -1369,7 +1369,7 @@ static int aarch64_set_breakpoint(struct target *target,
 
        } else if (breakpoint->type == BKPT_SOFT) {
                uint8_t code[4];
-               buf_set_u32(code, 0, 32, ARMV8_BKPT(0x11));
+               buf_set_u32(code, 0, 32, ARMV8_HLT(0x11));
                retval = target_read_memory(target,
                                breakpoint->address & 0xFFFFFFFFFFFFFFFE,
                                breakpoint->length, 1,
index 08b1a204eacfe96d444dd9f4cba39ffea792c89b..8c0d45a3fc1733d595fe402d0c8cc0f4c3170c37 100644 (file)
@@ -869,7 +869,6 @@ void armv8_dpm_report_dscr(struct arm_dpm *dpm, uint32_t dscr)
        /* Examine debug reason */
        switch (DSCR_ENTRY(dscr)) {
                /* FALL THROUGH -- assume a v6 core in abort mode */
-               case DSCRV8_ENTRY_HLT:  /* HALT request from debugger */
                case DSCRV8_ENTRY_EXT_DEBUG:    /* EDBGRQ */
                        target->debug_reason = DBG_REASON_DBGRQ;
                        break;
@@ -878,7 +877,8 @@ void armv8_dpm_report_dscr(struct arm_dpm *dpm, uint32_t dscr)
                case DSCRV8_ENTRY_HALT_STEP:
                        target->debug_reason = DBG_REASON_SINGLESTEP;
                        break;
-               case DSCRV8_ENTRY_BKPT: /* SW BKPT */
+               case DSCRV8_ENTRY_HLT:  /* HLT instruction (software breakpoint) */
+               case DSCRV8_ENTRY_BKPT: /* SW BKPT (?) */
                case DSCRV8_ENTRY_RESET_CATCH:  /* Reset catch */
                case DSCRV8_ENTRY_OS_UNLOCK:  /*OS unlock catch*/
                case DSCRV8_ENTRY_EXCEPTION_CATCH:  /*exception catch*/
index 4f696db373e75297fa8b84f70f26f8538a709e3a..a1fb5d4d0018711d5a5716ab2d9f7398989ea394 100644 (file)
 /* ARM V8 Move immediate to process state field. */
 #define ARMV8_MSR_IM(Op1, CRm, Op2) \
        (0xd500401f | ((Op1) << 16)  | ((CRm) << 8) | ((Op2) << 5))
+
 #define ARMV8_BKPT(Im) (0xD4200000 | ((Im & 0xffff) << 5))
+#define ARMV8_HLT(Im) (0x0D4400000 | ((Im & 0xffff) << 5))
+
 #define ARMV8_MOVFSP_64(Rt) ((1 << 31) | 0x11000000 | (0x1f << 5) | (Rt))
 #define ARMV8_MOVTSP_64(Rt) ((1 << 31) | 0x11000000 | (Rt << 5) | (0x1F))
 #define ARMV8_MOVFSP_32(Rt) (0x11000000 | (0x1f << 5) | (Rt))