--- /dev/null
+MEMORY {
+
+ ZP: start = $00, size = $1A, type = rw, define = yes;
+
+ # INES Cartridge Header
+ #HEADER: start = $0, size = $10, file = %O ,fill = yes;
+
+ # 2 16K ROM Banks
+ # - startup
+ # - code
+ # - rodata
+ # - data (load)
+ # 1 8k CHR Bank
+ ROM0: start = $e000, size = $1ff6, file = %O ,fill = yes, define = yes;
+ # Hardware Vectors at End of 2nd 8K ROM
+ ROMV: start = $fff6, size = $a, file = %O,fill = yes;
+
+ ROM: start = $6000, size = $8000, file = %O, fill = yes,define=yes;
+
+
+ # standard 2k SRAM (-zeropage)
+ # $0100-$0200 cpu stack
+ # $0200-$0500 3 pages for ppu memory write buffer
+ # $0500-$0800 3 pages for cc65 parameter stack
+ #SRAM: start = $0500, size = $0300, define = yes;
+
+ # additional 8K SRAM Bank
+ # - data (run)
+ # - bss
+ # - heap
+# RAM: start = $2200, size = $1000, define = yes;
+# RAM2: start = $3200, size = $0e00, define = yes;
+ RAM: start = $2200, size = $1e00, define = yes;
+
+}
+SEGMENTS {
+ #HEADER: load = HEADER, type = wprot;
+
+ #aSTARTUP: load = ROM0, type = wprot, define = yes;
+ STARTUP: load = ROM0, type = wprot, define = yes;
+
+ CODE: load = ROM, type = wprot, define = yes;
+ RODATA: load = ROM, type = wprot, define = yes;
+
+ DATA: load = ROM0, run= RAM, type = rw, define = yes;
+# BSS: load = RAM2, type = bss, define = yes;
+ BSS: load = RAM, type = bss, define = yes;
+
+ VECTORS: load = ROMV, type = rw, define = yes;
+ #CHARS: load = ROM2, type = rw;
+
+
+ ZEROPAGE: load = ZP, type = zp, define = yes;
+
+}
+FEATURES {
+ CONDES: segment = STARTUP,
+ type=constructor,
+ label=__CONSTRUCTOR_TABLE__,
+ count=__CONSTRUCTOR_COUNT__;
+ CONDES: segment = STARTUP,
+ type=destructor,
+ label=__DESTRUCTOR_TABLE__,
+ count=__DESTRUCTOR_COUNT__;
+}
+SYMBOLS {
+ __STACKSIZE__ = $0300; # 3 pages stack
+}
$(GEOS) \
lynx \
nes \
- pcengine \
+ pce \
sim6502 \
sim65c02 \
supervision
copy: lda (ptr1),y
iny
-set: sta joy_vectors,x
+ sta joy_vectors,x
inx
rts
+++ /dev/null
-;
-; Ullrich von Bassewitz, 03.06.1998
-;
-; Heap variables and initialization.
-;
-
-; FIXME: there should be a way to configure heap from linkerscript!
-
- .constructor initheap, 24
-
- .import __RAM_START__, __RAM_SIZE__, __STACKSIZE__ ; Linker generated
- .import __BSS_SIZE__
- .importzp sp
-
-.data
-
-;; old - remove
- .export __horg, __hptr, __hend, __hfirst, __hlast
-__horg:
- .word __RAM_START__+__BSS_SIZE__+__DATA_SIZE__ ; Linker calculates this symbol
-__hptr:
- .word __RAM_START__+__BSS_SIZE__+__DATA_SIZE__ ; Dito
-__hend:
- .word __RAM_START__+__RAM_SIZE__
-__hfirst:
- .word 0
-__hlast:
- .word 0
-
- .export __heaporg
- .export __heapptr
- .export __heapend
- .export __heapfirst
- .export __heaplast
-
-__heaporg:
- .word __RAM_START__+__BSS_SIZE__+__DATA_SIZE__ ; Linker calculates this symbol
-__heapptr:
- .word __RAM_START__+__BSS_SIZE__+__DATA_SIZE__ ; Linker calculates this symbol
-__heapend:
- .word __RAM_START__+__RAM_SIZE__
-__heapfirst:
- .word 0
-__heaplast:
- .word 0
-
-
-; Initialization. Will be called from startup!
-
-.code
-
-initheap:
- ;sec
- ;lda sp
-; lda #<(__STACKSIZE__)
-; lda #<(__RAM_START__+__RAM_SIZE__)
- lda #<(__RAM_START__+__BSS_SIZE__+__DATA_SIZE__)
- sta __heapend
- sta __hend ; old
-; lda sp+1
-; lda #>(__STACKSIZE__)
-; lda #>(__RAM_START__+__RAM_SIZE__)
- lda #>(__RAM_START__+__BSS_SIZE__+__DATA_SIZE__)
- sta __heapend+1
- sta __hend+1 ; old
- rts
-
- .include "pcengine.inc"
+ .include "pcengine.inc"
-
- .export _clrscr
+ .export _clrscr
_clrscr:
- st0 #VDC_MAWR
- st1 #<$0000
- st2 #>$0000
+ st0 #VDC_MAWR
+ st1 #<$0000
+ st2 #>$0000
- st0 #VDC_VWR
- ldy #$40
-rowloop: ldx #$80
-colloop:
- lda #' '
- staio VDC_DATA_LO
- lda #$02
- staio VDC_DATA_HI
+ st0 #VDC_VWR
+ ldy #$40
+rowloop: ldx #$80
+colloop: lda #' '
+ staio VDC_DATA_LO
+ lda #$02
+ staio VDC_DATA_HI
- dex
- bne colloop
- dey
- bne rowloop
+ dex
+ bne colloop
+ dey
+ bne rowloop
- rts
+ rts
;
;----------------------------------------------------------------------------
- .importzp ptr1
+ .importzp ptr1
conio_init:
; Load font
- st0 #VDC_MAWR
+ st0 #VDC_MAWR
st1 #<$2000
st2 #>$2000
; ptr to font data
- lda #<font
- sta ptr1
- lda #>font
- sta ptr1+1
+ lda #<font
+ sta ptr1
+ lda #>font
+ sta ptr1+1
st0 #VDC_VWR ; VWR
ldy #$80 ; 128 chars
charloop: ldx #$08 ; 8 bytes/char
lineloop:
;;lda [$00] ; read font byte
- ldaind ptr1
+ lda (ptr1)
staio VDC_DATA_LO ; bitplane 0
stzio VDC_DATA_HI ; bitplane 1
dey
bne charloop ; next character
- ldx #0
- stx BGCOLOR
- inx
- stx CHARCOLOR
+ ldx #0
+ stx BGCOLOR
+ inx
+ stx CHARCOLOR
rts
- .rodata
+ .rodata
font: .include "vga.inc"
+++ /dev/null
-
-;
-; HuC6280 additional opcodes (use with --cpu 65C02)
-;
-; WARNING: THIS IS __NOT__ COMPLETE !!!
-;
-
-;; lda abs
-.macro ldaio arg1
- .byte $ad
- .word arg1
-.endmacro
-;; sta abs
-.macro staio arg1
- .byte $8d
- .word arg1
-.endmacro
-.macro stzio arg1
- .byte $9c
- .word arg1
-.endmacro
-
-.macro cla
- .byte $62
-.endmacro
-.macro clx
- .byte $82
-.endmacro
-
-;; lda (zp)
-.macro ldaind arg1
- .byte $b2
- .byte arg1
-.endmacro
-
-.macro cly
- .byte $c2
-.endmacro
-
-.macro st0 arg1
- .if (.match (.left (1, arg1), #))
- ; called with immidiate operand
- .byte $03
- .byte (.right (.tcount (arg1)-1, arg1))
- .else
- .error "illegal address mode"
- .endif
-.endmacro
-.macro st1 arg1
- .if (.match (.left (1, arg1), #))
- ; called with immidiate operand
- .byte $13
- .byte (.right (.tcount (arg1)-1, arg1))
- .else
- .error "illegal address mode"
- .endif
-.endmacro
-.macro st2 arg1
- .if (.match (.left (1, arg1), #))
- ; called with immidiate operand
- .byte $23
- .byte (.right (.tcount (arg1)-1, arg1))
- .else
- .error "illegal address mode"
- .endif
-.endmacro
-
-; tam #$xx
-.macro tam arg1
- .if (.match (.left (1, arg1), #))
- ; called with immidiate operand
- .byte $53
- .byte 1<<(.right (.tcount (arg1)-1, arg1))
- .else
- .error "illegal address mode"
- .endif
-.endmacro
-
-; tii x,y,z
-.macro tii arg1,arg2,arg3
- .byte $73
- .word arg1,arg2,arg3
-.endmacro
-
-.macro csh
- .byte $d4
-.endmacro
-.macro set
- .byte $f4
-.endmacro
-.macro _rmb0 arg1
- .byte $07
- .byte arg1
-.endmacro
-.macro _rmb1 arg1
- .byte $17
- .byte arg1
-.endmacro
-.macro _rmb2 arg1
- .byte $27
- .byte arg1
-.endmacro
-.macro _rmb3 arg1
- .byte $37
- .byte arg1
-.endmacro
-.macro _rmb4 arg1
- .byte $47
- .byte arg1
-.endmacro
-.macro _rmb5 arg1
- .byte $57
- .byte arg1
-.endmacro
-.macro _rmb6 arg1
- .byte $67
- .byte arg1
-.endmacro
-.macro _rmb7 arg1
- .byte $77
- .byte arg1
-.endmacro
-
-.macro _smb0 arg1
- .byte $87
- .byte arg1
-.endmacro
-.macro _smb1 arg1
- .byte $97
- .byte arg1
-.endmacro
-.macro _smb2 arg1
- .byte $a7
- .byte arg1
-.endmacro
-.macro _smb3 arg1
- .byte $b7
- .byte arg1
-.endmacro
-.macro _smb4 arg1
- .byte $c7
- .byte arg1
-.endmacro
-.macro _smb5 arg1
- .byte $d7
- .byte arg1
-.endmacro
-.macro _smb6 arg1
- .byte $e7
- .byte arg1
-.endmacro
-.macro _smb7 arg1
- .byte $f7
- .byte arg1
-.endmacro
-
-.macro _bbr0 arg1,arg2
- .byte $0f ;;,arg1
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-.macro _bbs0 arg1,arg2
- .byte $8f ;;,arg1
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-.macro _bbr1 arg1,arg2
- .byte $1f ;;,arg1
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-.macro _bbs1 arg1,arg2
- .byte $9f ;;,arg1
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-.macro _bbr2 arg1,arg2
- .byte $2f ;;,arg1
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-.macro _bbs2 arg1,arg2
- .byte $af ;;,arg1
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-.macro _bbr3 arg1,arg2
- .byte $3f ;;,arg1
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-.macro _bbs3 arg1,arg2
- .byte $bf ;;,arg1
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-.macro _bbr4 arg1,arg2
- .byte $4f ;;,arg1
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-.macro _bbs4 arg1,arg2
- .byte $cf ;;,arg1
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-.macro _bbr5 arg1,arg2
- .byte $5f ;;,arg1
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-.macro _bbs5 arg1,arg2
- .byte $df ;;,arg1
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-.macro _bbr6 arg1,arg2
- .byte $6f ;;,arg1
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-.macro _bbs6 arg1,arg2
- .byte $ef ;;,arg1
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-.macro _bbr7 arg1,arg2
- .byte $7f ;;,arg1
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-.macro _bbs7 arg1,arg2
- .byte $ff
- .byte arg1
- .byte <((arg2)-(*+1))
-.endmacro
-
-
- .include "huc6280.inc"
-
; Write VDC register
.macro VREG arg1,arg2
st0 #arg1
IRQ_STATUS = $1403
CDR_MEM_DISABLE = $1803
-CDR_MEM_ENABLE = $1807
\ No newline at end of file
+CDR_MEM_ENABLE = $1807
+
+
+;; lda abs
+.macro ldaio arg1
+ .byte $ad
+ .word arg1
+.endmacro
+;; sta abs
+.macro staio arg1
+ .byte $8d
+ .word arg1
+.endmacro
+;; stz abs
+.macro stzio arg1
+ .byte $9c
+ .word arg1
+.endmacro
+++ /dev/null
-MEMORY {
-
- ZP: start = $00, size = $1A, type = rw, define = yes;
-
- # INES Cartridge Header
- #HEADER: start = $0, size = $10, file = %O ,fill = yes;
-
- # 2 16K ROM Banks
- # - startup
- # - code
- # - rodata
- # - data (load)
- # 1 8k CHR Bank
- ROM0: start = $e000, size = $1ff6, file = %O ,fill = yes, define = yes;
- # Hardware Vectors at End of 2nd 8K ROM
- ROMV: start = $fff6, size = $a, file = %O,fill = yes;
-
- ROM: start = $6000, size = $8000, file = %O, fill = yes,define=yes;
-
-
- # standard 2k SRAM (-zeropage)
- # $0100-$0200 cpu stack
- # $0200-$0500 3 pages for ppu memory write buffer
- # $0500-$0800 3 pages for cc65 parameter stack
- #SRAM: start = $0500, size = $0300, define = yes;
-
- # additional 8K SRAM Bank
- # - data (run)
- # - bss
- # - heap
-# RAM: start = $2200, size = $1000, define = yes;
-# RAM2: start = $3200, size = $0e00, define = yes;
- RAM: start = $2200, size = $1e00, define = yes;
-
-}
-SEGMENTS {
- #HEADER: load = HEADER, type = wprot;
-
- #aSTARTUP: load = ROM0, type = wprot, define = yes;
- STARTUP: load = ROM0, type = wprot, define = yes;
-
- CODE: load = ROM, type = wprot, define = yes;
- RODATA: load = ROM, type = wprot, define = yes;
-
- DATA: load = ROM0, run= RAM, type = rw, define = yes;
-# BSS: load = RAM2, type = bss, define = yes;
- BSS: load = RAM, type = bss, define = yes;
-
- VECTORS: load = ROMV, type = rw, define = yes;
- #CHARS: load = ROM2, type = rw;
-
-
- ZEROPAGE: load = ZP, type = zp, define = yes;
-
-}
-FEATURES {
- CONDES: segment = STARTUP,
- type=constructor,
- label=__CONSTRUCTOR_TABLE__,
- count=__CONSTRUCTOR_COUNT__;
- CONDES: segment = STARTUP,
- type=destructor,
- label=__DESTRUCTOR_TABLE__,
- count=__DESTRUCTOR_COUNT__;
-}
-SYMBOLS {
- __STACKSIZE__ = $0300; # 3 pages stack
-}
NewSymbol ("__SIM65C02__", 1);
break;
+ case TGT_PCENGINE:
+ NewSymbol ("__PCE__", 1);
+ break;
+
default:
AbEnd ("Invalid target name: `%s'", Sys);
DefineNumericMacro ("__SIM65C02__", 1);
break;
+ case TGT_PCENGINE:
+ DefineNumericMacro ("__PCE__", 1);
+ break;
+
default:
AbEnd ("Unknown target system type %d", Target);
}
{ "module", TGT_MODULE },
{ "nes", TGT_NES },
{ "none", TGT_NONE },
+ { "pce", TGT_PCENGINE },
{ "pet", TGT_PET },
{ "plus4", TGT_PLUS4 },
{ "sim6502", TGT_SIM6502 },
{ "lynx", CPU_65C02, BINFMT_BINARY, CTNone },
{ "sim6502", CPU_6502, BINFMT_BINARY, CTNone },
{ "sim65c02", CPU_65C02, BINFMT_BINARY, CTNone },
+ { "pce", CPU_HUC6280, BINFMT_BINARY, CTNone },
};
/* Target system */
TGT_LYNX,
TGT_SIM6502,
TGT_SIM65C02,
+ TGT_PCENGINE,
TGT_COUNT /* Number of target systems */
} target_t;