Update .project to latest Code Red version.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@735 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/Demo/CORTEX_LPC1766_GCC_RedSuite/RTOSDemo/.cproject b/Demo/CORTEX_LPC1766_GCC_RedSuite/RTOSDemo/.cproject
index ee4155dea00c1364e9a706574fce7aa8dc3854cd..dc9ebb52837477c9f3b6f32fc8e7d1fe67e36801 100644 (file)
--- a/Demo/CORTEX_LPC1766_GCC_RedSuite/RTOSDemo/.cproject
+++ b/Demo/CORTEX_LPC1766_GCC_RedSuite/RTOSDemo/.cproject
@@ -383,9 +383,74 @@
 </profile>\r
 </scannerConfigBuildInfo>\r
 </storageModule>\r
+<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>\r
 </cconfiguration>\r
 </storageModule>\r
 <storageModule moduleId="cdtBuildSystem" version="4.0.0">\r
 <project id="RTOSDemo.null.1399204152" name="RTOSDemo"/>\r
 </storageModule>\r
+<storageModule moduleId="com.crt.config">\r
+<projectStorage>&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;\r
+&lt;TargetConfig&gt;&#13;\r
+&lt;Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1766ENG" property_count="5" version="1"/&gt;&#13;\r
+&lt;infoList vendor="NXP"&gt;&lt;info chip="LPC1766ENG" match_id="0x00033f33" name="LPC1766ENG"&gt;&lt;chip&gt;&lt;name&gt;LPC1766ENG&lt;/name&gt;&#13;\r
+&lt;family&gt;LPC17xx&lt;/family&gt;&#13;\r
+&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;\r
+&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;\r
+&lt;clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/&gt;&#13;\r
+&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;\r
+&lt;memory id="RAM" type="RAM"/&gt;&#13;\r
+&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;\r
+&lt;memoryInstance derived_from="Flash" id="MFlash256" location="0x00000000" size="0x40000"/&gt;&#13;\r
+&lt;memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/&gt;&#13;\r
+&lt;memoryInstance derived_from="RAM" id="RamAHB32" location="0x20000000" size="0x8000"/&gt;&#13;\r
+&lt;prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x20000"/&gt;&#13;\r
+&lt;prog_flash blocksz="0x8000" location="0x20000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x20000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" id="TIMER0" location="0x40004000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" id="TIMER1" location="0x40008000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" id="TIMER2" location="0x40090000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="TIMER" determined="infoFile" id="TIMER3" location="0x40094000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" id="GPIO0" location="0x50014000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" id="GPIO1" location="0x50014020"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" id="GPIO2" location="0x50014040"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" id="GPIO3" location="0x50014060"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="FGPIO" determined="infoFile" id="GPIO4" location="0x50014080"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_I2S" determined="infoFile" id="I2S" location="0x50014100"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_DAC" determined="infoFile" id="DAC" location="0x4008C000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC1xxx_UART" determined="infoFile" id="UART0" location="0x4000C000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC1xxx_UART_MODEM" determined="infoFile" id="UART1" location="0x40010000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC1xxx_UART" determined="infoFile" id="UART2" location="0x40098000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC1xxx_UART" determined="infoFile" id="UART3" location="0x4009C000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="SPI" determined="infoFile" id="SPI" location="0x40020000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" id="SSP0" location="0x4008800C"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_SSP" determined="infoFile" id="SSP1" location="0x4003000C"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_ADC" determined="infoFile" id="ADC" location="0x40034000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&amp;amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x12=0x12" id="USBDEV" location="0x5000C200"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_PWM" determined="infoFile" id="PWM" location="0x40018000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" id="I2C0" location="0x4001C000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" id="I2C1" location="0x4005C000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_I2C" determined="infoFile" id="I2C2" location="0x400A0000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_DMA" determined="infoFile" id="DMA" location="0x50004000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_ENET" determined="infoFile" id="ENET" location="0x50000000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_QEI" determined="infoFile" id="QEI" location="0x400bc000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x11=0x11" id="USBHOST" location="0x5000C000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC17_RTC" determined="infoFile" id="RTC" location="0x40024000"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/&gt;&#13;\r
+&lt;peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/&gt;&#13;\r
+&lt;/chip&gt;&#13;\r
+&lt;processor&gt;&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;\r
+&lt;family&gt;Cortex-M&lt;/family&gt;&#13;\r
+&lt;/processor&gt;&#13;\r
+&lt;link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;\r
+&lt;/info&gt;&#13;\r
+&lt;/infoList&gt;&#13;\r
+&lt;/TargetConfig&gt;</projectStorage>\r
+</storageModule>\r
 </cproject>\r