tcl: replace $TARGETNAME with $_TARGETNAME

code polishing to be consistent with other scripts

Change-Id: Ib52a92f48df9d2bdf543792b856e33aa04dbebe3
Signed-off-by: Radek Dostal <radek.dostal@streamunlimited.com>
Reviewed-on: http://openocd.zylin.com/2779
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

diff --git a/tcl/board/tp-link_tl-mr3020.cfg b/tcl/board/tp-link_tl-mr3020.cfg
index 0498d60c2a4bc890876fb5985a18d6655a74ae7a..b7d8d5b6150f57354e226cdca88d122f1ea5bab9 100644 (file)
--- a/tcl/board/tp-link_tl-mr3020.cfg
+++ b/tcl/board/tp-link_tl-mr3020.cfg
@@ -34,11 +34,11 @@ proc ar9331_ddr1_init {} {
                                ;# Each bit represents a cycle of valid data.
 }
 
-$TARGETNAME configure -event reset-init {
+$_TARGETNAME configure -event reset-init {
        ar9331_25mhz_pll_init
        sleep 1
        ar9331_ddr1_init
 }
 
 set ram_boot_address 0xa0000000
-$TARGETNAME configure -work-area-phys 0xa1FFE000 -work-area-size 0x1000
+$_TARGETNAME configure -work-area-phys 0xa1FFE000 -work-area-size 0x1000

diff --git a/tcl/target/ar71xx.cfg b/tcl/target/ar71xx.cfg
index 3ac61d94638c855382f804bb6f2ee9f4310870d6..196b048685c77df1f77007d00b95faaee33885d6 100644 (file)
--- a/tcl/target/ar71xx.cfg
+++ b/tcl/target/ar71xx.cfg
@@ -10,10 +10,10 @@ set CHIPNAME ar71xx
 
 jtag newtap $CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id 1
 
-set TARGETNAME $CHIPNAME.cpu
-target create $TARGETNAME mips_m4k -endian big -chain-position $TARGETNAME
+set _TARGETNAME $CHIPNAME.cpu
+target create $_TARGETNAME mips_m4k -endian big -chain-position $_TARGETNAME
 
-$TARGETNAME configure -event reset-halt-post {
+$_TARGETNAME configure -event reset-halt-post {
        #setup PLL to lowest common denominator 300/300/150 setting
        mww 0xb8050000 0x000f40a3       ;# reset val + CPU:3 DDR:3 AHB:0
        mww 0xb8050000 0x800f40a3       ;# send to PLL
@@ -22,7 +22,7 @@ $TARGETNAME configure -event reset-halt-post {
        mww 0xb8050008 3                ;# set reset_switch and clock_switch (resets SoC)
 }
 
-$TARGETNAME configure -event reset-init {
+$_TARGETNAME configure -event reset-init {
        #complete pll initialization
        mww 0xb8050000 0x800f0080       ;# set sw_update bit
        mww 0xb8050008 0                ;# clear reset_switch bit
@@ -50,7 +50,7 @@ $TARGETNAME configure -event reset-init {
 }
 
 # setup working area somewhere in RAM
-$TARGETNAME configure -work-area-phys 0xa0600000 -work-area-size 0x20000
+$_TARGETNAME configure -work-area-phys 0xa0600000 -work-area-size 0x20000
 
 # serial SPI capable flash
 # flash bank <driver> <base> <size> <chip_width> <bus_width>

diff --git a/tcl/target/atheros_ar9331.cfg b/tcl/target/atheros_ar9331.cfg
index 17503c78fca9acb93631cd334a1bbec9f426c541..c5609bb1d35b2f62aa34caa565b69a4215d7cf71 100644 (file)
--- a/tcl/target/atheros_ar9331.cfg
+++ b/tcl/target/atheros_ar9331.cfg
@@ -12,5 +12,5 @@ if { [info exists CPUTAPID] } {
 
 jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID
 
-set TARGETNAME $_CHIPNAME.cpu
-target create $TARGETNAME mips_m4k -endian big -chain-position $TARGETNAME
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME mips_m4k -endian big -chain-position $_TARGETNAME